JPH05268762A - Booster type active filter circuit - Google Patents

Booster type active filter circuit

Info

Publication number
JPH05268762A
JPH05268762A JP4060586A JP6058692A JPH05268762A JP H05268762 A JPH05268762 A JP H05268762A JP 4060586 A JP4060586 A JP 4060586A JP 6058692 A JP6058692 A JP 6058692A JP H05268762 A JPH05268762 A JP H05268762A
Authority
JP
Japan
Prior art keywords
power
power mosfet
active filter
filter circuit
choke coil
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4060586A
Other languages
Japanese (ja)
Other versions
JP2918006B2 (en
Inventor
Naoki Ozawa
直樹 小澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4060586A priority Critical patent/JP2918006B2/en
Publication of JPH05268762A publication Critical patent/JPH05268762A/en
Application granted granted Critical
Publication of JP2918006B2 publication Critical patent/JP2918006B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Direct Current Feeding And Distribution (AREA)
  • Rectifiers (AREA)
  • Control Of Voltage And Current In General (AREA)
  • Dc-Dc Converters (AREA)

Abstract

PURPOSE:To enhance efficiency by reducing power loss due to rectifying element through the use of reverse output characteristics of power MOSFET. CONSTITUTION:A power MOSFET is employed in place of a rectifying diode and a counter electromotive force, to be induced in the secondary winding of a choke coil having primary and secondary windings upon turn OFF of a first power MOSFET, is applied on the gate of a second power MOSFET thus lowering ON voltage appearing between source and drain of the second power MOSFET according to the reverse output characteristics of the second power MOSFET.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は昇圧型アクティブフィル
タ回路に関し、特に交流電源を第1のパワーMOSFE
Tおよび整流用の第2のパワーMOSFETにより所定
の周波数でオン・オフして昇圧した直流電圧を得るアク
ティブフィルタ回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a step-up active filter circuit, and more particularly, to an AC power source as a first power MOSFE.
The present invention relates to an active filter circuit which obtains a boosted DC voltage by turning on / off at a predetermined frequency by a T and a second power MOSFET for rectification.

【0002】[0002]

【従来の技術】従来、この種の昇圧型アクティブフィル
タ回路として図5に示すものが知られている。まず、パ
ワーMOSFET3のゲートに接続された制御回路4の
出力段回路のトランジスタQ1がオンすると、パワーM
OSFET3はオンし、交流電源6〓整流ブリッジダイ
オード2〓チョークコイル1〓パワーMOSFET3〓
整流ブリッジダイオード2〓交流電源6の閉ループに電
流が流れる。
2. Description of the Related Art Conventionally, a boosting type active filter circuit of this type is known as shown in FIG. First, when the transistor Q1 of the output stage circuit of the control circuit 4 connected to the gate of the power MOSFET 3 is turned on, the power M
OSFET3 turns on, AC power supply 6〓 Rectifier bridge diode 2〓 Choke coil 1〓 Power MOSFET 3〓
Rectifier bridge diode 2 〓 Current flows in the closed loop of AC power supply 6.

【0003】次に制御回路4の出力段回路のトランジス
タQ1がオフし、トランジスタQ2がオンするとパワー
MOSFET3はオフする。
Next, when the transistor Q1 of the output stage circuit of the control circuit 4 turns off and the transistor Q2 turns on, the power MOSFET 3 turns off.

【0004】このパワーMOSFET3がオフすると、
オン時にチョークコイル1に蓄積されたエネルギがチョ
ークコイル1〓整流用ダイオード14〓平滑コンデンサ
7及び負荷8〓整流ブリッジダイオード2〓交流電源6
〓チョークコイル1の閉ループに回生され、負荷8に昇
圧した直流の電力が供給されると伴に平滑コンデンサ7
に正弦波電流が供給される。
When the power MOSFET 3 is turned off,
The energy accumulated in the choke coil 1 at the time of turning on is choke coil 1〓 rectifying diode 14〓 smoothing capacitor 7 and load 8〓 rectifying bridge diode 2〓 AC power supply 6
〓 When the DC power regenerated by the closed loop of the choke coil 1 is supplied to the load 8, the smoothing capacitor 7
A sinusoidal current is supplied to.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、上述し
た従来の昇圧型アクティブフィルタ回路は負荷8の出力
電力が300w以上と大きく整流用ダイオード16の順
電圧降下による電力損失が大きく、効率が低減するとい
う欠点があった。
However, in the above-described conventional step-up active filter circuit, the output power of the load 8 is as large as 300 w or more, the power loss due to the forward voltage drop of the rectifying diode 16 is large, and the efficiency is reduced. There was a flaw.

【0006】そこで、本発明の技術的課題は、上記欠点
に鑑み、電力損失を低減させた昇圧型アクティブフィル
タ回路を提供することである。
In view of the above-mentioned drawbacks, a technical object of the present invention is to provide a step-up active filter circuit with reduced power loss.

【0007】[0007]

【課題を解決するための手段】本発明によれば、電源電
力を高周波に変換する第1のパワーMOSFETと、該
第1のパワーMOSFETに所定の周波数でオン・オフ
信号を出力する制御回路と、前記第1のパワーMOSF
ETによって高周波に変換された電力を直流に変換する
整流平滑部とを有する昇圧型アクティブフィルタ回路に
おいて、前記整流平滑部は、整流用のパワーMOSFE
Tを有し、前記第1のパワーMOSFETがオフしたと
きに、一次及び二次巻線を備えたチョークコイルの二次
巻線に発生する逆起電圧を前記第2のパワーMOSFE
Tのゲート・ソース間に印加し、前記第2のパワーMO
SFETの逆出力特性に基づいて、前記第2のパワーM
OSFETのソース・ドレイン間に発生するオン電圧を
低下させることを特徴とする昇圧型アクティブフィルタ
回路が得られる。
According to the present invention, there is provided a first power MOSFET for converting power source power into a high frequency, and a control circuit for outputting an ON / OFF signal to the first power MOSFET at a predetermined frequency. , The first power MOSF
In a step-up active filter circuit having a rectifying / smoothing unit that converts the electric power converted to a high frequency by ET into a direct current, the rectifying / smoothing unit is a power MOSFE for rectification.
When the first power MOSFET is turned off, the counter electromotive voltage generated in the secondary winding of the choke coil having the primary and secondary windings is applied to the second power MOSFE.
The second power MO is applied between the gate and source of T
Based on the reverse output characteristic of the SFET, the second power M
It is possible to obtain a step-up active filter circuit characterized by reducing the on-voltage generated between the source and drain of the OSFET.

【0008】また、本発明によれば、請求項1記載の昇
圧型アクティブフィルタ回路において、前記チョークコ
イルの二次巻線を2列設け、一方の二次巻線に発生する
逆起電圧を前記第2のパワーMOSFETのゲート・ソ
ース間に印加し、他方の二次巻線に発生する電圧を、前
記第1のパワーMOSFETのゲートに印加することを
特徴とする昇圧型アクティブフィルタ回路が得られる。
Further, according to the present invention, in the step-up active filter circuit according to claim 1, the secondary winding of the choke coil is provided in two rows, and the counter electromotive voltage generated in one of the secondary windings is A step-up active filter circuit is obtained which is applied between the gate and source of a second power MOSFET and the voltage generated in the other secondary winding is applied to the gate of the first power MOSFET. ..

【0009】即ち、本発明の昇圧型アクティブフィルタ
回路は、第1のパワーMOSFETがオフすると、1
次、2次巻線を備えたチョークコイルの二次巻線に発生
する逆起電圧を第2の整流用パワーMOSFETのゲー
ト・ソース間に印加し、オンさせることで順電圧を低減
できる整流用パワーMOSFETと、それを駆動するチ
ョークコイルとから構成されるゲート駆動回路を有す
る。
That is, the step-up active filter circuit of the present invention is set to 1 when the first power MOSFET is turned off.
For rectification that can reduce forward voltage by applying the counter electromotive voltage generated in the secondary winding of the choke coil equipped with the secondary and secondary windings between the gate and source of the second rectifying power MOSFET and turning it on It has a gate drive circuit composed of a power MOSFET and a choke coil for driving the power MOSFET.

【0010】[0010]

【実施例】次に、本発明の実施例について図面を参照し
て説明する。
Embodiments of the present invention will now be described with reference to the drawings.

【0011】図1は本発明の第1の実施例を示す回路図
である。
FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

【0012】この実施例は、一次巻線及び二次巻線を備
え、この一次巻線の一端を整流ブリッジダイオード2の
端子(a)に接続するチョークコイル1と、ドレイン端
子をチョークコイル1の他端と接続し、ソース端子を整
流ブリッジダイオード2の端子(b)と接続して、制御
信号VG によりオン・オフする第1のパワーMOSFE
T3と、トランジスタQ1,Q2からなるトーテンポー
ル型の出力段回路を備え、所定の周波数の制御信号VG
を発生する制御回路4と、ソース端子をチョークコイル
の一次巻線の他端と接続し、第1のパワーMOSFET
3がオフとなったとき、チョークコイル1の二次巻線に
発生する電圧によりオンとなる第2のパワーMOSFE
T5と、この第2のパワーMOSFET5のドレイン端
子を、平滑コンデンサ7と負荷8の(+)端子とに接続
し、整流ブリッジダイオード2の入力側(c),(d)
端子は交流電源6に接続される構成となっている。
This embodiment comprises a primary winding and a secondary winding, and a choke coil 1 whose one end is connected to a terminal (a) of a rectifying bridge diode 2 and a drain terminal of which is connected to the choke coil 1. A first power MOSFE which is connected to the other end and whose source terminal is connected to the terminal (b) of the rectifying bridge diode 2 and which is turned on / off by the control signal V G.
A totem-pole type output stage circuit composed of T3 and transistors Q1 and Q2 is provided, and a control signal V G of a predetermined frequency is provided.
And a source terminal connected to the other end of the primary winding of the choke coil to generate a first power MOSFET.
The second power MOSFE which is turned on by the voltage generated in the secondary winding of the choke coil 1 when the third power is turned off.
T5 and the drain terminal of the second power MOSFET 5 are connected to the smoothing capacitor 7 and the (+) terminal of the load 8, and the input sides (c) and (d) of the rectifying bridge diode 2 are connected.
The terminal is connected to the AC power supply 6.

【0013】次に、この実施例の動作について説明す
る。
Next, the operation of this embodiment will be described.

【0014】まず、パワーMOSFET3のゲート抵抗
12を介して接続された制御回路2の出力段回路のトラ
ンジスタQ1がオンすると、パワーMOSFET3のゲ
ート・ソース間に順電圧が印加されパワーMOSFET
3がオンし、交流電源6〓整流ブリッジダイオード2〓
チョークコイル1〓パワーMOSFET3〓整流ブリッ
ジダイオード2〓交流電源6の閉ループに電流が流れる
(図2の期間A)。次に、制御回路4のトランジスタQ
1がオフし、トランジスタQ2がオンするとパワーMO
SFET3はオフとなる。
First, when the transistor Q1 of the output stage circuit of the control circuit 2 connected through the gate resistance 12 of the power MOSFET 3 is turned on, a forward voltage is applied between the gate and source of the power MOSFET 3 and the power MOSFET is turned on.
3 turns on, AC power supply 6〓 Rectifier bridge diode 2〓
Current flows in the closed loop of the choke coil 1〓 power MOSFET 3〓 rectifying bridge diode 2〓 AC power supply 6 (period A in FIG. 2). Next, the transistor Q of the control circuit 4
When 1 turns off and transistor Q2 turns on, power MO
SFET3 is turned off.

【0015】パワーMOSFET3がオフとなると、チ
ョークコイルの二次巻線に発生する電圧によりパワーM
OSFET5がオンし、チョークコイル1の一次巻線に
蓄積されたエネルギがチョークコイル1〓パワーMOS
FET5〓平滑コンデンサ7及び負荷8〓整流ブリッジ
ダイオード2〓交流電源6〓チョークコイル1の閉ルー
プに回生され、負荷に昇圧された直流の電力を供給する
(図2の期間B)。
When the power MOSFET 3 is turned off, the power M is generated by the voltage generated in the secondary winding of the choke coil.
When the OSFET5 is turned on, the energy stored in the primary winding of the choke coil 1 is the power MOS of the choke coil 1〓
FET 5 〓 smoothing capacitor 7 and load 8 〓 rectifying bridge diode 2 〓 AC power supply 6 〓 choke coil 1 regenerates a closed loop and supplies boosted DC power to the load (period B in FIG. 2).

【0016】このとき、チョークコイル1の二次巻線の
(a)点がプラスに、(b)点がマイナスになり、パワ
ーMOSFET5のゲートに順電圧が印加され、パワー
MOSFET5は、図3に示すような逆出力特性をもつ
ので、整流用としてのパワーMOSFET5のソース・
ドレイン間の電圧降下はダイオード14(図3参照)の
電圧降下よりも低く、従ってチョークコイル1に蓄積さ
れたエネルギの回生時の電力損失が低減され、変換効率
を上げることができる。
At this time, the point (a) of the secondary winding of the choke coil 1 becomes positive and the point (b) becomes negative, and a forward voltage is applied to the gate of the power MOSFET 5, so that the power MOSFET 5 is changed as shown in FIG. Since it has a reverse output characteristic as shown, the source of the power MOSFET 5 for rectification
The voltage drop between the drains is lower than the voltage drop of the diode 14 (see FIG. 3), so that the power loss at the time of regeneration of the energy stored in the choke coil 1 is reduced and the conversion efficiency can be improved.

【0017】図4は、本発明の第2の実施例を示す回路
図である。
FIG. 4 is a circuit diagram showing a second embodiment of the present invention.

【0018】この実施例が第1の実施例と相違する点
は、チョークコイルの2次巻線を2つ設け、一方の二次
巻線は第一の実施例と同様にパワーMOSFET5のオ
ン・オフ制御用とし、もう一方の二次巻線はその発生電
圧をダイオード15、抵抗12,16を介してパワーM
OSFET3のゲートに印加するようにした点であり、
パワーMOSFET3のターンオフ時間を短縮すること
ができる利点がある。
The difference between this embodiment and the first embodiment is that two secondary windings of the choke coil are provided, and one of the secondary windings is the on-state of the power MOSFET 5 as in the first embodiment. It is for OFF control, and the other secondary winding supplies its generated voltage to power M via diode 15 and resistors 12 and 16.
It is applied to the gate of OSFET3.
There is an advantage that the turn-off time of the power MOSFET 3 can be shortened.

【0019】[0019]

【発明の効果】以上説明したように本発明は、チョーク
コイルに蓄積されたエネルギを回生するループを形成す
る整流素子を、このエネルギ回生時にチョークコイルの
二次巻線に発生する電圧でオンするパワーMOSFET
とすることにより、このパワーMOSFETのオン時の
電圧降下を従来の整流素子のダイオードより低くするこ
とができるので、整流素子による電力損失を低減するこ
とができ、従って変換効率の向上をはかることができる
効果がある。
As described above, according to the present invention, the rectifying element forming a loop for regenerating the energy accumulated in the choke coil is turned on by the voltage generated in the secondary winding of the choke coil during the energy regeneration. Power MOSFET
By this, since the voltage drop when the power MOSFET is turned on can be made lower than that of the diode of the conventional rectifying element, the power loss due to the rectifying element can be reduced, and therefore the conversion efficiency can be improved. There is an effect that can be done.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例を示す回路図FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

【図2】第1の実施例の動作波形FIG. 2 is an operation waveform of the first embodiment.

【図3】パワーMOSFETの逆出力特性FIG. 3 Reverse output characteristics of power MOSFET

【図4】本発明の第2の実施例を示す回路図FIG. 4 is a circuit diagram showing a second embodiment of the present invention.

【図5】従来の実施例FIG. 5 Conventional Example

【符号の説明】[Explanation of symbols]

1 チョークコイル 2 整流ブリッジダイオード 3,5 パワーMOSFET 5−1 内蔵ダイオード 4 制御回路 6 交流電源 7 平滑コンデンサ 8 負荷 9 定電圧ダイオード 10,11,12,13,16 抵抗 14,15 ダイオード Q1,Q2 トランジスタ 1 Choke coil 2 Rectifier bridge diode 3,5 Power MOSFET 5-1 Built-in diode 4 Control circuit 6 AC power supply 7 Smoothing capacitor 8 Load 9 Constant voltage diode 10, 11, 12, 13, 16 Resistor 14, 15 Diode Q1, Q2 Transistor

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 電源電力を高周波に変換する第1のパワ
ーMOSFETと、該第1のパワーMOSFETに所定
の周波数でオン・オフ信号を出力する制御回路と、前記
第1のパワーMOSFETによって高周波に変換された
電力を直流に変換する整流平滑部とを有する昇圧型アク
ティブフィルタ回路において、 前記整流平滑部は、整流用のパワーMOSFETを有
し、前記第1のパワーMOSFETがオフしたときに、
一次及び二次巻線を備えたチョークコイルの二次巻線に
発生する逆起電圧を前記第2のパワーMOSFETのゲ
ート・ソース間に印加し、前記第2のパワーMOSFE
Tの逆出力特性に基づいて、前記第2のパワーMOSF
ETのソース・ドレイン間に発生するオン電圧を低下さ
せることを特徴とする昇圧型アクティブフィルタ回路。
1. A first power MOSFET for converting power source power into a high frequency, a control circuit for outputting an ON / OFF signal to the first power MOSFET at a predetermined frequency, and a high frequency by the first power MOSFET. In a step-up active filter circuit having a rectifying / smoothing unit that converts the converted power into a direct current, the rectifying / smoothing unit has a rectifying power MOSFET, and when the first power MOSFET is turned off,
The counter electromotive voltage generated in the secondary winding of the choke coil having the primary and secondary windings is applied between the gate and the source of the second power MOSFET, and the second power MOSFE
Based on the reverse output characteristic of T, the second power MOSF
A step-up active filter circuit characterized by reducing the on-voltage generated between the source and drain of ET.
【請求項2】 請求項1記載の昇圧型アクティブフィル
タ回路において、前記チョークコイルの二次巻線を2列
設け、一方の二次巻線に発生する逆起電圧を前記第2の
パワーMOSFETのゲート・ソース間に印加し、他方
の二次巻線に発生する電圧を、前記第1のパワーMOS
FETのゲートに印加することを特徴とする昇圧型アク
ティブフィルタ回路。
2. The step-up active filter circuit according to claim 1, wherein the secondary windings of the choke coil are provided in two rows, and a counter electromotive voltage generated in one of the secondary windings is applied to the second power MOSFET. The voltage applied between the gate and the source and generated in the other secondary winding is the first power MOS.
A boost type active filter circuit characterized by being applied to the gate of an FET.
JP4060586A 1992-03-17 1992-03-17 Boost type active filter circuit Expired - Fee Related JP2918006B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4060586A JP2918006B2 (en) 1992-03-17 1992-03-17 Boost type active filter circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4060586A JP2918006B2 (en) 1992-03-17 1992-03-17 Boost type active filter circuit

Publications (2)

Publication Number Publication Date
JPH05268762A true JPH05268762A (en) 1993-10-15
JP2918006B2 JP2918006B2 (en) 1999-07-12

Family

ID=13146497

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4060586A Expired - Fee Related JP2918006B2 (en) 1992-03-17 1992-03-17 Boost type active filter circuit

Country Status (1)

Country Link
JP (1) JP2918006B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09322532A (en) * 1996-05-28 1997-12-12 Origin Electric Co Ltd Power supply circuit
WO2008096709A1 (en) * 2007-02-06 2008-08-14 Kabushiki Kaisha Toshiba Semiconductor switch and power converter to which the semiconductor switch is applied
WO2012171227A1 (en) * 2011-06-11 2012-12-20 深圳市华星光电技术有限公司 Self excitation synchronous rectification boost converter
US8610416B2 (en) 2011-06-11 2013-12-17 Shenzhen China Star Optoelectronics Technology Co., Ltd. Self-driven synchronous rectification boost converter

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09322532A (en) * 1996-05-28 1997-12-12 Origin Electric Co Ltd Power supply circuit
WO2008096709A1 (en) * 2007-02-06 2008-08-14 Kabushiki Kaisha Toshiba Semiconductor switch and power converter to which the semiconductor switch is applied
US8089780B2 (en) 2007-02-06 2012-01-03 Kabushiki Kaisha Toshiba Semiconductor switch and power conversion system provided with semiconductor switch
WO2012171227A1 (en) * 2011-06-11 2012-12-20 深圳市华星光电技术有限公司 Self excitation synchronous rectification boost converter
US8610416B2 (en) 2011-06-11 2013-12-17 Shenzhen China Star Optoelectronics Technology Co., Ltd. Self-driven synchronous rectification boost converter

Also Published As

Publication number Publication date
JP2918006B2 (en) 1999-07-12

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