JPH05267546A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH05267546A
JPH05267546A JP14651392A JP14651392A JPH05267546A JP H05267546 A JPH05267546 A JP H05267546A JP 14651392 A JP14651392 A JP 14651392A JP 14651392 A JP14651392 A JP 14651392A JP H05267546 A JPH05267546 A JP H05267546A
Authority
JP
Japan
Prior art keywords
finger
lead frame
semiconductor chip
connecting portion
connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14651392A
Other languages
Japanese (ja)
Other versions
JPH0817220B2 (en
Inventor
Hiroshi Shimazu
博士 嶋津
Yasuo Yamashita
康雄 山下
Masayoshi Suzuki
正義 鈴記
Eiji Sakata
栄二 坂田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyushu Hitachi Maxell Ltd
Original Assignee
Kyushu Hitachi Maxell Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyushu Hitachi Maxell Ltd filed Critical Kyushu Hitachi Maxell Ltd
Priority to JP4146513A priority Critical patent/JPH0817220B2/en
Publication of JPH05267546A publication Critical patent/JPH05267546A/en
Publication of JPH0817220B2 publication Critical patent/JPH0817220B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To provide a semiconductor device in which a finger and a semiconductor chip are securely joined with each other and an inexpensive lead frame is used. CONSTITUTION:A bumped connection part 4a for connection with an electrode of a semiconductor chip 1 is disposed on a finger 4, and a connection surface side of a connection part 4a is coated with a contact member 12 such as gold, tin and solder. Accordingly, no greater amount of expensive gold is required for an entire bump, and joining is ensured with a metal-aluminum alloy.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、IC,LSI等の半導
体チップを固定するリードフレームに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame for fixing semiconductor chips such as IC and LSI.

【0002】[0002]

【従来の技術】従来より半導体チップを樹脂モールドで
一体化して複数ピンを突設した半導体装置の組立てには
金属製のリードフレームが用いられている。このリード
フレームは薄い銅箔状金属板をプレスで撃ち抜いたり、
エッチングなどによって形成されており、その形状は図
11に示すように、半導体チップ1を取り付ける矩形の
タブ2をその4隅において支持するタブリードと、タブ
2の周縁に内端を臨ませる複数のフィンガ4と、これら
フィンガ4及びタブリード3の外端を支持する枠部5
と、枠部5の両端縁に沿って定間隔に設けられたスプロ
ケット孔6とからなっている。
2. Description of the Related Art Conventionally, a metal lead frame has been used for assembling a semiconductor device in which a semiconductor chip is integrated with a resin mold to project a plurality of pins. This lead frame is a thin copper foil metal plate punched with a press,
As shown in FIG. 11, the shape is formed by etching or the like, and the tab leads for supporting the rectangular tabs 2 for mounting the semiconductor chip 1 at the four corners thereof and a plurality of fingers for exposing the inner ends to the peripheral edges of the tabs 2 are formed. 4 and a frame portion 5 that supports the outer ends of the fingers 4 and the tab leads 3.
And sprocket holes 6 provided at regular intervals along both edges of the frame portion 5.

【0003】このようなリードフレーム7を用いて半導
体装置を組立てるには、まずタブ2上に半導体チップ1
を取り付けた後、半導体チップ1の各電極とこれに対応
するフィンガ4の内端をワイヤあるいはワイヤを用いず
直接に接続し、その後矩形枠部5の内側領域を合成樹脂
でモールドし半導体チップ1を被覆し、次いで枠部5を
切除して半導体装置を得るのである。
In order to assemble a semiconductor device using such a lead frame 7, the semiconductor chip 1 is first mounted on the tab 2.
After mounting, the electrodes of the semiconductor chip 1 and the inner ends of the fingers 4 corresponding to the electrodes are directly connected without using wires or wires, and then the inner region of the rectangular frame portion 5 is molded with synthetic resin to form the semiconductor chip 1 Then, the frame portion 5 is cut off to obtain a semiconductor device.

【0004】[0004]

【発明が解決しようとする課題】ところで、リードフレ
ーム7のフィンガ4の先端は図12に示すように半導体
チップ1の電極1aに半田その他の手段を用いて接続さ
れるのであるが、一般に電極1aはシリコン1b上に薄
膜状に形成されたアルミニウムパッドからなり、周囲の
保護膜1cより凹んだ位置にある。
By the way, the tips of the fingers 4 of the lead frame 7 are connected to the electrodes 1a of the semiconductor chip 1 by soldering or other means as shown in FIG. Is an aluminum pad formed in a thin film on the silicon 1b and is located at a position recessed from the surrounding protective film 1c.

【0005】そこでフィンガ4の先端部には電極1aと
接続を容易にするためバンプのような接続部4aが形成
されるのであるが、フィンガ4及び接続部4aが銅箔状
金属板で形成されている場合、電極1aとの接続が不完
全なものとなる傾向にあり、このため接続部4a全体を
金で形成すれば接続は容易かつ確実になる反面、金素材
の使用量が増加し高価になることが予測される。
Therefore, a connection portion 4a such as a bump is formed at the tip of the finger 4 to facilitate connection with the electrode 1a. The finger 4 and the connection portion 4a are formed of a copper foil metal plate. In this case, the connection with the electrode 1a tends to be incomplete. Therefore, if the entire connection portion 4a is made of gold, the connection is easy and reliable, but the amount of gold material used increases and the cost is high. Is expected to become.

【0006】[0006]

【課題を解決するための手段】本発明は上記点に鑑みて
なされたもので、フィンガ4に、半導体チップ1の電極
と接続するバンプ状接続部4aを配し、該接続部4aの
上記接続面側を金,すず,半田等の接触材12で被覆し
てなるものである。
The present invention has been made in view of the above points, and a bump-shaped connecting portion 4a for connecting to an electrode of the semiconductor chip 1 is arranged on the finger 4, and the connecting portion 4a is connected as described above. The surface side is covered with a contact material 12 such as gold, tin, or solder.

【0007】[0007]

【作用】このような半導体装置によれば、例えば銅箔状
フィンガとアルミニウム電極との接合は、従来と同じ金
−アルミ合金となり、接続強度が従来より劣化すること
がなく、無垢状金バンプを形成しないので、製造コスト
を低減することができる。
According to such a semiconductor device, for example, a copper foil finger and an aluminum electrode are bonded to each other by using the same gold-aluminum alloy as in the conventional case, and the connection strength is not deteriorated as compared with the conventional case, and a solid gold bump is formed. Since it is not formed, the manufacturing cost can be reduced.

【0008】[0008]

【実施例】図1ないし図6は本発明の実施例におけるリ
ードフレームの成形工程を示す図である。まず図1の如
くステンレス等の導電性金属からなる基板8上に所望パ
ターンのレジスト層9を形成する。このレジスト層9は
リードフレーム7を形成しない位置にのみ積層されるも
のであって、非レジスト部8aの形状は所望パターンの
リードフレーム形状である。
1 to 6 are views showing a lead frame molding process in an embodiment of the present invention. First, as shown in FIG. 1, a resist layer 9 having a desired pattern is formed on a substrate 8 made of a conductive metal such as stainless steel. The resist layer 9 is laminated only on the position where the lead frame 7 is not formed, and the shape of the non-resist portion 8a is a lead frame shape of a desired pattern.

【0009】次にこの基板8上に、レジストがアルカリ
現像タイプではカセイソーダを、溶剤タイプの場合は塩
化メチレン等の溶剤を用いて剥離処理を行う。その後こ
の基板8上に電鋳により銅,ニッケル,金等の金属を積
層させる。これにより図2の如くレジスト層9を除く非
レジスト部8a上にのみ金属層10が形成される。
Next, a peeling process is performed on the substrate 8 by using caustic soda when the resist is an alkali developing type and by using a solvent such as methylene chloride when the resist is a solvent type. Thereafter, a metal such as copper, nickel or gold is laminated on this substrate 8 by electroforming. As a result, as shown in FIG. 2, the metal layer 10 is formed only on the non-resist portion 8a excluding the resist layer 9.

【0010】このようにして一枚の板状に成形された基
板8及び金属層の積層体の一部をプレス成形により図3
の如く、金属層側に突出するように折曲加工する。この
成形部分はリードフレーム7の中央部に位置するタブ2
及びフィンガ4先端部であって、図3ではタブ2に向か
って対向して延出する一対のフィンガ4を示しており、
フィンガ4は平坦なフィンガ基部4b、基部4bより傾
斜して延びる連結部4c、及び連結部4cからフィンガ
基部4bと略平行に延びる先端部4dとをそれぞれ備え
ている。なおタブ2は特に必要としない。
A part of the laminated body of the substrate 8 and the metal layer thus formed into a single plate is press-formed as shown in FIG.
As described above, bending processing is performed so as to project to the metal layer side. This molded portion is a tab 2 located at the center of the lead frame 7.
3 shows a pair of fingers 4 that extend toward the tabs 2 and that are the tips of the fingers 4.
The finger 4 includes a flat finger base 4b, a connecting portion 4c extending obliquely from the base 4b, and a tip 4d extending from the connecting portion 4c substantially parallel to the finger base 4b. The tab 2 is not particularly necessary.

【0011】次いで、上記の如く変形された積層体の金
属層10上に再び電鋳を施し、図4の如き銅、ニッケル
等の第2の金属層11を積層する。この電鋳加工におい
ては、平坦なフィンガ基部4b、先端部4dに対して連
結部4cは傾斜した位置にあるため、電鋳による金属層
11は連結部4cではその成長速度が遅い。
Next, electroforming is performed again on the metal layer 10 of the laminated body deformed as described above, and the second metal layer 11 of copper, nickel or the like as shown in FIG. 4 is laminated. In this electroforming process, since the connecting portion 4c is inclined with respect to the flat finger base portion 4b and the tip portion 4d, the growth rate of the electroformed metal layer 11 is slow in the connecting portion 4c.

【0012】また、フィンガ4の先端部4dは細い頸部
によって連結部4cに連結されているため、電流密度が
大きくなり、金属はこの部分でより成長する。従って、
図からもわかるように連結部4cの肉厚t2はフィンガ
基部4bの肉厚t1より小さく最小で、先端部4dの肉
厚t3は最大(t3>t1>t2)となる。
Further, since the tip portion 4d of the finger 4 is connected to the connecting portion 4c by the thin neck portion, the current density is increased and the metal grows more in this portion. Therefore,
As can be seen from the figure, the wall thickness t2 of the connecting portion 4c is smaller than the wall thickness t1 of the finger base portion 4b and is minimum, and the wall thickness t3 of the tip portion 4d is maximum (t3>t1> t2).

【0013】更に図5に示すように、フィンガ4の先端
部4dには金,すず,半田の如き材料からなる接触材1
2が塗布される。この接触材12は半導体チップ1の一
般的なアルミニウム電極1aとの接続をより良好にする
ためのもので、レジスト層13により他の部分を被覆し
た状態で、フィンガ4の先端部4d上面に塗布もしくは
メッキを施せばよい。
Further, as shown in FIG. 5, a contact member 1 made of a material such as gold, tin or solder is attached to the tip 4d of the finger 4.
2 is applied. This contact material 12 is for improving the connection with the general aluminum electrode 1a of the semiconductor chip 1, and is applied to the upper surface of the tip end portion 4d of the finger 4 with the resist layer 13 covering the other portion. Alternatively, it may be plated.

【0014】最後に積層体から基板8のみを剥離すれ
ば、図6に示す如きフィンガ4をもつリードフレーム7
が得られる。得られたフィンガ4の先端部4dはその突
出方向に厚みをもつバンプのような接続部4aを構成
し、薄肉の連結部4cによって適度な可撓性を与えられ
ることになる。
Finally, if only the substrate 8 is peeled from the laminated body, the lead frame 7 having the fingers 4 as shown in FIG. 6 is obtained.
Is obtained. The tip portion 4d of the obtained finger 4 constitutes a connecting portion 4a having a thickness in the protruding direction, such as a bump, and the thin connecting portion 4c provides appropriate flexibility.

【0015】特に連結部4cの肉厚t2を小さくするこ
とにより、半導体チップとの接合時の加工力を緩和させ
てフィンガ基部4bの変形、横ずれを防止することがで
き、この部分をバッファ領域として利用できる。
In particular, by reducing the wall thickness t2 of the connecting portion 4c, it is possible to reduce the processing force at the time of joining with the semiconductor chip and prevent the finger base portion 4b from being deformed or laterally displaced. This portion serves as a buffer region. Available.

【0016】このバッファ領域は、前記プレス加工法を
用いれば、先端部4dを作るときのプレス加工によって
同時に得られるので、特別な加工を必要とせず、加工の
簡素化が図れる。図7ないし図10は、本発明の変形例
を示す製造工程説明図である。
By using the above-mentioned press working method, this buffer area can be obtained at the same time by the press working when making the tip portion 4d, so that no special working is required and the working can be simplified. 7 to 10 are manufacturing process explanatory diagrams showing a modified example of the present invention.

【0017】即ち、図7に示すように、まずはじめに基
板8上にレジスト層9を形成した状態で第一次の電鋳加
工を行う点は前記実施例と同様である。但し、基板8の
非レジスト部上には予め金,すず,半田等の接触材12
を塗布もしくはメッキを施しておく。
That is, as shown in FIG. 7, the first electroforming process is performed in the state where the resist layer 9 is formed on the substrate 8 as in the first embodiment. However, a contact material 12 such as gold, tin, or solder is previously formed on the non-resist portion of the substrate 8.
Is applied or plated.

【0018】次に図8に示すように積層体全体にプレス
加工を施し、基板8を突出するようにフィンガ相当部分
を折り曲げる。折り曲げ形状は前記の実施例と同様にフ
ィンガ基部4b、連結部4c、先端部4dから構成され
るものであるが、先端部4dの下面には同様にバンプの
ような接続部4aをプレスにより形成する。
Next, as shown in FIG. 8, the entire laminated body is subjected to press working, and the portions corresponding to the fingers are bent so that the substrate 8 is projected. The bent shape is composed of the finger base portion 4b, the connecting portion 4c, and the tip portion 4d as in the above-described embodiment, and the connection portion 4a such as a bump is similarly formed by pressing on the lower surface of the tip portion 4d. To do.

【0019】次いで金属層10上に第二次の電鋳加工を
施し、図9の如き第2の金属層11を金属層10上に形
成する。この際前述したように先端部4d、フィンガ基
部4b、連結部4cの順でその肉厚は大きく形成され
る。
Next, a second electroforming process is performed on the metal layer 10 to form a second metal layer 11 on the metal layer 10 as shown in FIG. At this time, as described above, the wall thickness is increased in the order of the tip portion 4d, the finger base portion 4b, and the connecting portion 4c.

【0020】最後に基板8を剥離すれば図10の如き形
状のフィンガ4を有するリードフレーム7が得られる。
特にこの場合には、フィンガ4の半導体チップと接合す
る側が、基板8のプレス形状及び寸法そのままとなるた
め、プレス精度に応じてフィンガ4の精度を向上させる
ことができ、より一層多ピン化に対応できる。
Finally, when the substrate 8 is peeled off, the lead frame 7 having the fingers 4 having the shape as shown in FIG. 10 is obtained.
Particularly, in this case, the side of the finger 4 to be joined to the semiconductor chip remains the press shape and size of the substrate 8, so that the accuracy of the finger 4 can be improved according to the press accuracy, and the number of pins can be further increased. Can handle.

【0021】なお上記実施例では、一次及び二次電鋳に
よる二層金属層を一体として用いたが、一次電鋳と二次
電鋳との間に剥離処理を行い二次電鋳金属層だけを用い
てリードフレームを得ることもでき、この時は一次電鋳
金属材は例えば銅のような二次電鋳材のニッケルと比較
して安価な材質を使用できる。
Although the two-layer metal layers formed by primary and secondary electroforming are integrally used in the above-mentioned embodiment, only the secondary electroformed metal layer is subjected to the peeling treatment between the primary electroforming and the secondary electroforming. It is also possible to obtain a lead frame by using, and at this time, the primary electroformed metal material can be made of an inexpensive material as compared with nickel, which is a secondary electroformed material such as copper.

【0022】また、レジスト層9を形成しただけの基板
8をまず所望形状にプレス加工し、その後一次電鋳、も
しくは一次電鋳と二次電鋳をし、基板8からこの電鋳に
よる金属層を剥離してそのままリードフレームとするこ
とも可能である。
Further, the substrate 8 only having the resist layer 9 formed thereon is first pressed into a desired shape, and then primary electroforming, or primary electroforming and secondary electroforming are carried out, and the substrate 8 is subjected to this electroforming to form a metal layer. It is also possible to peel off and use the lead frame as it is.

【0023】このように上記実施例では、フィンガを含
むリードフレームは基本的に電鋳によって形成されるか
ら、プレス成形によって打ち抜き成形するのが困難な多
数フィンガをもつリードフレームであっても、エッチン
グ等の安価な製造方法を用いることなく容易に成形する
ことができるとともに、フィンガ先端のバンプ及びバン
プを支持する可撓性を有する連結部を第二次の電鋳によ
り同時にかつ容易に成形することができるものである。
As described above, in the above-described embodiment, since the lead frame including the fingers is basically formed by electroforming, even a lead frame having a large number of fingers which is difficult to punch by press molding is etched. It can be easily formed without using an inexpensive manufacturing method such as, etc., and at the same time, it is possible to easily form the bumps at the tips of the fingers and the flexible connecting portions that support the bumps by secondary electroforming at the same time. Can be done.

【0024】このようなフィンガを配したリードフレー
ム7を用いて半導体チップ1と接続する際には、まずリ
ードフレーム7のフィンガ先端のバンプ状接続部4aを
電極1aに対向するよう位置合わせを行い、次いで接続
部4aの背面側からボンディングツールで加熱加圧し金
−アルミニウム合金が形成され接続する。この加圧時、
この加圧力は接続部4aを加圧方向に押し曲げ変形する
よう作用し、この力がフィンガ基部1まで伝達し影響を
与えようとするが、接続部4aとフィンガ基部4bとの
間に連結部4cを配し、この連結部4cがフィンガ基部
4bより大きな可撓性を発揮するため、上記加圧力は柔
軟な連結部4cで緩和され、フィンガ基部4bへの影響
を軽減できる。これは相対的に、半導体チップ1側をフ
ィンガ4側へ押圧加工する場合でも同様である。なおバ
ンプ部分の接合された部分の周囲は金等で被覆されてい
るので、酸化防止が図られる。
When connecting to the semiconductor chip 1 using the lead frame 7 having such fingers, first, the bump-shaped connecting portions 4a at the tips of the fingers of the lead frame 7 are aligned so as to face the electrodes 1a. Then, a gold-aluminum alloy is formed by heating and pressurizing with a bonding tool from the back surface side of the connection portion 4a for connection. During this pressurization,
This pressing force acts so as to push and deform the connecting portion 4a in the pressurizing direction, and this force is transmitted to the finger base portion 1 to exert an influence, but the connecting portion between the connecting portion 4a and the finger base portion 4b is affected. 4c is arranged, and the connecting portion 4c exhibits greater flexibility than the finger base portion 4b. Therefore, the above-mentioned pressing force is relieved by the flexible connecting portion 4c, and the influence on the finger base portion 4b can be reduced. This is relatively the same even when the semiconductor chip 1 side is pressed to the finger 4 side. Since the periphery of the bonded portion of the bump portion is covered with gold or the like, it is possible to prevent oxidation.

【0025】したがって、接続部4aと電極1aとの接
合に傾きが発生しても、この接続部4aに続く連結部4
cがこの傾きを吸収し、フィンガ基部(一般に接続部よ
りも幅広くなっているが)までもが傾きあるいは、横ず
れを発生し隣接するフィンガとのピッチが乱れることも
なく、接続作業を容易にすることができる。
Therefore, even if the joint between the connecting portion 4a and the electrode 1a is inclined, the connecting portion 4 following the connecting portion 4a is formed.
c absorbs this inclination, and even the finger base portion (which is generally wider than the connection portion) is inclined, or lateral displacement does not occur and the pitch with adjacent fingers is not disturbed, and the connection work is facilitated. be able to.

【0026】[0026]

【発明の効果】以上のように本発明によれば、フィンガ
4に、半導体チップ1の電極と接続するバンプ状接続部
4aを配し、該接続部4aの上記接続面側を金,すず,
半田等の接触材12で被覆してなるので、半導体チップ
の電極1aとフィンガ先端の接続部4aとの接続が確実
に行なわれ、また接続部4aは過剰に酸化することなく
保護でき、特にこれらのための金素材等の高価な接触材
12の使用量を削減でき、コストを低下させることがで
きる。
As described above, according to the present invention, the bump-shaped connecting portion 4a for connecting to the electrode of the semiconductor chip 1 is arranged on the finger 4, and the connecting surface side of the connecting portion 4a is made of gold, tin,
Since it is covered with the contact material 12 such as solder, the connection between the electrode 1a of the semiconductor chip and the connection portion 4a at the tip of the finger is surely performed, and the connection portion 4a can be protected without being excessively oxidized. It is possible to reduce the amount of expensive contact material 12 such as a gold material used, and to reduce the cost.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例におけるリードフレームの製造
工程の説明図でレジスト層形成工程である。
FIG. 1 is an explanatory diagram of a lead frame manufacturing process in an embodiment of the present invention, which is a resist layer forming process.

【図2】同製造工程の金属層形成工程である。FIG. 2 is a metal layer forming step of the same manufacturing process.

【図3】同製造工程の折曲加工工程である。FIG. 3 is a bending process of the manufacturing process.

【図4】同製造工程の第2金属層形成工程である。FIG. 4 is a second metal layer forming step in the same manufacturing process.

【図5】同製造工程の接点材形成工程である。FIG. 5 is a contact material forming step in the same manufacturing process.

【図6】同製造工程により得られたリードフレームであ
る。
FIG. 6 is a lead frame obtained by the same manufacturing process.

【図7】別の実施例におけるリードフレームの製造工程
の説明でレジスト層形成工程である。
FIG. 7 is a resist layer forming step in the description of the lead frame manufacturing step in another example.

【図8】同製造工程のプレス加工工程である。FIG. 8 is a press working process of the same manufacturing process.

【図9】同製造工程の第2金属層形成工程である。FIG. 9 is a second metal layer forming step in the same manufacturing process.

【図10】同製造工程により得られたリードフレームで
ある。
FIG. 10 is a lead frame obtained by the manufacturing process.

【図11】本発明を用いる一般的なリードフレームの平
面図である。
FIG. 11 is a plan view of a general lead frame using the present invention.

【図12】フィンガ先端のバンプと半導体チップの電極
との関係を示す断面図である。
FIG. 12 is a cross-sectional view showing the relationship between bumps at the tips of fingers and electrodes of a semiconductor chip.

【符号の説明】[Explanation of symbols]

1 半導体チップ 1a 電極 4 フィンガ 4a 接続部 4b フィンガ基部 4c 連結部 4d フィンガ先端部 1 Semiconductor Chip 1a Electrode 4 Finger 4a Connection Part 4b Finger Base 4c Connection Part 4d Finger Tip

───────────────────────────────────────────────────── フロントページの続き (72)発明者 坂田 栄二 福岡県田川郡方城町大字伊方4680番地 九 州日立マクセル株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Eiji Sakata, Eiji Sakata 4680 Ikata, Hachijo-machi, Tagawa-gun, Fukuoka Prefecture Kyushu Hitachi Maxell, Ltd.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 フィンガ(4)に、半導体チップ(1)
の電極と接続するバンプ状接続部(4a)を配し、該接
続部(4a)の上記接続面側を金,すず,半田等の接触
材(12)で被覆してなる半導体装置。
1. A semiconductor chip (1) is attached to a finger (4).
A semiconductor device in which a bump-shaped connecting portion (4a) for connecting to the electrode is arranged, and the connecting surface side of the connecting portion (4a) is covered with a contact material (12) such as gold, tin or solder.
JP4146513A 1992-05-11 1992-05-11 Semiconductor device Expired - Lifetime JPH0817220B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4146513A JPH0817220B2 (en) 1992-05-11 1992-05-11 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4146513A JPH0817220B2 (en) 1992-05-11 1992-05-11 Semiconductor device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP11798392A Division JPH07106481A (en) 1992-04-10 1992-04-10 Semiconductor device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP33787494A Division JP2509882B2 (en) 1994-12-26 1994-12-26 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPH05267546A true JPH05267546A (en) 1993-10-15
JPH0817220B2 JPH0817220B2 (en) 1996-02-21

Family

ID=15409344

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4146513A Expired - Lifetime JPH0817220B2 (en) 1992-05-11 1992-05-11 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0817220B2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS556862A (en) * 1978-06-29 1980-01-18 Seiko Instr & Electronics Ltd Mounting structure of ic for electronic timepiece

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS556862A (en) * 1978-06-29 1980-01-18 Seiko Instr & Electronics Ltd Mounting structure of ic for electronic timepiece

Also Published As

Publication number Publication date
JPH0817220B2 (en) 1996-02-21

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