JPH05267493A - Hybrid integrated circuit - Google Patents

Hybrid integrated circuit

Info

Publication number
JPH05267493A
JPH05267493A JP4060089A JP6008992A JPH05267493A JP H05267493 A JPH05267493 A JP H05267493A JP 4060089 A JP4060089 A JP 4060089A JP 6008992 A JP6008992 A JP 6008992A JP H05267493 A JPH05267493 A JP H05267493A
Authority
JP
Japan
Prior art keywords
board
circuit board
integrated circuit
hybrid integrated
connector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4060089A
Other languages
Japanese (ja)
Inventor
Toshiaki Doi
利章 土居
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Steel Corp
Original Assignee
Sumitomo Metal Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Metal Industries Ltd filed Critical Sumitomo Metal Industries Ltd
Priority to JP4060089A priority Critical patent/JPH05267493A/en
Publication of JPH05267493A publication Critical patent/JPH05267493A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/403Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To easily mount many types of electronic components and to suppress an increase in a cost by providing a plurality of side face through holes in the side face of a circuit board mounted with the components and fixing it by the use of a connector of a shape which is engaged with the side face through holes. CONSTITUTION:Connectors 32 each having an L-shaped terminal 51 is arranged at both ends of a circuit board 31. Board small pieces 33a, 33b for preventing flow of resin are arranged on upper and lower surface of a longitudinal end of the board 31. A flat plate 34 for absorbing a mounter is arranged on an upper part of the connector 32. Side face through holes 41 are formed at a predetermined interval on both side faces of the board 31, and solder pads 42 for soldering the pieces 33a are formed on upper surfaces of longitudinal ends of the board 31. Solder pads 42 for soldering the pieces 33b are similarly formed on the rear of both ends of the board 31 in the longitudinal direction. Conductors and resistors are formed on the board 31, and electronic component elements 35 are further mounted.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は混成集積回路に関し、よ
り詳細にはマザーボードと呼ばれる他の大型基板に実装
される混成集積回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit, and more particularly to a hybrid integrated circuit mounted on another large board called a motherboard.

【0002】[0002]

【従来の技術】従来、この種混成集積回路としては、図
6に示したモジュール構造のものが広く使用されてい
る。
2. Description of the Related Art Conventionally, as this kind of hybrid integrated circuit, a module structure shown in FIG. 6 has been widely used.

【0003】図中11はセラミック等により形成された
基板を示しており、基板11の表面には導体や抵抗素子
を含む膜集積回路12が形成され、膜集積回路12上に
はコンデンサチップ13や半導体チップ14が実装され
ている。また膜集積回路12には端子パッド(図示せ
ず)が形成されており、この端子パッドにはリード端子
15が接続されて、混成集積回路素子10が構成されて
いる。この混成集積回路素子10は樹脂等からなる封止
材16によって覆われている。
Reference numeral 11 in the figure shows a substrate formed of ceramics or the like. A film integrated circuit 12 including conductors and resistance elements is formed on the surface of the substrate 11, and a capacitor chip 13 and a capacitor chip 13 are formed on the film integrated circuit 12. The semiconductor chip 14 is mounted. Further, a terminal pad (not shown) is formed on the film integrated circuit 12, and the lead terminal 15 is connected to this terminal pad to form the hybrid integrated circuit element 10. The hybrid integrated circuit element 10 is covered with a sealing material 16 made of resin or the like.

【0004】図6に示した混成集積回路はリード端子1
5が基板11の一方の側から引き出されたSIP(Sing
le in Package)構造と呼ばれるものである。
The hybrid integrated circuit shown in FIG.
5 is a SIP (Sing
(le in Package) structure.

【0005】又、基板11の両側からリード端子15が
引き出されたDIP(Dual in Package )構造と呼ばれ
るものもある。
There is also a so-called DIP (Dual in Package) structure in which lead terminals 15 are drawn out from both sides of the substrate 11.

【0006】更に近年、モノリシックICで多く用いら
れているトランスファーモールド構造の混成集積回路も
ある。図7はトランスファーモールド構造の混成集積回
路を示す概略斜視図である。図中20はリードフレーム
を示しており、リードフレーム20の上面には接着剤2
7を介して基板22が固定されており、この基板22の
上面には導体配線21が形成され、導体配線21上には
半導体チップ23や薄膜抵抗アレイ24等が搭載されて
いる。また、リードフレーム20と導体配線21及び半
導体チップ23や薄膜抵抗アレイ24等とを電気的に接
続するためにワイヤボンディングによる金線25が施こ
され、混成集積回路素子29が構成されている。この混
成集積回路素子29の外側を覆うためにエポキシ樹脂2
6が低圧トランスファにより形成されている。このよう
に構成された混成集積回路によれば、モノリシックIC
と同様のパッケージ構造であるため自動実装が可能であ
り、しかもリフローハンダ付けが可能である。
Further, in recent years, there is a hybrid integrated circuit having a transfer mold structure which is widely used in monolithic ICs. FIG. 7 is a schematic perspective view showing a hybrid integrated circuit having a transfer mold structure. Reference numeral 20 in the drawing denotes a lead frame, and an adhesive 2 is provided on the upper surface of the lead frame 20.
The substrate 22 is fixed via the substrate 7, the conductor wiring 21 is formed on the upper surface of the substrate 22, and the semiconductor chip 23, the thin film resistor array 24, and the like are mounted on the conductor wiring 21. Further, a gold wire 25 by wire bonding is applied to electrically connect the lead frame 20, the conductor wiring 21, the semiconductor chip 23, the thin film resistor array 24, etc., and a hybrid integrated circuit element 29 is configured. To cover the outside of the hybrid integrated circuit element 29, epoxy resin 2
6 is formed by a low voltage transfer. According to the hybrid integrated circuit configured as described above, a monolithic IC
Since the package structure is the same as that of (1), automatic mounting is possible and reflow soldering is possible.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、図6で
示したモジュール構造の混成集積回路は、大型電子回路
基板(以下マザーボードと称す)に実装する際、マザー
ボードにリード端子15にあうスルーホールを形成し、
リード端子15を前記スルーホールに挿入してハンダ付
を行う必要がある。リード端子15をスルーホールに正
確に挿入する作業は、高い精度が必要となり、自動化は
難しいことからこの工程は手作業で行なわれており、コ
ストが高くなるという課題があった。また封止材16に
より混成集積回路素子10の外側を被覆する際には封止
材16の溶液に混成集積回路素子10を浸漬して取り出
すという方法が取られていたため、取り出された封止材
16の表面が凸凹になり、平な面が得られるとは限ら
ず、マウンターによる実装を行うことができない場合も
生じるという課題もあった。
However, when the hybrid integrated circuit having the module structure shown in FIG. 6 is mounted on a large electronic circuit board (hereinafter referred to as a mother board), a through hole corresponding to the lead terminal 15 is formed on the mother board. Then
It is necessary to insert the lead terminal 15 into the through hole for soldering. Since the work of accurately inserting the lead terminal 15 into the through hole requires high precision and automation is difficult, this process is performed manually, and there is a problem that the cost becomes high. Further, when the outside of the hybrid integrated circuit element 10 is covered with the encapsulating material 16, a method of immersing the hybrid integrated circuit element 10 in a solution of the encapsulating material 16 and taking it out has been adopted. There is also a problem that the surface of 16 becomes uneven and a flat surface is not always obtained, and there are cases where mounting by a mounter cannot be performed.

【0008】一方、図7に示したトランスファーモール
ド構造の混成集積回路ではマザーボードに実装する際の
工程の自動化に関しては問題はない。しかし、この混成
集積回路の場合は、パッケージの形が一定であるため、
従来の混成集積回路の特徴であるあらゆる電子回路部品
の高密度実装を実現することが不可能であり、特にトラ
ンス等の高さのある異形部品を取りつけることは不可能
であった。従って、トランスファモールド構造に対応で
きていない電子回路部品の高密度実装を実現するために
は新たにパッケージを作る必要があり、このためには新
たな金型を製作する必要が生じコストが高くなり、時間
も要するという課題があった。
On the other hand, in the hybrid integrated circuit having the transfer mold structure shown in FIG. 7, there is no problem in automating the step of mounting on the motherboard. However, in the case of this hybrid integrated circuit, since the package shape is constant,
It has been impossible to realize high-density mounting of all electronic circuit parts, which is a feature of conventional hybrid integrated circuits, and it has been impossible to mount particularly high-profile parts such as transformers. Therefore, in order to realize high-density mounting of electronic circuit components that are not compatible with the transfer mold structure, it is necessary to make a new package, and for this purpose it is necessary to make a new mold, which increases the cost. There was a problem that it took time.

【0009】本発明はこのような課題に鑑み発明された
ものであって、あらゆる電子回路部品の搭載に容易に対
応することができ、コストの上昇を招くこともなく、し
かも開発に要する時間を短縮することができ、更にはマ
ウンターによる自動実装を確実に行なうことができる混
成集積回路を提供することを目的としている。
The present invention has been invented in view of the above problems, and can easily accommodate mounting of any electronic circuit component, does not cause an increase in cost, and requires time for development. It is an object of the present invention to provide a hybrid integrated circuit that can be shortened and that can be reliably mounted automatically by a mounter.

【0010】[0010]

【発明を解決するための手段】上記目的を達成するため
に本発明に係る混成集積回路は、電子部品が搭載された
回路基板の側面に複数の側面スルーホールを有し、これ
ら側面スルーホールに嵌合する形状のコネクタが固定さ
れていることを特徴とし、また、上記記載の混成集積回
路において回路基板の上方に平板が配設されていること
を特徴としている。
In order to achieve the above object, a hybrid integrated circuit according to the present invention has a plurality of side surface through holes on a side surface of a circuit board on which electronic components are mounted, and these side surface through holes are formed in the side surface through holes. It is characterized in that the connector having a fitting shape is fixed, and in the above hybrid integrated circuit, a flat plate is arranged above the circuit board.

【0011】さらには、上記記載の混成集積回路におい
て電子部品が搭載された回路基板上に樹脂が充填されて
いることを特徴としている。
Further, the hybrid integrated circuit described above is characterized in that a circuit board on which electronic components are mounted is filled with resin.

【0012】[0012]

【作用】上記構成によれば、電子部品が搭載された回路
基板の側面に複数の側面スルーホールを有し、これら側
面スルーホールに嵌合する形状のコネクタが固定されて
おり、前記側面スルーホールを一定の間隔で形成し、前
記コネクタには前記間隔と同間隔でスナップストリップ
を形成しておけば、このスナップストリップが切り目の
役割を果たし、前記回路基板の大きさに変更が生じて
も、スナップストリップを利用して前記コネクタを折り
切ることにより、前記コネクタの大きさを前記回路基板
の大きさに容易に合わせることが可能である。
According to the above construction, the side surface of the circuit board on which the electronic component is mounted has a plurality of side surface through holes, and the connector having a shape fitted into these side surface through holes is fixed. If a snap strip is formed on the connector at a constant interval and at the same interval as the interval, the snap strip serves as a cut line, and even if the size of the circuit board is changed, By breaking the connector using a snap strip, the size of the connector can be easily adjusted to the size of the circuit board.

【0013】また、前記回路基板の上方に平板が配設さ
れている場合には、マウンターによる自動実装が確実に
行なえることとなる。
Further, when the flat plate is arranged above the circuit board, automatic mounting by the mounter can be surely performed.

【0014】さらに、電子部品が搭載された回路基板上
に樹脂が充填されている場合には、前記電子部品を湿気
等から完全に保護することができ、耐湿性が向上する。
Further, when the circuit board on which the electronic parts are mounted is filled with resin, the electronic parts can be completely protected from moisture and the like, and the moisture resistance is improved.

【0015】[0015]

【実施例】以下本発明に係る混成集積回路の実施例を図
面に基づいて説明する。図1は実施例に係る表面実装型
の混成集積回路を示す斜視図であり、図2は図1に示し
た混成集積回路を裏面側から見た分解斜視図である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a hybrid integrated circuit according to the present invention will be described below with reference to the drawings. FIG. 1 is a perspective view showing a surface-mounted hybrid integrated circuit according to an embodiment, and FIG. 2 is an exploded perspective view of the hybrid integrated circuit shown in FIG.

【0016】図中31はアルミナセラミックスからなる
回路基板を示しており、回路基板31の両側端部にはL
字状の端子51を備えたコネクタ32が配設されてお
り、回路基板31の長さ方向端部上下面には樹脂流れ止
め用の基板小片33a、33bが配設されている。また
コネクタ32の上部間にはマウンター吸着用の平板34
が配設されている。
Reference numeral 31 in the drawing denotes a circuit board made of alumina ceramics, and L is provided at both end portions of the circuit board 31.
A connector 32 having character-shaped terminals 51 is provided, and resin small pieces 33a and 33b for resin flow stop are provided on the upper and lower surfaces of the end portion in the length direction of the circuit board 31. A flat plate 34 for mounting the mounter is provided between the upper portions of the connectors 32.
Are arranged.

【0017】回路基板31の構造を図3(a)、(b)
に基づいて更に詳しく説明する。回路基板31の両側面
には一定の間隔で側面スルーホール41が形成されてお
り、回路基板31の長さ方向両端部上面にはそれぞれ基
板小片33aをハンダ付けするためのハンダパッド42
が形成さており、また回路基板31の長さ方向両端部裏
面にも同様に基板小片33bをハンダ付けするためのハ
ンダパッド42(図2)が形成されている。回路基板3
1上には厚膜印刷を用いて導体、抵抗体(図示せず)が
形成され、回路基板31上面には電子部品素子35が搭
載されている。
The structure of the circuit board 31 is shown in FIGS. 3 (a) and 3 (b).
Will be described in more detail based on. Side through holes 41 are formed at regular intervals on both side surfaces of the circuit board 31, and solder pads 42 for soldering the board pieces 33a are soldered on the upper surfaces of both ends in the length direction of the circuit board 31, respectively.
Further, solder pads 42 (FIG. 2) for soldering the board pieces 33b are also formed on the back surfaces of the both ends in the length direction of the circuit board 31. Circuit board 3
A conductor and a resistor (not shown) are formed on the substrate 1 using thick film printing, and the electronic component element 35 is mounted on the upper surface of the circuit board 31.

【0018】またコネクタ32の構造を図4(a)〜
(c)に基づいて更に詳しく説明する。コネクタ32の
内側面には半円形状の樹脂部分39が形成され、この樹
脂部分39にL字状の端子51が固定されている。つま
りコネクタ32は樹脂部分39と端子51とが一体化さ
れて構成されいる。また、コネクタ32は通常多数の樹
脂部分39が連結された形で構成されており、これら樹
脂部分39間には側面スルーホール41と同等の一定の
間隔でスナップストリップ56が形成されている。
The structure of the connector 32 is shown in FIG.
A more detailed description will be given based on (c). A semicircular resin portion 39 is formed on the inner side surface of the connector 32, and an L-shaped terminal 51 is fixed to the resin portion 39. That is, the connector 32 is configured by integrating the resin portion 39 and the terminal 51. Further, the connector 32 is usually formed by connecting a large number of resin portions 39, and snap strips 56 are formed between these resin portions 39 at the same constant intervals as the side surface through holes 41.

【0019】端子51は上記したようにL字状に形成さ
れており、混成集積回路をマザーボードに実装する際、
マザーボードにスルーホールを形成することなく表面実
装することができるようになっている。また端子51は
黄銅あるいは銅を用いて形成され、その表面にはNiめ
っき及びAuめっきが施されており、端子51の水平部
51aはマザーボードにリフローでハンダ接続できる程
度に十分平らに形成されている。
The terminal 51 is formed in an L-shape as described above, and when the hybrid integrated circuit is mounted on the mother board,
It can be surface-mounted without forming through holes on the motherboard. The terminal 51 is made of brass or copper, and the surface thereof is plated with Ni and Au. The horizontal portion 51a of the terminal 51 is flat enough to be soldered to the motherboard by reflow. There is.

【0020】樹脂部分39は電気的絶縁性及びリフロー
時の熱に十分耐え得る耐熱性に富んだPPS(Polyphen
ylene sulfide )等の樹脂を用いて形成されている。樹
脂部分39の端子51が出ている下面側には、高さ数m
mのスタンドオフ39aが形成されており、反対の上面
側にもスタンドオフ39aよりは高さの低いスタンドオ
フ39bが形成されている。
The resin portion 39 is made of PPS (Polyphen), which is rich in electrical insulation and heat resistance enough to withstand heat during reflow.
It is formed using a resin such as ylene sulfide). On the lower surface side where the terminals 51 of the resin portion 39 are exposed, a height of several meters
m standoffs 39a are formed, and a standoff 39b having a height lower than that of the standoffs 39a is also formed on the opposite upper surface side.

【0021】また、回路基板31とコネクタ32とを接
続する際、側面スルーホール41とコネクタ32の端子
51とを嵌合させるために、端子51の太さは回路基板
31に形成された側面スルーホール41に比べて小さく
設定されている。従って側面スルーホール41にコネク
タ32の端子51が入り込み、回路基板31のサイドエ
ッジがスタンドオフ39aに当たりすきまなく固定され
るようになっている。また、電子部品素子35などが搭
載されている回路基板31上を樹脂で封止する際、樹脂
の流れ止めとして作用するようにスタンドオフ39aの
高さは回路基板31の厚さよりも十分高く設定されてい
る。また、スタンドオフ39bはマウンター吸着用の平
板34を固定するためのものである。
When connecting the circuit board 31 and the connector 32, the thickness of the terminal 51 is set to the side surface through hole formed on the circuit board 31 so that the side through hole 41 and the terminal 51 of the connector 32 are fitted together. It is set smaller than the hole 41. Therefore, the terminals 51 of the connector 32 enter the side through holes 41, and the side edges of the circuit board 31 hit the standoffs 39a and are fixed without any clearance. Further, when the circuit board 31 on which the electronic component element 35 and the like are mounted is sealed with resin, the height of the standoff 39a is set sufficiently higher than the thickness of the circuit board 31 so as to act as a resin flow stop. Has been done. The standoff 39b is for fixing the flat plate 34 for mounting the mounter.

【0022】基板小片33a、33bの構造を図5に基
づいて説明する。
The structure of the substrate pieces 33a and 33b will be described with reference to FIG.

【0023】基板小片33a、33bはプリント基板の
小片等を用いて形成されており、その下面あるいは上面
にはハンダ付けが可能なように銅泊60で形成されてい
る。この基板小片33a、33bは耐湿性の向上のため
に、回路基板31の部品搭載面を樹脂で封止する際、硬
化する前の前記液状樹脂が流出するのを防止する役割を
有している。
The board pieces 33a, 33b are formed by using pieces of a printed board or the like, and a copper foil 60 is formed on the lower surface or the upper surface thereof so that soldering is possible. The board pieces 33a and 33b have a role of preventing the liquid resin before being cured from flowing out when the component mounting surface of the circuit board 31 is sealed with resin in order to improve the moisture resistance. .

【0024】次に上記構成の混成集積回路の製造方法に
ついて説明する。
Next, a method of manufacturing the hybrid integrated circuit having the above structure will be described.

【0025】まず、レーザーまたは金型あるいは両者の
併用による打ち抜き成形によってある一定の間隔で形成
された側面スルーホール41を有する回路基板31を作
製し、この回路基板31にハンダパッド42を形成後、
回路基板31に電子部品素子35及びダム用基板小片3
3a、33bをリフローにてハンダ付けを行ない、回路
基板31の側面スルーホール41部分にL字状のコネク
タ32の端子51を嵌合し、ハンダ付けを行なう。その
後部品搭載面全体をエポキシ樹脂等で封止を行ない、次
にコネクタ32上部のスタンドオフ39b部分に接着剤
を用いて平板34を装着する。
First, a circuit board 31 having side through-holes 41 formed at regular intervals by punching using a laser or a metal mold or a combination of both is produced, and solder pads 42 are formed on the circuit board 31.
The circuit board 31 has the electronic component element 35 and the dam substrate piece 3
3a and 33b are soldered by reflow, and the terminals 51 of the L-shaped connector 32 are fitted to the side surface through holes 41 of the circuit board 31 and soldered. After that, the entire component mounting surface is sealed with epoxy resin or the like, and then the flat plate 34 is attached to the standoff 39b portion above the connector 32 using an adhesive.

【0026】なお、回路基板31に対する電子部品素子
35の実装は片面あるいは両面のどちらでもよく、又全
体を樹脂封止するため、従来多く使われているAg/P
d、Ag/Ptで導体を形成した厚膜基板を用いてもよ
い。また回路基板31はセラミックス基板、樹脂基板、
厚膜多層基板、金属基板等であってもよい。
The electronic component element 35 may be mounted on the circuit board 31 on either one side or both sides, and since the whole is resin-sealed, Ag / P, which is widely used in the past, is used.
A thick film substrate having a conductor formed of d or Ag / Pt may be used. The circuit board 31 is a ceramic board, a resin board,
It may be a thick film multilayer substrate, a metal substrate or the like.

【0027】上記実施例に係る混成集積回路にあっては
回路基板31側面には一定の間隔で側面スルーホール4
1が形成され、コネクタ32には前記間隔と同間隔でス
ナップストリップ56が形成されているので、回路基板
31の大きさに応じてこのスナップストリップ56に沿
って、コネクタ32を自在の大きさに折り切ることがで
きる。従ってコネクタ32の大きさを回路基板31の大
きさに容易に自在に合わせることができ、回路基板31
にはあらゆる電子部品の搭載が可能となり、回路基板3
1に搭載される電子部品が変更されても従来のように新
たにパッケージを作製する必要がなく、新たな金型作製
のために大幅なコストの上昇を招くといったことをなく
すことができる。また開発のために長時間を要するとい
ったこともなくすことができる。
In the hybrid integrated circuit according to the above embodiment, the side surface through holes 4 are formed on the side surface of the circuit board 31 at regular intervals.
1 is formed and the snap strips 56 are formed in the connector 32 at the same intervals as described above, so that the connector 32 can be freely sized along the snap strips 56 according to the size of the circuit board 31. You can break it. Therefore, the size of the connector 32 can be easily and freely adjusted to the size of the circuit board 31.
All electronic parts can be mounted on the circuit board 3
Even if the electronic component mounted on the No. 1 is changed, it is not necessary to manufacture a new package as in the conventional case, and it is possible to prevent a significant increase in cost for manufacturing a new mold. Moreover, it does not require a long time for development.

【0028】さらに、回路基板31の上方には平板34
が配設されているのでマウンターによる自動実装を確実
に行なうことができる。従って、端子51の形状と相ま
ってリフローによるマザーボードへの自動ハンダ付けが
容易となる。
Further, a flat plate 34 is provided above the circuit board 31.
Since it is provided, the automatic mounting by the mounter can be surely performed. Therefore, in combination with the shape of the terminal 51, automatic soldering to the mother board by reflow becomes easy.

【0029】さらに、電子部品素子35が搭載された回
路基板31上に樹脂が充填されているので、電子部品素
子35を保護することができ、耐湿性を向上させること
ができる。
Furthermore, since the circuit board 31 on which the electronic component element 35 is mounted is filled with resin, the electronic component element 35 can be protected and the moisture resistance can be improved.

【0030】[0030]

【発明の効果】以上詳述したように本発明に係る混成集
積回路においては、電子部品が搭載された回路基板の側
面に複数の側面スルーホールを有し、これら側面スルー
ホールに嵌合する形状のコネクタが固定されており、前
記スルーホールを一定の間隔で形成し、前記コネクタに
は前記間隔と同間隔でスナップストリップを形成してお
けば、このスナップストリップが切り目の役割を果た
し、前記回路基板に搭載する電子部品に変更が生じ、前
記回路基板の大きさに変更が生じても、前記スナップス
トリップを利用し前記コネクタを折り切ることにより、
前記コネクタの大きさを前記回路基板の大きさを容易に
合わせることができる。従ってあらゆる電子部品の搭載
に容易に対応することができる。従って、従来のように
新たにパッケージを作製する必要がなくなり、コストの
上昇を招くこともなく、新製品の開発期間を大幅に短縮
することができる。
As described above in detail, in the hybrid integrated circuit according to the present invention, the side surface of the circuit board on which the electronic parts are mounted has a plurality of side surface through holes, and the shape fits into these side surface through holes. Connector is fixed, the through holes are formed at regular intervals, and if snap strips are formed on the connector at the same intervals as the above intervals, the snap strips serve as cut lines and the circuit is formed. Even if there is a change in the electronic components mounted on the board and the size of the circuit board changes, by breaking the connector using the snap strip,
The size of the connector can be easily matched with the size of the circuit board. Therefore, it is possible to easily mount various electronic components. Therefore, it is not necessary to manufacture a new package as in the conventional case, the cost is not increased, and the development period of a new product can be significantly shortened.

【0031】さらに、前記回路基板の上方に平板が配設
されている場合にはマウンターによる自動実装が確実に
行なえるようになり、リフローによるマザーボードへの
自動ハンダ付けが容易となる。
Further, when the flat plate is arranged above the circuit board, the automatic mounting by the mounter can be surely performed, and the automatic soldering to the mother board by the reflow becomes easy.

【0032】また、電子部品が搭載された回路基板上に
樹脂が充填されている場合には、前記電子部品を湿気等
から完全に守ることができ、耐久性を向上させることが
できる。
Further, when the resin is filled on the circuit board on which the electronic parts are mounted, the electronic parts can be completely protected from moisture and the durability can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係る混成集積回路の実施例を示す模式
的斜視図である。
FIG. 1 is a schematic perspective view showing an embodiment of a hybrid integrated circuit according to the present invention.

【図2】図1に示した混成集積回路を裏面側から見た模
式的分解斜視図である。
FIG. 2 is a schematic exploded perspective view of the hybrid integrated circuit shown in FIG. 1 viewed from the back surface side.

【図3】(a)は回路基板を示す模式的平面図であり、
(b)は回路基板を示す模式的斜視図である。
FIG. 3A is a schematic plan view showing a circuit board,
(B) is a typical perspective view showing a circuit board.

【図4】(a)はコネクタの基本単位を示す模式的斜視
図、(b)は基本単位が連結されたコネクタを示す模式
的斜視図、(c)は基本単位が連結されたコネクタ32
を示す模式的平面図である。
4A is a schematic perspective view showing a basic unit of a connector, FIG. 4B is a schematic perspective view showing a connector to which basic units are connected, and FIG. 4C is a connector 32 to which basic units are connected.
It is a schematic plan view showing.

【図5】ダム用基板小片を示す模式的斜視図である。FIG. 5 is a schematic perspective view showing a dam substrate piece.

【図6】従来の混成集積回路を示す模式的部分断面斜視
図である。
FIG. 6 is a schematic partial cross-sectional perspective view showing a conventional hybrid integrated circuit.

【図7】従来の別の混成集積回路を示す模式的断面図で
ある。
FIG. 7 is a schematic cross-sectional view showing another conventional hybrid integrated circuit.

【符号の説明】[Explanation of symbols]

31 回路基板 32 コネクタ 34 平板 35 電子部品素子 41 側面スルーホール 31 Circuit Board 32 Connector 34 Flat Plate 35 Electronic Component Element 41 Side Through Hole

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 電子部品が搭載された回路基板の側面に
複数の側面スルーホールを有し、これら側面スルーホー
ルに嵌合する形状のコネクタが固定されていることを特
徴とする混成集積回路。
1. A hybrid integrated circuit having a plurality of side surface through holes on a side surface of a circuit board on which electronic components are mounted, and a connector having a shape fitted into the side surface through holes is fixed.
【請求項2】 回路基板の上方に平板が配設されている
請求項1記載の混成集積回路。
2. The hybrid integrated circuit according to claim 1, wherein a flat plate is provided above the circuit board.
【請求項3】 電子部品が搭載された回路基板上に樹脂
が充填されている請求項1または2記載の混成集積回
路。
3. The hybrid integrated circuit according to claim 1, wherein resin is filled on a circuit board on which electronic components are mounted.
JP4060089A 1992-03-17 1992-03-17 Hybrid integrated circuit Pending JPH05267493A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4060089A JPH05267493A (en) 1992-03-17 1992-03-17 Hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4060089A JPH05267493A (en) 1992-03-17 1992-03-17 Hybrid integrated circuit

Publications (1)

Publication Number Publication Date
JPH05267493A true JPH05267493A (en) 1993-10-15

Family

ID=13132020

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4060089A Pending JPH05267493A (en) 1992-03-17 1992-03-17 Hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPH05267493A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8139369B2 (en) 2008-04-14 2012-03-20 Lockheed Martin Corporation Printed wiring board solder pad arrangement

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8139369B2 (en) 2008-04-14 2012-03-20 Lockheed Martin Corporation Printed wiring board solder pad arrangement

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