JPH05259357A - Lead frame for flat package semiconductor device - Google Patents

Abstract

PURPOSE:To improve solderability and dissipation by making the soldering zone of an outer lead narrow and the tiebar-connected points wide. CONSTITUTION:An outer lead 3 has the tip zone 3-1 from the tip side middle zone soldered to a printed wiring board made narrower than the base zone 3-2 and is therefore easy to bond in soldering, so that no failure occurs in connection. Cutting points of a tiebar 4 are punched on both sides with a punch width of less than a plate thickness of a lead frame metal sheet and made wider than a lead, thereby enhancing heat dissipation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame for a flat package semiconductor device on which highly integrated semiconductor chips are mounted.

[0002]

2. Description of the Related Art There is a strong demand for higher functionality and smaller size of semiconductor devices, and correspondingly, the leads have a large number of pins and are fine in width and spacing. For such a semiconductor device, a lead frame for a flat package semiconductor device in which leads can be led out from four side surfaces is often used.

It is important that a lead frame for a flat package semiconductor device can be provided with a large number of leads, and that the outer leads protruding from the package portion have excellent solderability. This is because, for example, it is indispensable for reliably and automatically mounting a semiconductor device on a printed wiring board by automatic operation.

In a lead frame for a flat package semiconductor device, a highly integrated and high-density semiconductor chip is mounted, so that it is necessary to have good heat dissipation.

The outer lead is formed into a predetermined shape, for example, in a gull wing shape in order to facilitate mounting work and improve reliability. However, the outer lead has a good formability and the tips of the outer lead do not come into contact with each other. is important.

A lead frame for the flat package type semiconductor device has been proposed. For example, Japanese Patent Laid-Open No. 3-16246 discloses a lead frame in which the lead width of the tip portion of the outer lead is made narrower than others to reduce the rigidity, and the tip portion is likely to be flattened after molding to improve solderability. Has been done. This has the effect of improving the soldering connection by flattening the tips when the outer leads are formed in a gull wing shape.

[0007]

Recently, semiconductor devices have been highly integrated and miniaturized in parallel with technological developments such as high performance and multi-functionalization in the field of applied electric equipment.
Correspondingly, the lead frame incorporated in the semiconductor device has an increased number of leads, and its width and spacing are small, for example, the lead pitch is less than 0.4 mm.

In the semiconductor device, the outer leads that are led out are formed into a desired shape such as a gull wing shape, and are mounted on the printed wiring board by soldering. However, when the leads are bent by the forming process, slight deflection or If there is a deviation from the predetermined position, the tips of the outer leads may come into contact with each other. This risk increases as the number of leads increases, and is a problem that must be solved in a lead frame for a flat package semiconductor device.

Further, the semiconductor device generates heat during use, and this phenomenon becomes more remarkable as the number of pins increases, which causes problems such as deterioration of reliability and end of life.

The present invention does not have these problems, and even if it has a large number of pins for mounting a semiconductor chip of high integration and high density, these leads can be securely connected to the printed wiring board without causing a connection failure or a short circuit. An object is to provide a lead frame of a semiconductor device for a flood package, which can be connected and has excellent heat dissipation and can maintain the reliability of the function as a semiconductor device for a long time.

[0011]

SUMMARY OF THE INVENTION The gist of the present invention is to connect an inner lead provided facing each side of a pad on which a chip is mounted, an outer lead connected to the inner lead, and the inner lead and the outer lead. In the lead frame that molds the tie bar and the outer lead into a gull wing type, the width of the cut portion is wide when the drawing width of the part connected by the tie bar is equal to or less than the plate thickness, and the printed wiring board of the outer lead is formed. A lead frame for a flat package semiconductor device is characterized in that a width from a middle portion to be soldered to a tip portion is made narrower than a base end portion of the outer lead.

[0012]

The lead frame for a flat package semiconductor device according to the present invention has a high heat dissipation capability because the width of the tie bar extending from the semiconductor device is less than the plate thickness and the width of the lead at the cut portion is wide. Since the temperature rise of the semiconductor device is prevented and the width of the tip region from the middle portion of the outer lead to be soldered to the printed wiring board is narrowed, the solder connection is surely made over the entire connection region. Further, when the outer lead is molded into a desired shape, even if there is some deflection due to bending in molding, there is an effect that a short circuit does not occur at the tip of the lead.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the drawings based on an embodiment. In the drawing, reference numeral 1 denotes a pad on which a semiconductor chip is mounted, and an inner lead 2 is provided so as to face the side surface of the pad 1. An outer lead 3 is continuous with the inner lead 2 and extends to four side surfaces. In FIG. 1 of this embodiment, the lead pitch is widened with 24 pins for the sake of easy understanding of the figure, but the lead frame of the present invention has more pins and the lead pitch is less than 0.4 mm. Suitable for ones.

Reference numeral 4 denotes a tie bar which is provided between the inner lead 2 and the outer lead 3 to connect the leads to each other.
The gap is maintained to prevent deformation during manufacturing or transportation, and to suppress resin burr when sealing with resin or the like.

The outer lead 3 has a width from the middle portion to be soldered to the printed wiring board on the front end side to the front end portion 3-1 narrower than the base end portion 3-2 so that the outer lead 3 is easily attached at the time of soldering, resulting in poor connection. I try not to. Moreover, since the width of the outer lead 3 is narrow, the contact between the tip portions of the outer leads 3 is prevented, which facilitates the manufacture of a multi-pin semiconductor device. The shape of the narrowed portion may be a strip shape, a step shape, a taper shape, or the like.

Reference numeral 5 is a support bar that supports the pad 1.

In the semiconductor device 6, a semiconductor chip 7 is mounted on the pad 1, and the terminals of the chip 7 and the inner leads 2 are mounted.
After the tip ends of the tie bars are connected with a metal wire (not shown), the tie bar 4 which is packaged with a sealing material such as resin and connects the leads is cut.

The cut portion of the tie bar 4 is punched out on both sides with a draft width equal to or smaller than the thickness of the thin metal plate of the lead frame material, and the width of the cut portion is made wider than that of the lead to enhance the heat dissipation ability. Therefore, in the case of a large number of pins, its power is particularly high and the rise in temperature is avoided.

Also, since the lead width of the base end portion 3-2 of the outer lead 3 near the cut portion of the tie bar 4 and the vicinity thereof is wide, the moldability is good, and the outer lead 3 led out from the semiconductor device 6 is gull-winged. Forming process becomes easy.

[0020]

According to the lead frame for a flood package semiconductor device of the present invention, the soldered portion of the outer lead has a narrow width and is excellent in solderability, and the outer lead may be slightly bent during the molding process. Even if it occurs, there is an effect that the tip portions do not come into contact with each other and the manufacturing is easy.

Further, since the portions connected by the tie bars are made extremely wide, the heat dissipation ability is excellent, the reliability of the semiconductor device is ensured, and the life is extended.

[Brief description of drawings]

FIG. 1 is a diagram showing a lead frame according to an embodiment of the present invention.

FIG. 2 is a diagram showing a semiconductor device according to one embodiment of the present invention.

[Explanation of symbols]

 1 Pad 2 Inner Lead 3 Outer Lead 4 Tie Bar 5 Support Bar 6 Semiconductor Device 7 Semiconductor Chip

Claims (1)

[Claims] Inner leads provided facing each side of the pad on which the chip is mounted, outer leads connected to the inner leads, tie bars connecting the inner leads and the outer leads, and a lead frame for molding the outer leads into a gull wing type. In the above, the width of the cut portion is widened when the extraction width of the portion connected by the tie bar is equal to or less than the plate thickness, and the width from the middle portion to the tip portion of the outer lead that is soldered to the printed wiring board is set to the outer lead. A lead frame for a flat package semiconductor device, which is narrower than the base end of the.