JPH05258048A - Image processing system - Google Patents

Abstract

PURPOSE:To shorten execution time by adopting the pipeline conversion system of an image processing sequence at the time of processing a still image based on plural execution requirements by an operator. CONSTITUTION:A host computer is programed with respect to the starting processing of low-order CPU based on a sequence file, starts the camera input processing program of a group number (A) first by adding an image holding memory to a low-order CPU, and starts the processing 1 program of a group number (B) following to finishing the program. At the same time of starting the processing 2 program of the group number (B) following to finishing the program, if next execution is required, a next camera input processing program is started. The pipeline conversion system which can simultaneously execute the camera processing program and the processing 2 program is provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing system, and more particularly to a pipeline system of an image processing sequence for executing image processing of a still image based on a sequence file.

[0002]

2. Description of the Related Art A schematic configuration diagram of a conventional image processing system is shown in FIG. In the image processing apparatus shown in FIG. 8, reference numeral 1 denotes an image input device such as an ITV camera, the output of which is input to the image input / output unit 5. Reference numeral 2 denotes a display device such as a CRT display device, to which a signal output from the image input / output unit 5 is input.

Reference numeral 3 denotes a host computer. When an operator makes an image processing execution request to the host computer 3, a sequence control program 4 stored in a storage unit of the host computer 3 is activated and an input / output bus (address) is set. Bus, data bus, control bus), the CPU 6 and the image processing unit 13 in the image input / output unit 5
A processing request is issued to the internal CPU 15.

The image input / output unit 5 controls the data flow of the image input / output unit 5, a storage unit 7 connected to the system bus of the CPU 6 for storing control programs of the CPU 6, and input / output of the CPU 6. Frame memory 10, display memory 11, and data input / output unit 12 connected to the bus
And the memory controller 8 and further controlled by the memory controller 8, the image input from the ITV camera 1 is A / D converted, and its output is sequentially output to the frame memory 1.
It is composed of an A / D converter 9 for writing 0.

The image processing section 13 executes C for executing image processing.
The PU 15 and a storage unit 1 connected to the system bus of the CPU 15 and storing the image processing program of the CPU 15 and the like.
6, an image processing memory 16a which is a part of the storage unit 16 but is secured as a work area during image processing,
Data input / output unit 1 connected to the input / output bus of the CPU 15
4 and.

The image input / output unit 5 and the image processing unit 13
The data input / output unit 12 and the data input / output unit 14 are connected to each other by a data bus A, a data bus B, and a control bus C, and information such as image data is exchanged. Further, the display memory 11 in the image input / output unit 5 is
It is used as a temporary storage memory in each stage of image processing and is also used to output image information to the CRT display device 2.

Next, based on the sequence file activated by the operator's single instruction on the host personal computer 3,
When the image processing is sequentially executed, for example, the sequence file shown in FIG. 9 is executed in the following order. Here, the processing number represents the order of processing, the image processing represents processing content such as binarization processing, grayscale processing, and edge enhancement, and the processing parameter represents an execution procedure of image processing.

First, in the camera input of the processing number (1), I
When the camera image from the input of the TV camera 1 is A / D converted by the A / D converter 9 and the image data for one frame is stored in the frame memory 10, the image data is displayed.
Transfer to. Next, in processing 1 of processing number (2), the image data in the display memory 11 is transferred to the image processing unit 13 via the data bus A, and the image processing data subjected to the image processing in the image processing unit 13 is transferred to the data bus. Display memory 1 via B
Returned to 1.

Next, in the process 2 of the process number (3), the image data of the display memory 11 is transferred to the image processing unit 13 via the data bus A in the same manner as the process number (2), and the image processing unit 13 The image-processed data subjected to the image processing in 13 is returned to the display memory 11 via the data bus B. As described above, in the conventional method, as shown in the image processing sequence of FIG. 10, a plurality of execution requests of the operator to the host computer 3 are completed and executed one by one in the order of the processing numbers. Image processing is being performed.

[0010]

However, in the above-mentioned conventional image processing method, when the sequence file of FIG. 9 is repeatedly executed based on a plurality of execution requests of the operator, the processing is performed in the order of the processing numbers as described above. Since it is being executed, there is an unsolved problem that the execution processing speed becomes slow.

The image data is temporarily saved in the display memory 11 for each image processing number, and the data buses A and B are saved each time.
Therefore, there is an unsolved problem that the processing speed of the execution becomes slow for this reason as well. Therefore, the present invention has been made by paying attention to the above-mentioned unsolved problems of the related art. By providing an image holding memory for temporarily holding the progress of image processing in the image processing unit 13, Processes that cannot be executed are grouped together and a pipelined system of image processing sequences that can operate these groups in parallel is adopted to process still images based on multiple execution requests from the operator. An object of the present invention is to provide an image processing method that can reduce the execution time.

[0012]

In order to achieve the above object, an image processing method according to the present invention reads still image data from an image input device, performs image processing in an image processing section, and outputs the image processing result. In the image processing method of holding the image data of the image data in the display memory in the image input / output unit, an image holding memory for temporarily holding each image processing information in the image processing unit and a plurality of image processing It is characterized in that it is provided with a sequence control means for simultaneously executing the image processing for the image processing which does not use the same image holding memory at the same time.

[0013]

According to the present invention, in addition to the conventional image processing method, an image holding memory for temporarily holding the image processing progress at each image processing stage in the image processing unit and a plurality of image processing executions In addition, since there is provided a sequence control means for simultaneously performing image processing for image processing steps that can be simultaneously processed in the image processing step by temporarily saving image data in the image holding memory, processing parameters that cannot be simultaneously executed. By grouping together, it is possible to realize a pipeline of image processing sequences that can execute all groups at the same time.

[0014]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic configuration diagram showing an embodiment of the present invention. 2 is a sequence file of the embodiment, and FIG. 3 is a diagram showing an image processing order. In FIG. 1, reference numeral 1 denotes an image input device such as an ITV camera, the output of which is input to an image input / output unit 5. Reference numeral 2 denotes a display device such as a CRT display device, to which a signal output from the image input / output unit 5 is input.

Reference numeral 3 denotes a host computer. When an operator makes an image processing execution request to the host computer 3, the sequence control program 4a stored in the storage unit of the host computer 3 is started, and an input / output bus (address) is set. Bus, data bus, control bus), the CPU 6 and the image processing unit 1 in the image input / output unit 5
A processing request is issued to the CPU 15 in 3.

The image input / output unit 5 controls the data flow of the image input / output unit 5, a storage unit 7 connected to the system bus of the CPU 6 for storing control programs of the CPU 6, and input / output of the CPU 6. Frame memory 10, display memory 11, and data input / output unit 12 connected to the bus
And the memory controller 8 and further controlled by the memory controller 8, the image input from the ITV camera 1 is A / D converted, and its output is sequentially output to the frame memory 1.
It is composed of an A / D converter 9 for writing 0. Here, the memory controller 8 receives an H.V. SYNC (horizontal synchronization signal) and V. The SYNC (vertical synchronization signal) is received, the start position of the input image is determined by the activation from the CPU 6, and thereafter, the frame memory is controlled in synchronization with the control of the A / D converter 9 and the A / D conversion according to the internal clock. A write address signal or the like for 10 is generated, and when the writing of one frame is completed, access to the A / D converter 9 and the frame memory 10 is stopped and the CPU 6 is notified, and a standby state is set until the next activation. Become.

The image processing unit 13 executes C for executing image processing.
The PU 15 and a storage unit 1 connected to the system bus of the CPU 15 and storing an image processing program of the CPU 15 and the like.
6 and an image processing memory 16a which is a part of the storage unit 16 but is secured as a work area during image processing,
Image holding memory 1 connected to the input / output bus of the CPU 15
7a, 17b and the data input / output unit 14. Here, the image holding memories 17a and 17b are a video RAM as a temporary storage memory in each stage of image processing.
(VRAM) is used.

The image input / output unit 5 and the image processing unit 13
The data input / output unit 12 and the data input / output unit 14 are connected to each other by a data bus A, a data bus B, and a control bus C, and information such as image data is exchanged. Further, the display memory 11 in the image input / output unit 5 is
The image information is output to the CRT display device 2.

Next, the operation of the above embodiment will be described with reference to the flow charts of FIGS. FIG. 4 is a flowchart of the host computer 3, which is created based on the sequence file of FIG. FIG. 5 is a flowchart of the ITV camera input image processing for the group number (A). FIG. 6 is a flowchart of processing 1 for group number (B). FIG. 7 is a flowchart of processing 2 for group number (B). Here, since the ITV camera input image processing of the group number (A) and the processing 2 of the group number (B) do not perform the same operation at the same time, they can be processed simultaneously.

The flowchart of FIG. 4 is started when the host computer 3 receives an execution request from the operator. First, in step S1, the CPU 6 and the CPU 15 start the camera input image processing program of the group number (A). .. In step S2, first, the status information of the CPU 6 is read to determine whether or not the end information of the ITV camera input image processing program is set. If not set, the operation of returning to step S2 again is repeated. If it is set, the process proceeds to step S3.

In step S3, the CPU 15 activates the processing 1 program of the group number (B). In step S4, first, the status information of the CPU 15 is read, and it is determined whether or not the end information of the processing 1 program is set. If not, the operation of returning to step S4 is repeated. If set, step S
Go to 5. In step S5, CPU6 and CPU15
, The process 2 program of the group number (B) is activated, and the process proceeds to step S6.

In step S6, the host computer 3
It is determined whether or not there is a next execution request from the operator. If there is an execution request, the process proceeds to step S7 and the CP is executed again.
The camera input processing program of the group number (A) is activated for U6 and the CPU 15. At this time, the ITV camera input image processing program of the group number (A) and the processing 2 program of the group number (B) are processed at the same time.

Next, the process proceeds to step S8, the status information of the CPU 15 is read, and it is determined whether or not the end information of the process 2 program is set. If not set, the operation of returning to step S8 again is repeated. If it is set, the process proceeds to step S2, and again to step S2.
Perform the following processing. If there is no execution request from the operator in step S6, the process proceeds to step S9 and C
The status information of the PU 15 is read, and it is determined whether or not the end information of the process 2 program is set. If it is not set, the operation of returning to step S9 again is repeated. If it is set, the host computer 3 ends the execution of the image processing.

The flowchart of FIG. 5 is an ITV camera input image processing program of group number (A),
It is started from the host computer 3. First, in step S21, the memory controller 8 is activated. The memory controller 8 is a H.V. SYNC and V.I. S
When YNC has been received and activation is started, the start time of the input image is determined, and thereafter the A / D converter 9 and the frame memory 10 are controlled to write to the frame memory 10.

Next, in step S22, it is determined whether or not one screen of image data has been written in the frame memory 10. This is performed depending on whether or not the end notification from the memory controller 8 is set. If the writing of the image data has not been completed, the process returns to step S22 again. If the writing of the image data is completed, the process proceeds to step S23 and the image data written in the frame memory 10 is sequentially transferred to the image holding memory 17a in the image processing unit 13 via the data bus A. The CPU 6 and the CPU 15 control the data transfer via the control bus C. Then
In step S24, it is determined whether the transfer is completed. If the predetermined number of words have been transferred, the CPU 6 determines that the transfer is completed. If the transfer has not been completed, the process returns to step S23 again. If the transfer is complete, step S
25, the end information is set, the CPU 15 and the host computer 3 are notified, and the ITV camera input image processing program is ended.

The flowchart of FIG. 6 is a processing 1 program for the group number (B), which is started from the host computer 3. First, in step S31, the image data area of the processing unit of the image processing 1 is set to the image holding memory 17a.
Read out and transferred to the image processing memory 16a. Here, the image processing memory 16a is used as a work area when performing image processing. Step S32 is a routine for performing a predetermined image processing 1, and when the image processing 1 of the data area read in step S31 is completed, the image processing result is written in the image holding memory 17b in step S33. Next, in step S34, it is determined whether or not the image processing 1 has been completed for all areas, and if not completed, the processing returns to step S31 and the processing is repeated for the next data area. If the processing has been completed, the process proceeds to step S35 to set the completion information and notify the CPU 6 and the host computer 3 to terminate the processing 1 program.

The flowchart of FIG. 7 shows the processing 2 program for the group number (B), which is started from the host computer 3. First, in step S41, the image data area of the processing unit of the image processing 2 is set to the image holding memory 17b.
Read out and transferred to the image processing memory 16a. Step S42 is a routine for performing a predetermined image processing 2. When the image processing 2 of the data area read out to the image processing memory 16a in step S41 is completed, the image processing result is displayed in the display memory in the image input / output unit 5 in step S43. 11 via the data bus B. The data transfer is controlled by the CPU 15 and the CPU 6 via the control bus C.
Next, in step S44, it is determined whether or not the image processing 2 has been completed for all areas, and if not completed, the processing returns to step S41 and the processing is repeated for the next data area. If the processing has been completed, the process proceeds to step S45, the completion information is set, the CPU 6 and the host computer 3 are notified, and the processing 2 program is completed.

Here, the image holding memories 17a and 17b
Corresponds to the image holding memory, and the sequence file of FIG. 2 and the program of the host computer of FIG. 4 correspond to the sequence control means. Therefore, the flow chart of FIG. 4 is started by the operator's execution request, and after the ITV camera input image processing of the group number (A) is started in step S1, the next image processing 1 in step S4 is completed. When the operator's execution request is executed, it is determined in step S6 that there is a next execution request. Therefore, immediately after the image processing 2 of the group number (B) in step S5 is activated, the group number (A ) ITV
The camera input image processing is activated, and the processing of the group number (A) and the processing of the group number (B) are executed simultaneously. As a result, as shown in FIG. 3, a part of the image processing is executed in parallel and the processing is performed in a pipeline manner, so that the execution time of the image processing is shortened in total. If there is no next execution request in step S6, the process of FIG. 4 is completed when the process 2 is completed in step S9.

In the above embodiment, the image holding memories 17a and 1a are provided in the image processing unit 13 as the image holding memories.
Although the video RAM (VRAM) 7b is provided, the invention is not limited to this, and the storage capacity of the storage unit 16 may be secured accordingly and replaced with the image holding memory. Further, in the above-mentioned embodiment, the data transfer between the memories including the exchange of data between the image input / output unit 5 and the image processing unit 13 is described based on the program transfer, but the present invention is not limited to this, and the program transfer may be used instead. If you transfer data by DMA transfer,
The processing capacity of the system is further improved.

Further, although the image is input by the ITV camera 1 in the above embodiment, the present invention is not limited to this, and the image may be input by another image reading device such as an image scanner. Furthermore, although the CRT display device is used as the display 2 in the above embodiment, the present invention is not limited to this, and another display device such as a liquid crystal display device may be used.

[0031]

As described above, according to the image processing method of the present invention, an image holding memory for temporarily holding the image processing progress at each image processing stage in the image processing unit, and a plurality of image processing units. Since a sequence control means is provided for simultaneously executing image processing for image processing steps that can be simultaneously processed in the image processing step by temporarily saving image data in the image holding memory when executing By grouping together processing parameters that cannot be executed simultaneously, it is possible to realize a pipeline of image processing sequences that can execute all groups at the same time, and it is possible to shorten the processing execution time.

Since the image holding memory is provided, the number of times image data is transferred between the image input / output unit and the image processing unit using the data bus is reduced. There is an effect that can be achieved.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of an embodiment.

FIG. 2 is a sequence file of an embodiment.

FIG. 3 is a diagram illustrating an image processing order according to an embodiment.

FIG. 4 is a processing flowchart of a sequence control program of a host computer of the embodiment.

FIG. 5 is a camera input processing flowchart of the embodiment.

FIG. 6 is a flowchart of image processing 1 of the embodiment.

FIG. 7 is a flowchart of image processing 2 of the embodiment.

FIG. 8 is a schematic configuration diagram of a conventional example.

FIG. 9 is a sequence file of a conventional example.

FIG. 10 is a diagram illustrating an image processing order of a conventional example.

[Explanation of symbols]

 1 camera 2 CRT display device 3 host computer 4, 4a sequence control program 5 image input / output unit 6,15 CPU 7, 16 storage unit 8 memory controller 9 A / D converter 10 frame memory 11 display memory 12, 14 data input / output Part 13 Image processing part 17a, 17b Image holding memory (video RAM)

Claims (1)

[Claims] 1. An image processing method in which still image data is read from an image input device, image processing is performed by an image processing unit, and image data of the image processing result is held in a display memory in an image input / output unit. An image holding memory that temporarily holds each piece of image processing information in the processing unit, and a sequence control unit that simultaneously executes image processing for image processing that does not use the same image holding memory when executing a plurality of image processings An image processing method comprising: