JPH0525133B2 - - Google Patents

Info

Publication number
JPH0525133B2
JPH0525133B2 JP61098234A JP9823486A JPH0525133B2 JP H0525133 B2 JPH0525133 B2 JP H0525133B2 JP 61098234 A JP61098234 A JP 61098234A JP 9823486 A JP9823486 A JP 9823486A JP H0525133 B2 JPH0525133 B2 JP H0525133B2
Authority
JP
Japan
Prior art keywords
input
output
request
memory
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61098234A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62256065A (ja
Inventor
Junichi Kihara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP9823486A priority Critical patent/JPS62256065A/ja
Publication of JPS62256065A publication Critical patent/JPS62256065A/ja
Publication of JPH0525133B2 publication Critical patent/JPH0525133B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
JP9823486A 1986-04-30 1986-04-30 要求バツフア制御方式 Granted JPS62256065A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9823486A JPS62256065A (ja) 1986-04-30 1986-04-30 要求バツフア制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9823486A JPS62256065A (ja) 1986-04-30 1986-04-30 要求バツフア制御方式

Publications (2)

Publication Number Publication Date
JPS62256065A JPS62256065A (ja) 1987-11-07
JPH0525133B2 true JPH0525133B2 (enrdf_load_stackoverflow) 1993-04-12

Family

ID=14214269

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9823486A Granted JPS62256065A (ja) 1986-04-30 1986-04-30 要求バツフア制御方式

Country Status (1)

Country Link
JP (1) JPS62256065A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0264839A (ja) * 1988-08-31 1990-03-05 Toshiba Corp チャネル装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5789127A (en) * 1980-11-25 1982-06-03 Nec Corp Controlling system for input-output instruction

Also Published As

Publication number Publication date
JPS62256065A (ja) 1987-11-07

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term