JPH052451A - Digital data processor - Google Patents

Abstract

PURPOSE:To perform the normal data reproduction by preventing that a memory for a buffer at a host processing part side from falling into over-flow state or under-flow state even when a clock frequency being the reference of a data processing speed at a host processing part side and a disk reproducing part side is deviated. CONSTITUTION:A CPU 24 to detect the data component corresponding to the head position of each block out of the output data of a CD-ROM drive 151 and a clock counter 26 to count a clock CK-a by only the number corresponding to the block of the data and generated the output are provided. A comparing circuit 25 to compare the output generating timing of the clock counter 26 and the detecting timing of the CPU 24 and a switching signal generating circuit 27 to change the frequency of the clock CK-a in accordance with the compared result of the comparing circuit 25 are equipped.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital data processing apparatus for transferring digital data output from a disk reproducing section to a host processing section for processing, and particularly to a data reproducing speed of the disk reproducing section and a host processing section. The present invention relates to one that is synchronized with the data processing speed of.

[0002]

2. Description of the Related Art As is well known, the CD (Compact Disc) system, which is becoming the mainstream of audio equipment at present, is
A pit corresponding to digital PCM (pulse code modulation) data was formed on a disk with a diameter of 12 cm, and while this disk was rotationally driven by the CLV (constant linear velocity) method, a semiconductor laser and a photoelectric conversion element were incorporated. An optical pickup is used to perform linear tracking reproduction from the inner circumference side to the outer circumference side.

In addition to the reproduced music data for audio reproduction, this disc also includes subcode data P, which is defined for control / display.
Q, RW are recorded. Of these, the subcode data Q is also called address data, and in the program area where the music data of the disc is recorded, the music number (TNO), section number (INDEX), Elapsed time for each song (TIME) and total elapsed time from the start position of the program area (AT
IME) etc. are shown.

Further, the subcode data Q indicates the start address of each music as TOC (table of contents) data in the lead-in area located on the inner peripheral side of the program area. In other words, the sub-code data Q causes a search operation for selectively reproducing the data to be reproduced to be executed at high speed and accurately from the huge amount of recorded information recorded on the disc that can be reproduced in stereo for about 1 hour. , It is recorded to grasp the playback status of the disc.

By the way, the CD system was originally developed for the purpose of recording and reproducing music data, but in recent years, focusing on its enormous recording capacity, the music data recording area of the disc is digitally recorded. A CD-ROM (Read Only Memory) system is defined in which a disc is used as a read-only data recording medium by using it as an information recording area.

In this CD-ROM system, the recording / reproducing format for reproducing the music data in the CD system is not changed, and a new format is added to the recording / reproducing format to record / reproduce digital information on / from the disc. .. That is, in the CD system, two-channel analog music signals are sampled at 44.1 kHz and each is recorded as 16-bit digital music data, but in the CD-ROM system, as shown in FIG. 16 bits to 8 bits (1
The digital data is recorded in 2352 bytes as one unit (1 block).

As shown in FIG. 4, one block includes a 12-byte synchronization pattern a for recognizing the start of the block, and a 4-byte header address indicating address information of the block corresponding to the subcode data Q. b, user data c of 2048 bytes (= 2 kbytes) for the user, and error correction data d of 288 bytes for error detection and error correction of this user data.

Of these, the error correction data d is used when an error cannot be corrected only by C1 and C2 parity correction in the CD recording / reproducing format. By using this error correction data d Error rate is 10 ^-12 Be improved to. From this error rate, it can be said that the CD-ROM system has a practically sufficient performance as a data recording medium of a computer.

It should be noted that the above-mentioned configuration of one block is based on MO
It is a format called DE-1, and besides this,
There is also a format called MODE-2 in which the user data c is also recorded in the recording area of the error correction data d. In this MODE-2 format, the user data c is 2336 bytes.

Here, the data transfer rate in the CD-ROM system is 75 blocks / second, and MODE-1
When data is recorded for 1 hour in the format of
75 (blocks / second) x 60 (minutes) x 60 (seconds) x 2
(K bytes) = 540 Mbytes of data will be recorded. This data amount corresponds to 500 ordinary floppy disks, or approximately 300,000 pages in the case of a document.

The CD-ROM system is also excellent in replica capacity. That is, in the CD-ROM system, the manufacturing process of the disc is the same as the manufacturing process of the existing CD system disc, and the manufacturing cost per 1 Mbyte of the CD-ROM system disc is equal to that of the floppy disc. It is much lower than the cost, and can be said to be very suitable for copying the same material and data.

That is, the CD-ROM system realizes a recording / reproducing system which has a large recording capacity and has a low error rate and is easy to copy in the existing recording / reproducing system using a disc. ..

Recently, the CD-ROM XA (Extended Architecture) standard has been announced as an extended standard of the CD-ROM system. This C
The D-ROM / XA standard defines the format of image data and compressed audio data (ADPCM system) recorded on a disc. That is, CD-RO
The data in the M.XA standard is the MODE-2 described above.
Is recorded in the block of the format of FIG.
Two forms as shown in (b) are defined.

The audio data is interleaved and recorded by the ADPCM system. CD method sampling frequency 44.1k
For Hz, level B of 37.8 kHz and 18.9 k
Hz level C is defined, and the compression ratio is 4 times at level B (stereo) and 1 at level C (monaural).
It is 6 times. Therefore, if it is monaural audio data, 16 hours worth of data can be recorded on one disk.

Further, if the file address and channel number defined in the subheader are used, complicated interleaved recording becomes possible. For example, channel 1
It is possible to record narration in Japanese and English in channel 2, and switch between them instantly for playback. Furthermore, interleaved recording of audio data and image data is also possible. Image data can be recorded in channel 1 and audio data in channel 2, and the audio data can be reproduced simultaneously while reading the image data.

That is, in the CD-ROM system, image data is recorded on a data track of a disc, audio data is recorded on an audio track, and both data are repeatedly accessed to realize synchronization between an image and a sound. On the other hand, according to the CD-ROM / XA standard, switching of a plurality of languages and simultaneous image display are possible in real time without an access operation. Further, as described above, although the sound quality is slightly deteriorated, it is one of the great advantages of the CD-ROM / XA standard that the audio data for a long time can be recorded.

A CD-ROM drive for reproducing a conventional CD-ROM type disc is a DAC.
(Digital-to-Analog Converter) circuit is built-in, and the audio data of the CD system disc is CD-based by the command of the host PC (personal computer).
The data is processed in the ROM drive and converted into an analog voice signal for audio performance.

On the other hand, at present, as shown in FIG. 6, a CRT (cathode ray tube) 11 for display and a keyboard 12 for operation are connected to a host PC 13 such as SCSI (small computer. System interface) a plurality of CD-ROM drives 1 via an interface 14 such as a bus
51-152, ..., 15n are connected to each CD-ROM
The audio data before being digitized by the DAC circuit, which is selectively obtained from the drives 151, 152, ..., 15n, is transferred to the host PC 13 via the interface 14, and the adapter 16 provided in the host PC 13 transfers the audio data. A digital data processing system has been considered in which data processing is performed and converted into an analog voice signal to be used for audio performance.

In this case, the adapter 16 has an interface control circuit 17 for controlling the interface 14.
A buffer RAM (random access memory) 18 for temporarily storing the digital audio data output from the interface control circuit 17, and the buffer RA
Audio data read from M18 is CD-ROM / X
ADPCM processor 19 for decompressing in case of A standard
And a DAC circuit 20 for converting the audio data output from the ADPCM processor 19 into an analog audio signal.
And the interface control circuit 17 and the buffer R
AM18, ADPCM processor 19 and DAC circuit 2
It comprises an adapter control circuit 21 for controlling a series of operations of 0, and a clock generation circuit 22 for generating and supplying a clock required for the adapter control circuit 21, the ADPCM processor 19 and the DAC circuit 20.

According to the digital data processing system as described above, each CD-ROM drive 151, 152, ...
The DAC circuit is not required in 15n, so the DAC
An inexpensive CD-ROM drive with the circuit deleted can be used. As means for realizing the CD-ROM / XA standard, a method of incorporating a demodulation circuit in a CD-ROM drive and an adapter provided in a host PC to provide data transferred from the CD-ROM drive via an interface by the adapter. There are two possible methods, namely the processing method, but the latter method is expected to become the mainstream for the time being.

In this case, by designing an adapter to which a voice data transfer circuit is added in addition to the CD-ROM / XA standard demodulation circuit, an efficient system can be constructed with a simple structure without waste. Further, it is also a great advantage of the adapter type that a plurality of CD-ROM drives can be connected to the normal interface and, in that case, only one demodulation circuit is required.

The sampling frequency of the CD system is 44.1.
kHz, but generally this frequency is 16.9344.
It is generated by dividing the MHz. That is, 16.9344 MHz x (1/4) x (1/3) x
The frequency is divided into (1/32) = 44.1 kHz. And
A CD-ROM drive generally contains a 16.93344 MHz crystal oscillator and a frequency dividing circuit.

The digital data processing system shown in FIG. 6 also requires that a similar circuit be installed in the adapter 16. This is because the demodulation process within the adapter 16 must also be executed at the same sampling frequency of 44.1 kHz as described above. This is a principle necessary not only for reproducing the data of the CD-ROM type disc but also for reproducing the data of the CD-ROM / XA standard.

Therefore, in the digital data processing system shown in FIG. 6, the most common sense regarding clocks is that each of the CD-ROM drives 151, 152 ,.
5n and the adapter 16 are separately provided with fixed-frequency crystal oscillators. In this case, each CD-R
In order to obtain the same sampling frequency for the OM drives 151, 152, ..., 15n and the adapter 16, naturally, the crystal oscillators having the same nominal frequency are used.

However, it is impossible that the two oscillation frequencies are always completely the same. This is because the oscillation frequency fluctuates depending on the accuracy of the crystal oscillator, aging, ambient temperature, and the like. For example, according to a general crystal oscillator specification, the frequency tolerance is ± 20 p.
Within pm / 25 ° C ± 3 ° C, frequency temperature deviation is ± 30p
It is within pm / -20 ° C to + 60 ° C. If both deviations are simply added, the deviation is ± 50ppm (± 0.005
%). That is, the crystal oscillator of the above specifications is CD-
Even if it is adopted for both the ROM drive and the adapter,
The maximum frequency deviation between them is 50 × 2 = 100p
It becomes pm (0.01%).

As for the digital data processing system shown in FIG. 6, for example, when audio data is processed, the CD-ROM drive 15 for which a reproducing operation is required.
The whole system of 1,152, ... Or 15n operates on the basis of the reference clock CK-d generated therein, and the audio data is reproduced from the disc at that frequency. The reproduced audio data is the interface control circuit 1 of the interface 14 and the adapter 16.
It is temporarily stored in the buffer RAM 18 via 7.
After that, the audio data stored in the buffer RAM 18 is sequentially read from the buffer RAM 18 based on the adapter reference clock CK-a generated by the clock generation circuit 22, and converted into an analog audio signal by the DAC circuit 20.

Here, two clocks CK-d and CK-
When the frequencies of a are exactly the same, input of audio data to the buffer RAM 18 in the adapter 16 and the buffer RA
Since the output of the audio data from M18 is processed at exactly the same speed, the audio data is basically not stored in the buffer RAM 18, and the audio performance is continuously continued, which causes no problem. It never happens.

However, the CD-ROM drive 151,
152, ... Or 15n reference clock CK-d is +
If the adapter reference clock CK-a generated by the clock generation circuit 22 is deviated by 0.005% by -0.005%, the input speed of the audio data to the buffer RAM 18 is the audio data from the buffer RAM 18. Since the output speed is 0.01% faster than the output speed, the unprocessed voice data is gradually accumulated in the buffer RAM 18.

That is, since the reproduction rate of audio data in the CD-ROM system is 176400 bytes / second, 17.64 bytes of audio data are accumulated in the buffer RAM 18 per second, and 17.64 × 120 after 2 minutes.
Second = 2117 bytes of audio data will be accumulated. Therefore, if a 2-kbyte (2048-byte) element is adopted as the buffer RAM 18, the buffer RAM 18 overflows after 2 minutes, that is,
There is no area for writing new audio data.

To deal with this situation, the buffer RA
Overwriting means for overwriting newly reproduced audio data over unprocessed audio data written in M18, and buffer RA for newly reproduced audio data.
It is conceivable to continue processing the unprocessed audio data without writing it in M18, but in either case, the missing audio data is generated, and in the former case, the reproduction order is out of order, and in the latter case, the reproduced audio is reproduced. Jumps occur, neither of which can provide continuous and uninterrupted audio performance.

Contrary to the above, the reference clock C of the CD-ROM drive 151, 152, ... Or 15n.
K-d shifts by -0.005%, and the clock generation circuit 22
The adapter reference clock CK-a generated in + is +0.0
If there is a 05% deviation, the output speed of the audio data from the buffer RAM 18 will be 0.01% faster than the input speed of the audio data to the buffer RAM 18, so the buffer RAM 18 will be in an underflow state and the adapter reference clock CK- Even if the audio data is read from the buffer RAM 18 based on a, the audio data does not exist in the buffer RAM 18 at all, and the normal audio performance cannot be performed.

Since the above-mentioned two cases are determined by the ambient temperature and the like, it is impossible to predict in advance which state will actually occur or take a countermeasure. As a solution to the above problems, each CD
-It is possible to provide a dedicated sync signal line between the ROM drives 151, 152, ..., 15n and the adapter 16 to synchronize the operations of both, but add a special line to the standard interface connector. Is not desirable in terms of versatility and economy.

[0033]

As described above, in the conventional digital data processing system, when the clock frequency which is the reference of the data processing speed between the host processing unit side and the disc reproducing unit side is deviated, the host processing unit is deviated. There is a problem that the memory for the buffer on the side becomes an overflow state or an underflow state, and normal data reproduction cannot be performed.

Therefore, the present invention has been made in consideration of the above circumstances, and even if the clock frequency which is the reference of the data processing speed between the host processing unit side and the disk reproducing unit side deviates, the host processing unit side It is an object of the present invention to provide a very good digital data processing device which prevents the memory for the buffer in (1) from becoming an overflow state or an underflow state and enables normal data reproduction.

[0035]

SUMMARY OF THE INVENTION A digital data processing device according to the present invention comprises a disc on which digital data of a format divided into predetermined blocks is recorded.
A disc playback unit for playing back based on the first clock;
A host processing unit having a memory for storing digital data output from the disc reproducing unit at a speed based on the first clock, and reading the digital data from the memory based on the second clock and performing predetermined data processing; It is intended for those with.

Then, the detecting means for detecting the data component corresponding to the head position of each block from the digital data output from the disc reproducing section, and the second clock are counted by the number corresponding to the block of the digital data. Counting means for generating an output, a comparing means for comparing the output generation timing of the counting means with the detection timing of the detecting means, and a control for changing the frequency of the second clock according to the comparison result of the comparing means. And means.

[0037]

According to the above configuration, even if the frequency of the first clock deviates, the frequency of the second clock is changed by following the deviation of the frequency of the first clock. Therefore, the memory overflows or underflows. Can be prevented and normal data reproduction can be performed. Further, since the data component corresponding to the head position of each block is detected from the reproduced digital data and used for detecting one block period, in order to synchronize the second clock with the first clock. It is also advantageous in terms of configuration that there is no need to provide a dedicated synchronizing signal line.

[0038]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings. In FIG. 1, the same parts as those in FIG. 6 are designated by the same reference numerals. That is, the clock generation circuit 22 is adapted to change the frequency of the adapter reference clock CK-a to be output based on the output of the clock frequency control circuit 23. As a means for varying the frequency of the adapter reference clock CK-a in the clock generation circuit 22, for example, a VCO (voltage controlled oscillator) is used, and outputs of a plurality of crystal oscillators having different negotiation frequencies and their frequency division outputs are switched. Methods etc. are possible.

The clock frequency control circuit 23
Are controlled by the output of the adapter control circuit 21, which will be described in detail later, and the adapter control circuit 21 outputs the adapter reference clock CK- output from the clock generation circuit 22.
driven by a.

Here, as described above, the CD-ROM
In the XA standard, a block is defined as a unit of data reproduction, and one block is composed of 2352 bytes. Further, the data unit handled by the interface 14 is usually the same as this. For example, in the SCSI standard, addressing with this block as one unit address (hereinafter referred to as block address) is adopted.

In the configuration shown in FIG. 1, the CD-ROM
When performing data reproduction of the XA standard, first, a data reproduction command is transferred from the host PC 13 to the CD-ROM drive 151 (other CD-ROM drives 152 to 15n are omitted in FIG. 1). The block address is used as a parameter at this time, and the data reproduction start address, the data reproduction length, etc. are designated by this.

The CD-ROM drive 151 retrieves and reproduces desired data from the disc based on this command, and transfers the reproduced data to the host PC 13. The data transfer at this time is also managed by the above block size. The data transferred to the host PC 13 is temporarily stored in the buffer RAM 18 via the interface control circuit 17, and the ADPCM processor 1
It is supplied to the DAC circuit 20 via 9 and converted into an analog audio signal.

The basic data processing procedure is exactly the same as that described above when the audio data obtained by reproducing an ordinary CD type disc is transferred to the host PC 13 to execute an audio performance. However, the voice data in this case does not have the concept of blocks as defined in the CD-ROM system or the CD-ROM / XA standard. This is because, in the CD system, audio data is played by analogizing the audio data without separation.

In the CD system, subcode data Q is set for address management. However, since the address indicated by this subcode data Q does not correspond exactly to the actual voice data, the subcode data Q It is not possible to simply divide the voice data string based on the code data Q.

In order to transfer the CD type audio data to the host PC 13, it is necessary to define one block size of the audio data and its addressing. Because, using these parameters, the host PC 13 and CD
This is because the data transfer with the ROM drive 151 is executed.

Therefore, the most convenient definition as the delimiter of the audio data is the CD-ROM system or the CD-ROM.X.
It is to adopt the same block size (2352 bytes) as the A standard. Since this block size corresponds to one frame of the subcode data Q, basically one-to-one addressing is possible, and the CD system, CD-
The data transfer rate is the same in all transfer modes of the ROM system and the CD-ROM / XA standard (2352 bytes / block), and there is an advantage that data management in the adapter 16 becomes easy.

The block size of the audio data of the CD system is 2352 bytes, and the data transfer timing when the same block size is used in the CD-ROM / XA standard is as shown in FIG. That is,
Data transfer is performed intermittently with a certain interval between transfer blocks. The reason is that the output data rate from the CD-ROM drive 151 is 2352 × 75.
This is because the interface 14 has a very low speed of 176400 bytes / second, while the interface 14 has a very high speed of 4 Mbytes / second.

Here, the reproduction rate of each block (2352 bytes) is defined as 75 blocks / second. That is, each block is transferred at a 1/75 second cycle,
This cycle is naturally controlled by the reference clock CK-d in the CD-ROM drive 151. That is, the data block transfer cycle in the interface 14 is
Reference clock CK-d in the CD-ROM drive 151
CD-ROM drive 15 if synchronized with and measured
The deviation of the reference clock CK-d of 1 can be known.

Therefore, the clock frequency control circuit 23 is
Is the reference clock CK-d from the data block transfer period.
Of the adapter reference clock CK-a from the clock generation circuit 22 is controlled so that the data reading speed from the buffer RAM 18 is synchronized with the data input speed to the buffer RAM 18 based on the deviation. ..

Specifically, as shown in FIG. 3, the interface control circuit 17 is managed by a CPU (Central Processing Unit) 24, and each timing of command transfer and reproduction data reception is controlled by the CPU 24. Is dominated. That is, when data is transferred from the CD-ROM drive 151 to the host PC 13, a read request signal, which is a signal sent corresponding to the head position of each block, is sent to the CP via the interface control circuit 17.
Data transfer is executed by the U24 detecting and executing a predetermined process.

When the CPU 24 detects the read request signal for the data block output from the CD-ROM drive 151, it causes the interface control circuit 17 to start receiving data, and the timing pulse to the positive input terminal + of the comparison circuit 25. To occur.

On the other hand, the adapter reference clock CK-a output from the clock generation circuit 22 is counted by the clock counter 26. This clock counter 26
The adapter reference clock CK-a is equivalent to one block (2
When counting (352 bytes), the count value is automatically reset and the counting operation is started again, and a timing pulse is generated at the negative input terminal-of the comparison circuit 25.

The comparison circuit 25 includes the CPU 24
Pulse generated from the clock and the clock counter 2
The timing pulse generated from 6 outputs the comparison signal corresponding to which time is input faster and the time difference to the switching signal generation circuit 27.

Then, the switching signal generating circuit 27 causes the adapter reference output from the clock generating circuit 22 so that the timing pulse from the CPU 24 and the timing pulse from the clock counter 26 are simultaneously generated based on the comparison signal. In order to control the frequency of the clock CK-a, the clock generation circuit 22 generates a switching signal for switching the output of the plurality of crystal oscillators provided in the clock generation circuit 22 and having different negotiation frequencies and the frequency division ratio thereof.
Output to.

Therefore, according to the above embodiment, the CD-
Even if the frequency of the reference clock CK-d on the ROM drive 151 side deviates, the frequency of the adapter reference clock CK-a on the host PC 13 side is changed to follow it, so that the buffer RAM 18 overflows or underflows. The flow state can be prevented and normal data reproduction can be performed.

Since the read request signal of the data block output from the CD-ROM drive 151 is used for detecting one block period, the adapter reference clock CK-a on the host PC 13 side is used on the CD-ROM drive 151 side. In order to synchronize with the reference clock CK-d of
There is no need to provide a dedicated sync signal line, which is advantageous in terms of configuration. The present invention is not limited to the above-described embodiments, but can be variously modified and implemented without departing from the scope of the invention.

[0057]

As described in detail above, according to the present invention,
Even if the clock frequency, which is the reference of the data processing speed between the host processing unit side and the disc reproducing unit side, shifts, the buffer memory on the host processing unit side is prevented from overflowing or underflowing, It is possible to provide an extremely good digital data processing device that enables normal data reproduction.

[Brief description of drawings]

FIG. 1 is a block configuration diagram showing an embodiment of a digital data processing device according to the present invention.

FIG. 2 is a timing chart shown for explaining the data transfer of the embodiment.

FIG. 3 is a block configuration diagram showing a specific configuration of a main part of the embodiment.

FIG. 4 is a diagram showing a data format of a CD-ROM system.

FIG. 5 is a diagram showing a data format of the CD-ROM / XA standard.

FIG. 6 is a block diagram showing a conventional digital data processing device.

[Explanation of symbols]

11 ... CRT, 12 ... keyboard, 13 ... host PC,
14 ... Interface, 151-15n ... CD-RO
M drive, 16 ... Adapter, 17 ... Interface control circuit, 18 ... Buffer RAM, 19 ... ADPCM processor, 20 ... DAC circuit, 21 ... Adapter control circuit, 22 ... Clock generation circuit, 23 ... Clock frequency control circuit, 24 ... CPU , 25 ... Comparison circuit, 26 ... Clock counter, 27 ... Switching signal generation circuit.

Claims (1)

Claim: What is claimed is: 1. A disc on which digital data in a format divided into predetermined block units is recorded is a first disc.
And a memory for storing digital data output from the disk reproducing unit at a speed based on the first clock, and reproducing from the memory based on the second clock. In a digital data processing device having a host processing unit for reading digital data and performing a predetermined data processing, detection for detecting a data component corresponding to the head position of each block from the digital data output from the disc reproducing unit. Means, counting means for counting the second clock by a number corresponding to a block of the digital data to generate an output, and comparing the output generation timing of this counting means with the detection timing of the detecting means. Means and the frequency of the second clock according to the comparison result of the comparing means. Digital data processing apparatus characterized by comprising and control means for.