JPH05243486A - Capacitance element and its manufacture - Google Patents

Abstract

PURPOSE:To prevent decrease of capacitance value of a capacitance element wherein dielectric having especially large relative permeability is used as a capacitance film, in a capacitance element which has a small occupied area and is suitable for high scaled integration. CONSTITUTION:A first electrode 5 having barrier metal in the uppermost layer is formed on a semiconductor substrate 1, an interlayer film 7 as an insulating film is formed, an aperture is selectively formed, a capacitance film 8 composed of perovskite system oxide film dielectric or Ta2O5 is selectively formed, and a second electrode 9 which is on a capacitance film and has barrier metal in the lowest layer is formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a capacitive element which occupies a small area and is suitable for high integration.

[0002]

2. Description of the Related Art In a semiconductor integrated circuit, a capacitive element (capacitor) is for DC cutting, peaking, or DRAM.
It has occupied an important position such as a data storage capacity in (Dynamic RAM). Conventionally, a PN junction diffusion capacitance or a MOS (Metal Oxide) has been used as a capacitance element.
Semiconductor, MIS (Metal)
The Insulator Semiconductor) has been used.

In particular, a P-type semiconductor substrate 14 as shown in FIG.
The MIS capacitance of the MIS capacitance element in which the N-type high concentration layer 16 surrounded by the separation variable film 2 is used as one voltage is
As the or (insulator) 15, a silicon oxide film (SiO ₂ ), a nitride film, or a multilayer film thereof which is frequently used in the semiconductor manufacturing process has been frequently used.

Since the oxide film and the nitride film used as the insulating film 15 are also used for protecting the gate oxide film and the base of the semiconductor element itself such as MOSFET and bipolar transistor, the number of steps is hardly increased and moreover. Number 10 Angstrom (A)
The film thickness can be controlled in units of, and it has been useful as a highly accurate capacitive element. The other electrode of the capacitive element in FIG. 4 is a wide electrode 17 on the insulating film 15.

[0005]

As is well known, the capacitance C of the capacitive element is expressed by the following equation (1).

[0006]

Therefore, there are ε _r , S and d as parameters that influence the capacitance value C.

However, in the conventional capacitive element, a nitride film (relative permittivity = 7) or an oxide film (relative permittivity = 4) having a relatively low relative permittivity or a multilayer film thereof is used as the capacitor film. Therefore, in order to obtain the capacitance value C above a certain level, either the area S must be increased or the film thickness d must be extremely thin, which is an obstacle to high integration in the former method, and the film thickness in the latter method. There is a high possibility that problems will occur in the reliability of the film such as the controllability of the device and the increase of leakage current, and neither method can be said to be appropriate, and it will fully meet the challenges of higher integration and higher reliability that will continue to progress in the future. I can't.

On the other hand, in order to solve these problems, thin films made of materials such as Ta ₂ O ₅ , PZT, and SrTiO ₃ having a large relative dielectric constant have been receiving attention in recent years. Since these thin films have a large non-dielectric constant, a capacitance value of several times to several tens of times can be realized even in the same area as a conventional capacitive element, but on the other hand,
There is a problem that the overall capacitance value is significantly reduced by a reaction product such as an extremely thin oxide film interposed between the upper or lower electrode and the capacitance film. These reactants are often easily formed when a thin film is grown by, for example, a sputtering method. FIG. 5 shows an example thereof. In FIG. 5, for example, Ta
_{It is shown that, when 2} O ₅ is used for the capacitance film, for example, an oxide film is interposed between Ta ₂ O ₅ and the lower electrode.

The capacitance value C of the entire capacitive element at this time is expressed by the following equation (2).

[0011]

Therefore, as is clear from the equation (2), the capacitance value C is greatly reduced as a whole due to the interposition of the oxide film having a much smaller relative dielectric constant. In addition, the reaction products at this time are often thin, and the thinner the reaction products are, the smaller the influence on the capacity value is.However, it is almost impossible to control the formation of these products. This causes a large variation in the value C, which makes stable circuit operation impossible.

[0013]

A feature of the present invention is that a first electrode (lower electrode) on a semiconductor substrate, which is made of at least one or more wiring materials and has a barrier metal as an uppermost layer.
A dielectric film on the electrode to serve as a capacitance, and a second electrode on the dielectric film having at least one barrier metal and made of at least one wiring material (upper part). And a method for manufacturing the same. Pt,
It is preferable to use a metal layer made of any one of Pd, Ta, and TiN or a composite film thereof as a barrier metal. Further, it is preferable to use a perovskite oxide film or Ta ₂ O ₅ as the dielectric film.

[0014]

1 shows a first embodiment in which the present invention is applied to a MIS capacitor. First, after forming the isolation oxide film 2 on the semiconductor substrate 1, the sub-contact 3 is opened and the high-concentration impurity layer 4 is formed. Here, the high-concentration layer is for making ohmic contact, and in this example, N-type impurities are used. However, this may be changed according to the conductivity type of the substrate, and P-type impurities may be used in the P-type substrate. Good. (Fig. 1
(A)).

Next, the first electrode 5 to be the lower electrode is laminated by the sputtering method or the like, and the photoresist 6 is selectively left by using the photolithography technique. At this time, the first electrode 5 may be a single layer or two or more layers, but at least the uppermost layer film is a reaction product at the interface between the capacitance film and the electrode when the capacitance film is formed in a later step. Any material (barrier metal) that can prevent the generation of is generated.
For example, Pt (platinum), TiN (titanium nitride), Pd
(Palladium) and the like (FIG. 1 (b)). Of course, a composite film of these barrier metals may be used. In addition, the metal layer below the metal that serves as a barrier is usually formed of Al.
(Aluminum) and its alloys (Al / Si / Cu, A
1 / Si, etc.), polysilicon, refractory metal and its silicide, Au (gold), etc.

Further, after selectively etching the first electrode by RIE or the like, an interlayer film 7 as an insulating film is formed by using, for example, a plasma nitride film or the like, and then a capacitance film is formed by, for example, dry etching or the like. The part is selectively opened. Here, as the interlayer film, in addition to the above-mentioned plasma nitride film, an atmospheric pressure CVD oxide film or a plasma oxide film / SLON is used.
Membranes, etc., and composite membranes of these membranes can be mentioned (Fig. 1
(C)).

After that, a capacitor film is laminated and selectively etched, and then the second electrode 9 is formed by a sputtering method or the like and selectively etched to complete the capacitor element. Here, the second electrode 9 may be a single layer or two or more layers, as in the case of the first electrode, as long as the layer in contact with the capacitance film is a barrier metal. Further, as the capacitance film 8, Ta ₂ O ₅ , PZT, SrTiO ₃ , BaSrTi are used.
O3 etc. are mentioned. In addition, of course, in this second electrode, the metal in the upper layer of the barrier metal is A
1 and its alloys, refractory metals and silicides, and metals such as Au (FIG. 1D).

In these series of steps, the thickness of the capacitive film, each barrier metal, and the upper and lower electrodes can be determined by the required capacitance value and the magnitude of the barrier property. For example, when SrR: O ₃ (ε _r = 200) having a thickness of 150 nm is adopted as the capacitance film, the capacitance value per unit area is about 12 fF / μm ₂
Will be obtained. This is a value that is nearly ten times that of a nitride film (ε _r = 7) having a thickness of 50 nm.

FIG. 2 shows a second embodiment of the present invention. In this example, MIM (Metal Insulator Meta)
1) It is an example applied to a capacity. First, the isolation oxide film 2 is grown on the semiconductor substrate 1 to form the first electrode. The characteristics required for this first electrode layer are the same as those shown in the first embodiment (FIG. 2A). Next, the interlayer film 7 is selectively formed by using the photolithography method (FIG. 2B). Further, after forming the dielectric film 8, the second electrode 9 and the first electrode lead-out wiring 10 are formed to complete the capacitor element (FIG. 2C).

FIG. 3 shows a third embodiment applied to the multi-layer wiring process of the present invention, in which the capacitive element of the present invention is formed on the third electrode 12 and the second interlayer film 11 via through holes. Shows the case. In this example, the first electrode 5 of the capacitive element is in electrical contact with the through hole 13, but the second electrode 9 is the third electrode 12 and the through hole 13.
It goes without saying that the same can be done when contact is made with.

[0021]

As described above, in the present invention, when a dielectric film having a large relative permittivity is used as a capacitance film, a reaction product such as an oxide film between the dielectric and the upper and lower electrode layers, which becomes an obstacle, is generated. Therefore, a capacitance value equal to or larger than that of the conventional capacitance element can be realized with a much smaller occupied area, a large contribution can be made to high integration, and a stable capacitance value can always be obtained.

In the present invention, not only the MIS capacitance but also the MIM capacitance can be easily realized, so that the parasitic capacitance can be reduced and the circuit operation at high frequency and high speed can be performed as compared with the conventional capacitive element.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of a first embodiment.

FIG. 2 is an explanatory diagram of a second embodiment.

FIG. 3 is an explanatory diagram of a third embodiment.

FIG. 4 is an explanatory diagram showing a conventional technique.

FIG. 5 is an explanatory diagram showing a conventional technique.

[Explanation of symbols]

 1 Semiconductor Substrate 2 Separation Oxide Film 3 Sub-Contact 4 High Concentration Impurity Layer 5 First Electrode 6 Photoresist 7 Interlayer Film 8 Capacitance Film 9 Second Electrode 10 First Electrode Lead Wire 11 Second Interlayer Film 12 Third electrode 13 Through hole 14 P-type semiconductor substrate 15 Insulating film 16 N-type high concentration layer 17 Electrode 18 Reactant

Claims (8)

[Claims] 1. A first electrode on a semiconductor substrate made of at least one wiring material and having a barrier metal as an uppermost layer, a dielectric film on the electrode to be a capacitor, and the dielectric film. A capacitive element comprising a barrier metal as a lowermost layer on a body film and a second electrode made of at least one wiring material. 2. The barrier metal according to claim 1, which is P
A capacitive element having a metal layer made of any one of t, Pd, Ta, and TiN or a composite film thereof. 3. A capacitive element comprising a dielectric film of a perovskite oxide film as the dielectric film of claim 1. 4. The dielectric film according to claim 1, which is Ta ₂
A capacitive element having a film made of O ₅ . 5. A step of forming a first electrode made of at least one wiring material and having a barrier metal on the uppermost layer on a semiconductor substrate, a step of growing and selectively forming an insulating film, and the dielectric layer. A method of manufacturing a capacitive element, comprising: forming a second electrode having a barrier metal on the lowermost layer on the body layer and made of at least one or more wiring materials. 6. The barrier metal according to claim 5, which is P
A method of manufacturing a capacitive element, comprising a metal layer made of any one of t, Pd, Ta, and TiN or a composite film thereof. 7. A method of manufacturing a capacitive element, comprising a perovskite oxide dielectric film as the dielectric film according to claim 5. 8. The dielectric film according to claim 5 is Ta ₂
A method of manufacturing a capacitive element comprising a film made of O ₅ .