JPH0547587A - Thin film capacitor and manufacture thereof - Google Patents

Thin film capacitor and manufacture thereof

Info

Publication number
JPH0547587A
JPH0547587A JP3223683A JP22368391A JPH0547587A JP H0547587 A JPH0547587 A JP H0547587A JP 3223683 A JP3223683 A JP 3223683A JP 22368391 A JP22368391 A JP 22368391A JP H0547587 A JPH0547587 A JP H0547587A
Authority
JP
Japan
Prior art keywords
electrode
thin film
silicon
film
film capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3223683A
Other languages
Japanese (ja)
Other versions
JPH0748448B2 (en
Inventor
Shogo Matsubara
正吾 松原
Toshiyuki Sakuma
敏幸 佐久間
Koichi Takemura
浩一 竹村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3223683A priority Critical patent/JPH0748448B2/en
Publication of JPH0547587A publication Critical patent/JPH0547587A/en
Publication of JPH0748448B2 publication Critical patent/JPH0748448B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

PURPOSE:To provide an LSI thin film capacitor of large capacity where ferroelectrics represented by PZT is used, and a low dielectric constant layer is hardly formed between a dielectrics and a lower electrode. CONSTITUTION:A first electrode 4 of silicon, silicide, or silicon-containing conductor is formed on a board 1, a second electrode 6 of oxygen-containing Ta, a Pt electrode 5, a dielectric film 7, and an upper electrode 9 are successively laminated on a board 1 for the formation of a thin film capacitor of this design.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は占有面積が小さく、高集
積化に適した薄膜キャパシタとその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film capacitor occupying a small area and suitable for high integration, and a method of manufacturing the same.

【0002】[0002]

【従来の技術】集積回路技術の発達によって電子回路は
近年ますます小型化しており、各種電子回路に必須の回
路素子であるコンデンサの小型化も一段と重要になって
いる。このコンデンサとしては、誘電体薄膜を用いた薄
膜コンデンサがトランジスタ等の能動素子と同一の基板
上に形成されて利用されているが、能動素子の小型化が
急速に進む中で薄膜コンダンサの小型化は遅れており、
より一層の高集積化を阻む大きな要因となってきてい
る。これは、従来用いられている誘電体薄膜材料が、S
iO2,Si34等のような誘電率がたかだか10以下
の材料に限られているためであり、薄膜コンデンサを小
型化する手段として誘電率の大きな誘電体薄膜を開発す
ることが必要となっている。化学式ABO3で表される
ペロブスカイト型酸化物であるBaTiO3,SrTi
3,PbZrO3およびイルメナイト型酸化物LiNb
3あるいはBi4Ti312等の強誘電体に属する酸化
物は、上記の単一組成並びに相互の固溶体組成で、単結
晶あるいはセラミックにおいて100以上10000に
も及ぶ誘電率を有することが知られており、セラミック
・コンデンサに広く用いられている。これらの材料の薄
膜化は上述の薄膜コンデンサの小型化に極めて有効であ
り、かなり以前から研究が行われている。それらの中で
比較的良好な特性が得られている例としては、プロシー
ディング・オブ・ザ・アイ・イ−・イ−・イ−(Proceed
ings of the IEEE),第59巻,10号,1440−14
47頁に所載の論文があり、スパッタリングによる成膜
および熱処理を行ったBaTiO3薄膜で、16(室温
で作成)から1900(1200℃で熱処理)の誘電率
が得られている。
2. Description of the Related Art Electronic circuits have become smaller and smaller in recent years due to the development of integrated circuit technology, and miniaturization of capacitors, which are indispensable circuit elements for various electronic circuits, has become more important. As this capacitor, a thin film capacitor using a dielectric thin film is used by forming it on the same substrate as active elements such as transistors, but with the rapid miniaturization of active elements, downsizing of thin film capacitors Is late,
It has become a major factor that prevents further high integration. This is because the conventional dielectric thin film material is S
This is because materials such as iO 2 and Si 3 N 4 having a dielectric constant of 10 or less are limited, and it is necessary to develop a dielectric thin film having a large dielectric constant as a means for miniaturizing a thin film capacitor. Is becoming BaTiO 3 , SrTi, which is a perovskite type oxide represented by the chemical formula ABO 3.
O 3 , PbZrO 3 and ilmenite type oxide LiNb
It is known that oxides belonging to ferroelectrics such as O 3 and Bi 4 Ti 3 O 12 have the above single composition and mutual solid solution composition, and have a dielectric constant of 100 to 10,000 in a single crystal or ceramic. Are widely used in ceramic capacitors. Thinning these materials is extremely effective for miniaturizing the above-mentioned thin film capacitor, and research has been conducted for quite some time. Among them, as an example in which relatively good characteristics are obtained, Proceeding of the Eye Lee Lee
ings of the IEEE), Volume 59, Issue 10, 1440-14
There is a paper published on page 47. A BaTiO 3 thin film formed by sputtering and heat-treated has a dielectric constant of 16 (prepared at room temperature) to 1900 (heat-treated at 1200 ° C.).

【0003】一方、現在の高集積回路に広く用いられて
いる電極材料は多結晶シリコンあるいはシリコン基板自
体の一部に不純物を高濃度にドーピングした低抵抗シリ
コン層である。以下これらを総してシリコン電極と呼
ぶ。シリコン電極は微細加工技術が確立されており、す
でに広く用いられているため、シリコン電極上に良好な
高誘電率薄膜が作製できれば、集積回路用コンデンサへ
の利用が可能となる。このような従来技術としては、例
えばIBM・ジャーナル・オブ・リサーチ・アンド・デ
ィベロップメント(IBM Journal of Research and Devel
opment),1969年,11月号,686−695頁に所
載のSrTiO3膜に関する論文、あるいはジャーナル
・オブ・バキューム・サイエンス・アンド・テクノロジ
ー(Journalof Vacuum Science and Technology), 第1
6巻,2号,315−318頁に所載のBaTiO3
関する論文がある。しかし、前述のように高誘電率を得
るためには高い成膜温度を必要とするために、従来シリ
コン電極上に作成されているBaTiO3等の誘電体薄
膜は約100オングストロームの二酸化シリコン(Si
2)に等価な層が界面に形成されてしまうと報告され
ている。この界面層は誘電率が低い層であるため、結果
としてシリコン上に形成した高誘電率薄膜の実効的な誘
電率は大きく低下してしまい、高誘電率材料を用いる利
点がほとんど損なわれていた。これに対して本出願人は
シリコン電極上にTa,Ti,W等の高融点金属とP
t,Pd等の高融点貴金属とを積層形成したものをバリ
ア層として用いることによって誘電率の低下を防ぐこと
ができることを特開平1−238484号公報に開示し
ている。
On the other hand, the electrode material which is widely used at present in highly integrated circuits is polycrystalline silicon or a low resistance silicon layer in which a part of the silicon substrate itself is highly doped with impurities. Hereinafter, these are collectively called a silicon electrode. Since a fine processing technique has been established for silicon electrodes and is already widely used, if a good high-dielectric-constant thin film can be formed on silicon electrodes, it can be used for capacitors for integrated circuits. Examples of such conventional technology include, for example, IBM Journal of Research and Development.
opment), 1969 years, the November, paper on SrTiO 3 film of Shosai pp. 686-695 or Journal of Vacuum Science and Technology, (Journalof Vacuum Science and Technology) , the first
Volume 6, No. 2, pages 315-318 has a paper on BaTiO 3 . However, since a high film forming temperature is required to obtain a high dielectric constant as described above, a dielectric thin film such as BaTiO 3 conventionally formed on a silicon electrode is about 100 angstroms of silicon dioxide (Si).
It is reported that a layer equivalent to O 2 ) is formed at the interface. Since this interface layer has a low dielectric constant, the effective dielectric constant of the high-dielectric-constant thin film formed on silicon was greatly reduced as a result, and the advantage of using a high-dielectric constant material was almost lost. .. On the other hand, the applicant of the present invention has found that a refractory metal such as Ta, Ti, or W and P
Japanese Unexamined Patent Publication (Kokai) No. 1-238484 discloses that a decrease in the dielectric constant can be prevented by using, as a barrier layer, a laminate of high melting point noble metals such as t and Pd.

【0004】[0004]

【発明が解決しようとする課題】前述のように、更に高
い誘電率を得るためには成膜温度は高いほど良い。しか
しながら特開平1−238484号公報を用いた手法で
はバリア層の耐熱温度は600℃以下であり、バリア特
性の高温化が要求されている。本発明は、このような従
来の問題点を解決して、誘電体と電極との拡散反応で低
誘電率層が形成されることがなく、小さな面積で大きな
容量値を実現できる薄膜キャパシタを提供することを目
的とする。
As described above, in order to obtain a higher dielectric constant, the higher the film forming temperature, the better. However, in the method using Japanese Unexamined Patent Publication No. 1-238484, the heat resistance temperature of the barrier layer is 600 ° C. or lower, and it is required to raise the barrier characteristics at a high temperature. The present invention solves such conventional problems, and provides a thin film capacitor capable of realizing a large capacitance value in a small area without forming a low dielectric constant layer due to a diffusion reaction between a dielectric and an electrode. The purpose is to do.

【0005】[0005]

【課題を解決するための手段】本発明は、基板上にシリ
コン、シリサイド、あるいはシリコンを含有する導体か
らなる第1電極と、酸素を含有するTaからなる第2電
極と、Pt電極と、誘電体膜と、上部電極とを順次積層
した構造であることを特徴とする薄膜キャパシタであ
る。本発明において、第2電極は、酸素のタンタルに対
する原子分率O/Taが1.8以下であることを好適と
する。またその製造方法は、基板上に、シリコン、シリ
サイド、あるいはシリコンを含有する導体からなる第1
電極、TaおよびPtを順次積層形成した後に、酸素雰
囲気中、450〜800℃の温度で熱処理を施して酸素
を含有するTaからなる第2電極を作製する工程を備え
たことを特徴とする。
According to the present invention, a first electrode made of silicon, a silicide, or a conductor containing silicon, a second electrode made of Ta containing oxygen, a Pt electrode, and a dielectric are provided on a substrate. A thin film capacitor having a structure in which a body film and an upper electrode are sequentially stacked. In the present invention, it is preferable that the second electrode has an atomic fraction O / Ta of oxygen with respect to tantalum of 1.8 or less. In addition, the manufacturing method is the first method of forming a conductor containing silicon, silicide, or silicon on the substrate.
After the electrode, Ta and Pt are sequentially laminated and formed, a heat treatment is performed at a temperature of 450 to 800 ° C. in an oxygen atmosphere to produce a second electrode made of Ta containing oxygen.

【0006】[0006]

【実施例】次に、本発明の実施例について説明する。 実施例1 図1は本発明をMIS(Metal Insulator Semiconducto
r)容量に適用した実施例を示す。まず、半導体基板1に
分離用酸化膜2を成長した後、サブコンタクト3を開口
し高濃度不純物層(第1電極)4を形成する。ここで高
濃度層はオーミックコンタクトをとるためのものであ
り、第1電極に相当する。本例ではN型の不純物を用い
ているが、これは基板の導電型に応じて変えればよく、
P型基板ではP型不純物を使用すればよい。また、第1
電極としてはシリコンの他、シリサイドあるいはシリコ
ンを含有する導体であってもよい。次にTa電極とPt
電極5をスパッタ法等により積層し、酸素雰囲気中で熱
処理を行うことによってTa層に酸素を含有せしめて第
2電極6を形成する。その後、フォトリソグラフィー技
術等を用いて選択的にPt電極5と第2電極6を第1電
極4上に形成する。更に容量膜7を、例えばスパッタ法
などで成膜して選択的にPt電極5上に形成する。ここ
で容量膜7としては、例えばSrTiO3,BaTi
3,PZT等が挙げられる。しかるのち、保護用の層
間膜8を積層し、容量膜7の上部のみを開口し、上部電
極9をスパッタ法などで成膜して選択的にエッチングし
て、容量素子は完成する。これらの一連の工程で容量膜
や各電極の厚さは必要とする容量値やバリア性の大小で
決定できる。
EXAMPLES Next, examples of the present invention will be described. Example 1 FIG. 1 illustrates the present invention by MIS (Metal Insulator Semiconducto).
r) An example applied to capacity is shown. First, after the isolation oxide film 2 is grown on the semiconductor substrate 1, the sub-contact 3 is opened and the high-concentration impurity layer (first electrode) 4 is formed. Here, the high-concentration layer is for making ohmic contact and corresponds to the first electrode. In this example, N-type impurities are used, but this may be changed according to the conductivity type of the substrate.
P-type impurities may be used in the P-type substrate. Also, the first
The electrode may be a conductor containing silicide or silicon in addition to silicon. Next, Ta electrode and Pt
The electrodes 5 are stacked by a sputtering method or the like, and heat treatment is performed in an oxygen atmosphere so that the Ta layer contains oxygen and the second electrode 6 is formed. After that, the Pt electrode 5 and the second electrode 6 are selectively formed on the first electrode 4 by using a photolithography technique or the like. Further, a capacitance film 7 is formed by, for example, a sputtering method or the like, and selectively formed on the Pt electrode 5. Here, as the capacitance film 7, for example, SrTiO 3 or BaTi is used.
Examples include O 3 and PZT. After that, a protective interlayer film 8 is laminated, only the upper part of the capacitor film 7 is opened, and an upper electrode 9 is formed by a sputtering method or the like and selectively etched to complete the capacitor element. Through these series of steps, the thickness of the capacitance film and each electrode can be determined by the required capacitance value and the magnitude of the barrier property.

【0007】上記の酸素雰囲気中での熱処理温度を変化
させた時の容量膜の成膜温度と、容量膜の誘電率との関
係を図2に示す。容量膜としては膜厚約100nmのB
aTiO3を用いた。図2において、曲線aは熱処理温
度が400℃以下の場合、曲線bは熱処理温度が450
℃以上800℃以下の場合、曲線cは熱処理温度が85
0℃以上の場合の、それぞれ典型的な誘電率と成膜温度
の関係である。曲線aでは膜の誘電率は成膜温度と共に
増加するが、650℃の成膜温度で著しく低下する。曲
線bでは誘電率は800℃の成膜温度まで単調に増加す
る。曲線cでも誘電率は成膜温度と共に単調に増加する
が、曲線bに比べて値が小さく、しかも、600℃以上
の成膜温度域で誘電率がある一定の値に近づく傾向があ
る。Rutherford backscattering spectroscopy(RB
S)法で組成分析を行った結果、熱処理400℃以下で
はTa層はほとんど酸素を含まないが、450℃以上8
00℃以下では第2電極であるTa層が原子分率O/T
a=1.8以下の割合で酸素を含んでいることが分かっ
た。一方、熱処理850℃以上では第2電極内の酸素量
が多くなり、2<O/Ta<2.5であった。以上の結
果から、Ta層のSiに対するバリア特性はTa中に0
<O/Ta<1.8の酸素が含まれることによって著し
く向上することが分かる。但し、O/Ta>2になると
絶縁性の五酸化タンタル層が形成されて実効誘電率が低
下するものと考えられる。
FIG. 2 shows the relationship between the film formation temperature of the capacitance film and the dielectric constant of the capacitance film when the heat treatment temperature in the oxygen atmosphere is changed. As a capacitance film, B with a film thickness of about 100 nm
aTiO 3 was used. In FIG. 2, a curve a has a heat treatment temperature of 400 ° C. or lower, and a curve b has a heat treatment temperature of 450 ° C.
In the case of ℃ or more and 800 ℃ or less, the heat treatment temperature of the curve c is 85
When the temperature is 0 ° C. or higher, there are typical relationships between the dielectric constant and the film formation temperature. In the curve a, the dielectric constant of the film increases with the film forming temperature, but it significantly decreases at the film forming temperature of 650 ° C. In the curve b, the dielectric constant monotonically increases up to the film forming temperature of 800 ° C. Also in the curve c, the dielectric constant monotonously increases with the film forming temperature, but the value is smaller than that in the curve b, and the dielectric constant tends to approach a certain value in the film forming temperature range of 600 ° C. or higher. Rutherford backscattering spectroscopy (RB
As a result of composition analysis by the S) method, the Ta layer contains almost no oxygen at a heat treatment of 400 ° C. or lower, but 450 ° C. or higher 8
At 00 ° C or lower, the Ta layer, which is the second electrode, has an atomic fraction O / T.
It was found that oxygen was contained at a ratio of a = 1.8 or less. On the other hand, when the heat treatment was 850 ° C. or higher, the amount of oxygen in the second electrode was large, and 2 <O / Ta <2.5. From the above results, the barrier property of the Ta layer against Si is 0 in Ta.
It can be seen that the inclusion of oxygen of <O / Ta <1.8 significantly improves. However, it is considered that when O / Ta> 2, an insulating tantalum pentoxide layer is formed and the effective dielectric constant is lowered.

【0008】実施例2 図3に本発明の第2の実施例を示す。本例はMIM (Me
tal Insulator Metal)容量に適用した例である。まず、
半導体基板1上に分離用酸化膜2を成長し、シリコン、
シリサイドあるいはシリコンを含む導体からなる第1電
極4を形成する。この第1電極上の少なくとも容量膜を
形成する部分に酸素を含有するTaからなる第2電極6
とPt電極5を形成する。第2電極の作製法は実施例1
と同様であり、酸素雰囲気中での熱処理温度は600℃
とした。次に容量膜7を成膜後選択的に形成する。更に
層間膜8を形成した後、上部電極9および第1電極引出
し用配線10を形成して容量素子は完成する。本容量素
子においても実施例1中の図2の曲線bと同等な誘電率
と成膜温度の関係が得られた。
Embodiment 2 FIG. 3 shows a second embodiment of the present invention. This example is MIM (Me
tal Insulator Metal) This is an example applied to capacitance. First,
A separation oxide film 2 is grown on a semiconductor substrate 1, silicon,
The first electrode 4 made of a conductor containing silicide or silicon is formed. The second electrode 6 made of Ta containing oxygen in at least the portion where the capacitance film is formed on the first electrode 6.
And the Pt electrode 5 are formed. The manufacturing method of the second electrode is the first embodiment.
The heat treatment temperature in oxygen atmosphere is 600 ℃
And Next, the capacitor film 7 is formed and then selectively formed. Further, after forming the interlayer film 8, the upper electrode 9 and the wiring 10 for leading out the first electrode are formed to complete the capacitive element. Also in this capacitive element, the same relationship between the dielectric constant and the film forming temperature as the curve b of FIG. 2 in Example 1 was obtained.

【0009】[0009]

【発明の効果】以上述べたように、本発明では誘電率が
大きい誘電体膜を使用するうえで、誘電体と電極との拡
散反応による低誘電率層の形成を防ぐことができるた
め、従来の容量素子に比べてはるかに小さい面積で同等
以上の容量値を実現でき、高集積化に大きく貢献でき
る。
As described above, according to the present invention, when a dielectric film having a large dielectric constant is used, it is possible to prevent the formation of a low dielectric constant layer due to a diffusion reaction between the dielectric and the electrode. It is possible to realize a capacitance value equal to or greater than that of the above-mentioned capacitive element in a much smaller area, and it is possible to greatly contribute to high integration.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の断面図である。FIG. 1 is a sectional view of an embodiment of the present invention.

【図2】成膜温度と誘電率との関係を示す図である。FIG. 2 is a diagram showing a relationship between a film forming temperature and a dielectric constant.

【図3】本発明の別の一実施例の断面図である。FIG. 3 is a sectional view of another embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 半導体基板 2 分離用酸化膜 3 サブコンタクト 4 第1電極 5 Pt電極 6 第2電極 7 容量膜 8 層間膜 9 上部電極 10 第1電極引出し用配線 1 Semiconductor Substrate 2 Separation Oxide Film 3 Sub-Contact 4 First Electrode 5 Pt Electrode 6 Second Electrode 7 Capacitance Film 8 Interlayer Film 9 Upper Electrode 10 First Electrode Wiring

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 基板上にシリコン、シリサイド、あるい
はシリコンを含有する導体からなる第1電極と、酸素を
含有するTaからなる第2電極と、Pt電極と、誘電体
膜と、上部電極とを順次積層した構造であることを特徴
とする薄膜キャパシタ。
1. A first electrode made of a conductor containing silicon, silicide or silicon, a second electrode made of Ta containing oxygen, a Pt electrode, a dielectric film and an upper electrode are formed on a substrate. A thin film capacitor having a structure in which layers are sequentially stacked.
【請求項2】 第2電極は、酸素のタンタルに対する原
子分率O/Taが1.8以下である請求項1記載の薄膜
キャパシタ。
2. The thin film capacitor according to claim 1, wherein the second electrode has an atomic fraction O / Ta of oxygen with respect to tantalum of 1.8 or less.
【請求項3】 請求項1記載の薄膜キャパシタの製造方
法であって、基板上に、シリコン、シリサイド、あるい
はシリコンを含有する導体からなる第1電極、Taおよ
びPtを順次積層形成した後に、酸素雰囲気中、450
〜800℃の温度で熱処理を施して酸素を含有するTa
からなる第2電極を作製する工程を備えたことを特徴と
する薄膜キャパシタの製造方法。
3. The method of manufacturing a thin film capacitor according to claim 1, wherein a first electrode made of silicon, a silicide, or a conductor containing silicon, Ta and Pt are sequentially laminated on the substrate, and then oxygen is formed. In the atmosphere, 450
Ta containing oxygen by heat treatment at a temperature of ~ 800 ° C
A method of manufacturing a thin film capacitor, comprising the step of producing a second electrode made of
JP3223683A 1991-08-09 1991-08-09 Thin film capacitor and manufacturing method thereof Expired - Fee Related JPH0748448B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3223683A JPH0748448B2 (en) 1991-08-09 1991-08-09 Thin film capacitor and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3223683A JPH0748448B2 (en) 1991-08-09 1991-08-09 Thin film capacitor and manufacturing method thereof

Publications (2)

Publication Number Publication Date
JPH0547587A true JPH0547587A (en) 1993-02-26
JPH0748448B2 JPH0748448B2 (en) 1995-05-24

Family

ID=16802014

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3223683A Expired - Fee Related JPH0748448B2 (en) 1991-08-09 1991-08-09 Thin film capacitor and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JPH0748448B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0698490A2 (en) 1994-08-25 1996-02-28 Seiko Epson Corporation Liquid jet head
US7057877B2 (en) 2003-08-27 2006-06-06 Seiko Epson Corporation Capacitor, method of manufacture thereof and semiconductor device
US7176100B2 (en) 2004-01-29 2007-02-13 Seiko Epson Corporation Capacitor and its manufacturing method, and semiconductor device
US7190567B2 (en) 2003-12-04 2007-03-13 Seiko Epson Corporation Capacitor and its manufacturing method, and semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0338809A (en) * 1989-07-05 1991-02-19 Nec Corp Tantalum thin-film capacitor
JPH03101260A (en) * 1989-09-14 1991-04-26 Nec Corp Thin film capacitor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0338809A (en) * 1989-07-05 1991-02-19 Nec Corp Tantalum thin-film capacitor
JPH03101260A (en) * 1989-09-14 1991-04-26 Nec Corp Thin film capacitor

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0698490A2 (en) 1994-08-25 1996-02-28 Seiko Epson Corporation Liquid jet head
US7057877B2 (en) 2003-08-27 2006-06-06 Seiko Epson Corporation Capacitor, method of manufacture thereof and semiconductor device
US7190567B2 (en) 2003-12-04 2007-03-13 Seiko Epson Corporation Capacitor and its manufacturing method, and semiconductor device
US7176100B2 (en) 2004-01-29 2007-02-13 Seiko Epson Corporation Capacitor and its manufacturing method, and semiconductor device

Also Published As

Publication number Publication date
JPH0748448B2 (en) 1995-05-24

Similar Documents

Publication Publication Date Title
JP3369827B2 (en) Semiconductor device and manufacturing method thereof
US5053917A (en) Thin film capacitor and manufacturing method thereof
EP0618597B1 (en) Lightly donor doped electrodes for high-dielectric-constant materials
US5489548A (en) Method of forming high-dielectric-constant material electrodes comprising sidewall spacers
JP3319994B2 (en) Semiconductor storage element
US5965942A (en) Semiconductor memory device with amorphous diffusion barrier between capacitor and plug
EP0697719A2 (en) Microelectronic structure including a conductive exotic-nitride barrier layer for high-dielectric-constant material electrodes and method of fabricating the same
EP0697720A1 (en) A conductive amorphous-nitride barrier layer for high dielectric-constant material electrodes
JP2002534818A (en) Semiconductor structural element and method of manufacturing the same
JPH05259391A (en) Ferroelectric capacitor and manufacture therefor
US8946044B2 (en) Semiconductor device and method of manufacturing semiconductor device
JP2002043517A (en) Semiconductor device and its manufacturing method
JPH09246490A (en) Semiconductor device and manufacture thereof
JPH03101260A (en) Thin film capacitor
US7868420B2 (en) Semiconductor device which includes a capacitor and an interconnection film coupled to each other and a manufacturing method thereof
JP2874512B2 (en) Thin film capacitor and method of manufacturing the same
JPH0547587A (en) Thin film capacitor and manufacture thereof
JP3123448B2 (en) Thin film capacitors
JPH0982915A (en) Manufacture of semiconductor device
JP3212194B2 (en) Method for manufacturing semiconductor device
JP3120568B2 (en) Thin film capacitors
JPH03257857A (en) Thin film capacitor and manufacture thereof
JPH0387056A (en) Thin film capacitor and manufacture thereof
JP2005026345A (en) Ferroelectric capacitor, semiconductor device equipped therewith, manufacturing method thereof, and manufacturing method of semiconductor device
JPH0624222B2 (en) Method of manufacturing thin film capacitor

Legal Events

Date Code Title Description
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090524

Year of fee payment: 14

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100524

Year of fee payment: 15

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110524

Year of fee payment: 16

LAPS Cancellation because of no payment of annual fees