JPH05241976A - Main storage controller - Google Patents

Abstract

PURPOSE:To perform an access operation to main storage and the diagnostic operation of the main storage simultaneously by performing diagnosis on a bank that is a diagnosis target in parallel with access control. CONSTITUTION:When a diagnosis control part 4 performs the diagnosis on the banks 3-1 to 3-n, the content of the bank 3-1 is loaded on the bank 2 for diagnosis by the diagnosis control part 4. The diagnosis control part 4, when loading the content of the bank 3-1 on the bank 2 for diagnosis, informs the fact to a central processing unit 1. The central processing unit 1, when receiving such information from the diagnosis control part 4, switches access to the bank 3-1 to the bank 2 for diagnosis, and continues an ordinary operation via a bus 100. After that, the diagnosis control part 4 performs the diagnostic operation for the bank 3-1 via a bus 101 in parallel with the ordinary operation of the central processing unit 1. Also, the diagnosis control part 4, when detecting abnormality in the bank 3-1, informs the abnormality of the bank 3-1 to the central processing unit 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a main memory controller, and more particularly to a method of diagnosing a main memory controlled by the main memory controller.

[0002]

2. Description of the Related Art Conventionally, in a main memory controller, as shown in FIG. 2, a central processing unit (CPU) 1 and a diagnostic control unit are connected via a bus 200 having a common main memory composed of banks 3-1 to 3-n. It is connected to the part 5. In other words, the access to the banks 3-1 to 3-n by the central processing unit 1 and the diagnosis of the banks 3-1 to 3-n by the diagnostic control unit 5 are performed via the common bus 200. There is.

In such a conventional main memory control device, since the central processing unit 1 and the diagnostic control unit 5 are connected to the banks 3-1 to 3-n via the common bus 200, respectively,
Access operation to the banks 3-1 to 3-n by the central processing unit 1 and the banks 3-1 to 3-n by the diagnostic control unit 5.
However, there is a drawback in that the diagnostic operation cannot be performed simultaneously and the performance cannot be improved.

[0004]

SUMMARY OF THE INVENTION The present invention has been made to eliminate the above-mentioned drawbacks of the prior art, and it is possible to simultaneously perform an access operation to the main memory and a diagnosis operation of the main memory,
An object of the present invention is to provide a main memory control device capable of improving performance.

[0005]

A main memory control device according to the present invention is a main memory control device for controlling access to a main memory device composed of a plurality of banks, and stores the contents of a bank to be diagnosed when diagnosing the main memory device. Holding means for holding, and a diagnostic means for diagnosing the bank to be diagnosed in parallel with access control to the main storage device performed using the contents of the bank to be diagnosed held in the holding means. It is characterized by being provided.

[0006]

An embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In the figure, the main memory composed of banks 3-1 to 3-n is provided with a central processing unit (CPU) via a bus 100.
1 and is connected to the diagnostic control unit 4 via the bus 101. Further, the main memory is provided with a diagnostic bank 2 for holding the contents of the banks 3-1 to 3-n,
This diagnostic bank 2 is also connected to the central processing unit 1 via the bus 100.
Further, they are connected to the diagnostic control unit 4 via the bus 101, respectively.

When the diagnostic control unit 4 diagnoses the banks 3-1 to 3-n, the diagnostic control unit 4 first causes the bank 3-1.
Is loaded into diagnostic bank 2 via bus 101. When the diagnostic control unit 4 loads the contents of the bank 3-1 into the diagnostic bank 2, the diagnostic control unit 4 notifies the central processing unit 1 to that effect.

Upon receiving the notification from the diagnostic control unit 4, the central processing unit 1 switches the access to the bank 3-1 to the access to the diagnostic bank 2 and continues the normal operation as it is via the bus 100. Thereafter, the diagnostic control unit 4 performs a diagnostic operation on the bank 3-1 via the bus 101 in parallel with the normal operation of the central processing unit 1.

When the diagnostic operation for the bank 3-1 ends without any abnormality, the diagnostic control unit 4 notifies the central processing unit 1 that the diagnostic operation for the bank 3-1 is completed, and the bank 3-1 has no abnormality. The central processing unit 1 is notified to that effect. When the central processing unit 1 receives the notification from the diagnostic control unit 4, it accesses the diagnostic bank 2 to the bank 3
Switch to access to -1, and continue normal operation. still,
When the diagnosis control unit 4 detects an abnormality in the bank 3-1, the diagnosis control unit 4 notifies the central processing unit 1 of the abnormality in the bank 3-1.

Next, the diagnostic control unit 4 loads the contents of the bank 3-2 into the diagnostic bank 2 via the bus 101. When the diagnostic control unit 4 loads the contents of the bank 3-2 into the diagnostic bank 2, the diagnostic control unit 4 notifies the central processing unit 1 to that effect.

Upon receiving the notification from the diagnostic control unit 4, the central processing unit 1 switches the access to the bank 3-2 to the access to the diagnostic bank 2 and continues the normal operation as it is via the bus 100. Thereafter, the diagnostic control unit 4 performs a diagnostic operation on the bank 3-2 via the bus 101 in parallel with the normal operation of the central processing unit 1.

Thereafter, as in the above process, the diagnosis control unit 4
Loads the contents of each of the banks 3-3 to 3-n (bank 3-3 is not shown) into the diagnostic bank 2 in sequence, and then performs the diagnostic operation on the banks 3-3 to 3-n in the central processing unit 1.
Is executed sequentially in parallel with the normal operation of. The diagnostic control unit 4 executes the diagnostic operation of each of the banks 3-1 to 3-n to the last bank 3-
When the process is performed up to n, the diagnostic operation is finished.

As described above, the contents of each of the banks 3-1 to 3-n are loaded into the diagnostic bank 2, and then the diagnostic control unit 4 is loaded.
By executing the diagnostic operation of each of the banks 3-1 to 3-n in parallel with the normal operation of the central processing unit 1 using the diagnostic bank 2, the access operation to the main memory and the diagnostic operation of the main memory are simultaneously performed. It is possible to improve the performance.

The banks 3-1 to 3-1 by the diagnostic control unit 4 are also provided.
Since the diagnostic operation of each of 3-n is executed in parallel with the normal operation of the central processing unit 1, it becomes possible to detect the malfunction of each of the banks 3-1 to 3-n at an early stage.

[0016]

As described above, according to the present invention, the contents of the bank to be diagnosed are held in the diagnostic bank when the main storage device including a plurality of banks is diagnosed, and the contents of the bank are held in the diagnostic bank. The access operation to the main memory and the diagnosis operation of the main memory are performed by controlling the access to the main memory device by using the contents of the bank to be diagnosed and diagnosing the bank to be diagnosed in parallel with this access control. There is an effect that they can be performed simultaneously and the performance can be improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a conventional example.

[Explanation of symbols]

 1 CPU 2 Diagnostic Bank 3-1 to 3-n Bank 4 Diagnostic Control Unit 100, 101 Bus

Claims (1)

[Claims] 1. A main memory control device for controlling access to a main memory device comprising a plurality of banks, said holding device holding the contents of a bank to be diagnosed when diagnosing said main memory device, and said holding device. The main memory is provided with a diagnostic means for diagnosing the bank to be diagnosed in parallel with access control to the main memory device performed using the contents of the bank to be diagnosed held in Control device.