JPH0480846A - Memory diagnostic system - Google Patents

Memory diagnostic system

Info

Publication number
JPH0480846A
JPH0480846A JP2194485A JP19448590A JPH0480846A JP H0480846 A JPH0480846 A JP H0480846A JP 2194485 A JP2194485 A JP 2194485A JP 19448590 A JP19448590 A JP 19448590A JP H0480846 A JPH0480846 A JP H0480846A
Authority
JP
Japan
Prior art keywords
central processing
memory
main
processing unit
slave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2194485A
Other languages
Japanese (ja)
Inventor
Shinji Kobayashi
信二 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2194485A priority Critical patent/JPH0480846A/en
Publication of JPH0480846A publication Critical patent/JPH0480846A/en
Pending legal-status Critical Current

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  • Techniques For Improving Reliability Of Storages (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

PURPOSE:To shorten the time needed for diagnosis of a memory by generalizing and controlling the slave CPUs through a main CPU and diagnosing a memory at the rise time by plural slave CPUs in division and in parallel with each other. CONSTITUTION:A main CPU 11 and the slave CPU 12 and 13 are provided with the ROM 1, 2 and 3 respectively. The CPU 11 checks the largest main memory capacity and decides the portions of diagnostic range of a main memory 15 for each slave CPU to set these portions in a control area. Based on the contents of the control area, the memory 15 is diagnosed by the CPU 11 - 13 in parallel with each other. The CPU 11 prepares an overall diagnostic result of the memory 15 based on the contents of the diagnostic results of both CPU 12 and 13. Thus the diagnosis of the memory 15 is completed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はデータ処理装置のメモリ診断方式に関し、特に
データ処理装置が複数の中央処理装置を有する場合に、
主中央処理装置が複数の従中央処理装置にメモリ診断作
業を分担して行わせるメモリ診断方式に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a memory diagnostic method for a data processing device, particularly when the data processing device has a plurality of central processing units.
The present invention relates to a memory diagnostic method in which a main central processing unit shares memory diagnostic work with a plurality of slave central processing units.

〔従来の技術〕[Conventional technology]

従来、この種のデータ処理装置の立上げ時におけるメモ
リ診断方式は、主中央処理装置が1台のみてメモリ診断
を実施していた。
Conventionally, in a memory diagnosis method when starting up this type of data processing apparatus, only one main central processing unit performs memory diagnosis.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来のメモリ診断方式ては、1台の中央処理装
置がデータ処理装置の立上げ時におけるメモリ診断を実
施しているので、メインメモリの増加に比例してメモリ
診断時間が増加して行くために、立上は時間が長くかか
る欠点かある。
In the conventional memory diagnosis method described above, one central processing unit performs memory diagnosis when starting up a data processing device, so the memory diagnosis time increases in proportion to the increase in main memory. Therefore, the disadvantage is that it takes a long time to start up.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のメモリ診断方式はメインメモリと、少なくとも
2つの中央処理装置とをバスで接続して精成されるデー
タ処理装置における前記メインメモリのメモリ診断方式
において、 1つの主中央処理装置および少なくとも1つの従中央処
理装置がそれぞれ読出し専用メモリを有し、前記主中央
処理装置が、前記従中央処理装置の接続台数を調査して
登録する第1の手段と、前記メインメモリの容量を調査
し、前記第1の手段で登録された従中央処理装置に前記
メインメモリ容量の診断範囲を決定する第2の手段と、
前記第2の手段の情報を受けて前記従中央処理装置のそ
れぞれに前記メインメモリの診断を実施させる第3の手
段と、前記第3の手段により実施された前記従中央処置
装置の診断結果の情報を受けて分析する第4の手段とを
前記読出し専用メモリに備えている。
The memory diagnostic method of the present invention is a memory diagnostic method for the main memory in a data processing device which is refined by connecting a main memory and at least two central processing units via a bus, the method comprising: one main central processing unit and at least one central processing unit; each of the two slave central processing units has a read-only memory, the main central processing unit includes first means for checking and registering the number of connected slave central processing units, and checking the capacity of the main memory; a second means for determining a diagnosis range of the main memory capacity in the slave central processing unit registered by the first means;
third means for causing each of the slave central processing units to diagnose the main memory upon receiving information from the second means; and a third means for causing each of the slave central processing units to diagnose the main memory; and and fourth means for receiving and analyzing information in said read-only memory.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例の構成図、第2図は本実施例
の主中央処理装置11に備えられた従中央処理装置の統
轄制御手段の説明図、第3図(a)、(b)は本実施例
の各ステップ群における動作手順を説明する流れ図であ
る。(図のCPUは中央処理装置) 第1図の実施例は、バス14上に、メインメモリ15と
、データ処理装置の立上げ時に統轄して制御を行う主中
央処理装置11と、主中央処理装置11の制御によりメ
モリ診断を分担する従中央処理装置12.13とが接続
されている。主および従中央処理装置11および12.
13にはそれぞれ読出し専用メモリ1および2.3が実
装されている。この読出し専用メモリ1,2.3はそれ
ぞれ後述する第3図の流れ図に沿ったステップ群を有す
るプログラムを記憶している。主中央処理装置11は、
従中央処理装置12.13を統轄制御するので第2図に
示す3つの手順により、メモリ診断の統轄制御を行って
いる。すなわち、各従中央処理装置の有無を知らせる領
域5n−各従中央処理装置のメインメモリ診断の範囲を
知らせる領域6n、各従中央処理装置において実施した
メインメモリ診断の結果を知らせる領域7nからなって
いる。
FIG. 1 is a configuration diagram of an embodiment of the present invention, FIG. 2 is an explanatory diagram of the overall control means of the slave central processing unit provided in the main central processing unit 11 of the present embodiment, and FIG. 3(a). (b) is a flowchart explaining the operation procedure in each step group of this embodiment. (The CPU in the figure is a central processing unit.) The embodiment shown in FIG. Sub-central processing units 12 and 13 are connected which share memory diagnosis under the control of the device 11. Main and slave central processing units 11 and 12.
13 are equipped with read-only memories 1 and 2.3, respectively. The read-only memories 1, 2, and 3 each store a program having a group of steps along the flowchart of FIG. 3, which will be described later. The main central processing unit 11 is
Since the slave central processing units 12 and 13 are under general control, the three procedures shown in FIG. 2 are used to perform general control of memory diagnosis. That is, it consists of an area 5n that informs the presence or absence of each slave central processing unit, an area 6n that informs the scope of the main memory diagnosis of each slave central processor, and an area 7n that reports the results of the main memory diagnosis carried out in each slave central processor. There is.

次に具体的な本実施例の動作を第3図(a)。Next, the specific operation of this embodiment is shown in FIG. 3(a).

(b)により説明する。ステップ群1は、ステップ1〜
5の手順で動作し、各従中央処理装置の有無を制御領域
5nにセットする。すなわち、ステップ1でNOであれ
ば、メモリ診断可能な従中央処理装置が確認され、主中
央処理装置に登録される。ステップ群2はステップ6〜
10の手順で動作し、主中央処理装置にて最大メインメ
モリ容量をチエツクし、各従中央処理装置のメインメモ
リの診断範囲の分担を決め、制御領域6nにセットする
。ステップ群3はステップ11.12の手順で動作し、
制御領域6nの内容に従って各従および主中央処理装置
て並行にメモリ診断を実施する。ステップ群4はステッ
プ13.14の手順で動作し、主中央処理装置にて各従
中央処理装置の診断結果7nの内容より全体のメモリ診
断結果を作成しメモリ診断を完了する。
This will be explained using (b). Step group 1 includes steps 1-
5, and the presence/absence of each slave central processing unit is set in the control area 5n. That is, if NO in step 1, a slave central processing unit capable of memory diagnosis is confirmed and registered with the main central processing unit. Step group 2 is step 6~
10, the main central processing unit checks the maximum main memory capacity, determines the share of the diagnosis range of the main memory of each slave central processing unit, and sets it in the control area 6n. Step group 3 operates according to steps 11 and 12,
Memory diagnosis is carried out in parallel in each slave and main central processing unit according to the contents of the control area 6n. Step group 4 operates according to steps 13 and 14, and the main central processing unit creates an overall memory diagnosis result from the contents of the diagnosis results 7n of each slave central processing unit to complete the memory diagnosis.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、主中央処理装置が従中央
処理装置を統轄制御して立上げ時のメモリ診断を複数の
従中央処理装置で分担して並行に実施することにより、
メモリ診断時間を短縮する効果がある。
As explained above, the present invention allows the main central processing unit to control the slave central processing units, and performs memory diagnosis at startup in parallel among a plurality of slave central processing units.
This has the effect of shortening memory diagnosis time.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の構成図、第2図は本実施例
の説明図、第3図<a)、(b)は本実施例の動作手順
を示す流れ図である。 1.2.3・・・読出し専用メモリ、11・・・主中央
処理装置(主CPL;)12.13・・・従中央処理装
置(従CPtJ)、14・・・バス、15・・・メイン
メモリ、5n、6n、7n・・・領域。
FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is an explanatory diagram of this embodiment, and FIGS. 3A and 3B are flowcharts showing the operating procedure of this embodiment. 1.2.3... Read-only memory, 11... Main central processing unit (main CPL;) 12.13... Slave central processing unit (slave CPtJ), 14... Bus, 15... Main memory, 5n, 6n, 7n...areas.

Claims (1)

【特許請求の範囲】 1、メインメモリと、少なくとも2つの中央処理装置と
をバスで接続して構成されるデータ処理装置における前
記メインメモリのメモリ診断方式において、 1つの主中央処理装置および少なくとも1つの従中央処
理装置がそれぞれ読出し専用メモリを有し、前記主中央
処理装置が、前記従中央処理装置の接続台数を調査して
登録する第1の手段と、前記メインメモリの容量を調査
し、前記第1の手段で登録された従中央処理装置に前記
メインメモリ容量の診断範囲を決定する第2の手段と、
前記第2の手段の情報を受けて前記従中央処理装置のそ
れぞれに前記メインメモリの診断を実施させる第3の手
段と、前記第3の手段により実施された前記従中央処置
装置の診断結果の情報を受けて分析する第4の手段とを
前記読出し専用メモリに備えていることを特徴とするメ
モリ診断方式。 2、前記第1の手段、前記第2の手段および前記第4の
手段のそれぞれの動作手順の冒頭に主中央処理装置であ
るかどうかを確認するステップを有し、すべての中央処
理装置の前記読出し専用メモリに前記第1から第4の手
段までを記憶させた場合に、いずれの中央処理装置も主
中央処理装置となり得ることを特徴とする請求項1記載
のメモリ診断方式。
[Scope of Claims] 1. A memory diagnosis method for the main memory in a data processing device configured by connecting a main memory and at least two central processing units via a bus, comprising: one main central processing unit and at least one central processing unit; each of the two slave central processing units has a read-only memory, the main central processing unit includes first means for checking and registering the number of connected slave central processing units, and checking the capacity of the main memory; a second means for determining a diagnosis range of the main memory capacity in the slave central processing unit registered by the first means;
third means for causing each of the slave central processing units to diagnose the main memory upon receiving information from the second means; and a third means for causing each of the slave central processing units to diagnose the main memory; and and a fourth means for receiving and analyzing information in the read-only memory. 2. At the beginning of each operation procedure of the first means, the second means and the fourth means, the step of confirming whether the central processing unit is the main central processing unit, 2. The memory diagnostic method according to claim 1, wherein when said first to fourth means are stored in a read-only memory, any of the central processing units can serve as the main central processing unit.
JP2194485A 1990-07-23 1990-07-23 Memory diagnostic system Pending JPH0480846A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2194485A JPH0480846A (en) 1990-07-23 1990-07-23 Memory diagnostic system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2194485A JPH0480846A (en) 1990-07-23 1990-07-23 Memory diagnostic system

Publications (1)

Publication Number Publication Date
JPH0480846A true JPH0480846A (en) 1992-03-13

Family

ID=16325322

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2194485A Pending JPH0480846A (en) 1990-07-23 1990-07-23 Memory diagnostic system

Country Status (1)

Country Link
JP (1) JPH0480846A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009050764A1 (en) * 2007-10-16 2009-04-23 Fujitsu Limited Information processor for performing self-diagnosis processing, self-diagnosis processing method, and self-diagnosis processing program

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009050764A1 (en) * 2007-10-16 2009-04-23 Fujitsu Limited Information processor for performing self-diagnosis processing, self-diagnosis processing method, and self-diagnosis processing program
JP5093242B2 (en) * 2007-10-16 2012-12-12 富士通株式会社 Information processing apparatus for performing self-diagnosis processing, self-diagnosis processing method, and self-diagnosis processing program

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