JPH04256033A - Memory diagnostic system - Google Patents

Abstract

PURPOSE:To shorten the starting time of a computer system by uniformizing the load of memory diagnosis each processor bears. CONSTITUTION:The storage capacity of a memory corresponding to its own processor is detected by a storage capacity detecting part 10a. This detected result and the performance value of its own processor are reported to another processor by an information reporting part 20a. A memory diagnosis uniformizing part 30 uniformizes the processing load of the memory diagnosis on the basis of this reported information.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory diagnostic system, and more particularly to a memory diagnostic method at system start-up in a multiprocessor type computer system.

0002

[Prior Art] As a form of multi-processor type computer system, each processor has a corresponding main storage device (referred to as memory), but one processor can also access the memory corresponding to the other processor. There is a form that makes it possible.

In such a multi-processor type computer system, memory diagnosis is performed individually by each processor corresponding to each memory at the time of starting up the system.

The conventional procedure for starting up the system is as follows. First, upon system reset, each processor diagnoses its corresponding internal logic block and memory. To diagnose the memory, write and read several patterns, and check whether the written values can be read and whether the parity is correct.

[0005] After confirming that all processors are normal, the main processor loads the program for each processor into the memory for each processor. After each processor loads this program, control is transferred to the loaded program and the system starts up.

That is, when starting up a conventional multiprocessor type computer system, internal diagnosis is performed for each logical block, but this internal diagnosis requires the most time consuming memory diagnosis. Each processor is responsible for this individually.

As described above, in the conventional memory diagnosis method, the processor corresponding to each memory diagnoses the memory itself, so the storage capacity of the memory corresponding to one processor is the same as that of the memory corresponding to the other processor. If the storage capacity is larger than the storage capacity, it takes time for the processor to diagnose the memory by the amount of storage capacity, which has the disadvantage that it takes a considerable amount of time to complete the startup of the computer system.

Furthermore, even if the memory capacity corresponding to the processors is the same, if the processing capacity of one processor is higher than that of the other processor, it will take time for the other processor to diagnose the memory by the difference in processing capacity. As a result, there is a drawback that it takes a considerable amount of time to complete the startup of the computer system.

[0009]

OBJECTS OF THE INVENTION An object of the present invention is to provide a memory diagnostic system that equalizes the memory diagnostic load borne by each processor, thereby making it possible to shorten the start-up time of a computer system.

0010

[Structure of the Invention] According to the present invention, a plurality of processors;
A memory diagnostic system for a computer system that includes a plurality of memories provided corresponding to each of these processors, and each of the memories can be freely accessed from any of the processors, and the memory diagnosis system corresponds to the own processor. storage capacity detection means for detecting the storage capacity of the memory to be processed; notification means for notifying other processors of the memory capacity detection result and the performance value of the own processor; Memory diagnosis equalization means is provided for each of the processors to determine how much storage area of the corresponding memory is to be diagnosed and to equalize the load during memory diagnosis to each processor. A memory diagnostic system with characteristics is obtained.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 3 is a block diagram of an electronic computer system to which an embodiment of the present invention is applied. CPU (processor) 1 accesses memory 2 via memory bus 5,
CPU 3 accesses memory 4 via memory bus 6 .

[0013] Also, processors 1 and 2 and memories 3 and 4
are both connected to system bus 7, so CPU1
The memory 4 can be accessed from the CPU 3 via the system bus 7, and the memory 2 can be similarly accessed from the CPU 3.

The capacities of the memories 2 and 4 can be increased or decreased in units of units. Therefore, memories 2 and 4 can have different storage capacities.

The program for performing memory diagnosis is CP.
It is assumed that the data is stored in a non-volatile storage part in U1 and U3. Note that when there is no response to an access on the bus, bus error detection is performed using a timer, which is a well-known technique.

FIG. 4 is a memory address space diagram in the computer system shown in FIG. 3, with hatched areas in address space 8 indicating areas of memories 2 and 4, respectively. Here, N is the number of bytes that can be used by the CPUs 1 and 3 via the memory buses 5 and 6 and the system bus 7.

FIGS. 1 and 2 are process flow diagrams of an embodiment of the memory diagnostic system of the present invention. Figure 1 shows the CPU in Figure 3.
1 shows a flowchart of a program for executing memory diagnosis, and FIG. 2 shows a flowchart of a program for executing memory diagnosis by CPU 3. As mentioned above, this program is stored in the non-volatile storage means in each CPU 1, 3, and runs automatically when the system is started up.

As is clear from FIGS. 1 and 2, the present memory diagnosis system includes storage capacity detection units 10a, 10b, information notification units 20a, 20b, and memory diagnosis equalization units 30a, 30.
It consists of b.

The operation of the embodiment of the present invention will be described below, but for the sake of concrete explanation, the following three points will be assumed. In other words, the processing speeds of CPUs 1 and 3 are different from each other,
It is also assumed that the memory access speed is the same for all buses, and that the storage area of memory 2 is 0 in address space 8.
It is assumed that the memory 4 starts from the intermediate address (N/2+1) of the address space 8.

First, the operation of the storage capacity detectors 10a and 10b will be described. The CPU 1 clears the communication area a (starting address of the address space 8) that stores the number of storage capacity units of the memory 2 and the performance value of the CPU 1 (time required for diagnosing one unit of memory) (step 101a).
.

The CPU 3 clears the number of storage capacity units of the memory 4 and the address (N/2 + 1) of the communication area b (address space 8) that stores the performance value of the CPU 3 (step 101b). In order to detect the capacity, the number of units is initialized to 1 (step 102).
a), address (1 unit x memory capacity per unit), address (2 units x memory capacity per unit), ..., address (i unit x memory capacity per unit) on the memory bus 5 until a bus error occurs (steps 103a, 104a).

[0022] When a bus error occurs, it means that access has been made beyond the usable address of memory 2, so it is determined that the number of units before the bus error occurs is the storage capacity of memory 2. (step 105a)
).

[0023] Similarly, step 102 is performed for CPU3.
b, 103b, 104b, and 105b are executed to determine the storage capacity of the memory 4.

Next, the operation of the information notification sections 20a and 20b will be explained. The CPU 1 writes the number i of units of the memory 2 corresponding to the communication area a and the predetermined performance value of the CPU 1 (step 106a).

[0025] Then, the CPU 1 selects i(
number of units). If the read value is 0, since the CPU 3 has not yet detected the number of units in the memory 4, reading is repeated until this value is no longer 0 (step 107a).

Steps 106b and 107b are similarly executed for the other CPU 2, and the information notification units 20a and 2
The operation of 0b ends.

Next, the memory diagnosis equalization units 30a, 30
The operation of b will be explained. First, the CPU 1 compares the processing times for memory diagnosis. That is, a. i ×a. c≦b. i×b. c is calculated and compared (step 108a).

Here, a. i is i,a of communication area a
．． c is the performance value of CPU1, b. i is i, b. of communication area b. c indicates the performance value of the CPU 3, respectively. Here, the performance value is the time required to diagnose one unit of memory.

According to this comparison, if the memory diagnosis time of CPU 1 is shorter than that of CPU 3, then after all the diagnosis of memory 2 has been performed, CPU 3 diagnoses memory 4 and uses b of the remaining memory at that time. ．． c/(a.c.
+b. c) is diagnosed by the CPU 1 (step 109).
a).

If this is expressed as a memory address, from address 0 to a. Diagnosis is performed up to address i × u (u is the memory capacity per unit), and the remaining memory in memory 4 {(N
/2 +1)+a. i ×a. c/b. i×b. c.
×b. i × u} address (denoted as A) to b.
After i x U address b. c / (a.c + b
．． c) minutes, i.e. (A×b.c +E×a.c)
/(a.c +b.c) from address (N/2 +1)+
b. Diagnose up to address i x u.

Here, E is N/2 +1+b. i ×
It shows the u address, that is, the final address of the memory 4. On the contrary, C.P.
If the memory diagnosis time of U1 is longer than that of CPU3, CPU1 performs the memory diagnosis of memory 2 by
The amount of time that U3 can perform in the time it takes to diagnose memory 4 is B (B
=b. i×b. c÷a. c × u address) and the remaining difference b. Repeat until c/(a.c + b.c) minutes (
Step 110a).

Expressing this in terms of addresses, starting from address 0, B+(a.i×u−B)×b. c / (a.c + b
．． c) Memory diagnosis up to address will be performed.

The above is the operation of the memory diagnosis equalization section 30a, and the processing of the memory diagnosis equalization section 30b is similarly completed by performing steps 108b, 109b, and 110b, respectively.

Although the above embodiment shows an example including two CPUs and two memories, the present invention is equally applicable to a system including three or more CPUs and three or more memories. .

[0035]

As described above, according to the present invention, the storage capacity of the memory corresponding to each processor is detected,
This value and the processor performance value are notified to other processors, and the processing required for memory diagnosis is equalized among the processors, which has the effect of shortening the time for memory diagnosis.

[Brief explanation of the drawing]

FIG. 1 is a processing flow diagram showing a memory diagnosis method for one CPU in an embodiment of the present invention.

FIG. 2 is a process flow diagram showing another CPU memory diagnosis method in the embodiment of the present invention.

FIG. 3 is a schematic block diagram of a computer system to which an embodiment of the present invention is applied.

FIG. 4 is a diagram showing a memory address space.

[Explanation of symbols]

1,3 CPU 2,4 Memory 10a, 10b Storage capacity detection unit 20a, 20b Information notification department

Claims (1)

[Claims] 1. A computer system comprising a plurality of processors and a plurality of memories provided corresponding to the processors, each of the memories being freely accessible from any of the processors. The diagnostic system includes a storage capacity detection means for detecting the storage capacity of a memory corresponding to a self-processor, a notification means for notifying other processors of the storage capacity detection result and a performance value of the self-processor, and notification thereof. a memory diagnosis equalizing means for determining how much storage area of the corresponding memory is to be diagnosed based on the memory capacity and performance value determined and equalizing the load during memory diagnosis to each processor; A memory diagnostic system is provided corresponding to each of the following.