JPH05241194A - Active matrix liquid crystal display device - Google Patents

Abstract

PURPOSE:To provide a sufficient display characteristic even if the accuracy of interlayer matching is low by forming the shape of polycrystalline silicon (a-Si) layers as a band shape parallel with scanning electrodes and specifying the length of the scanning electrode direction. CONSTITUTION:A first substrate is constituted by disposing the plural scanning electrodes 5 and plural signal electrodes 6 in a matrix direction (x-y directions) on a transparent insulating substrate 1. Thin-film transistor elements(TFTs) consisting of p-Si layers 2 and gate electrodes 3 and display electrodes 7 are formed on the respective picture elements segmented by these scanning electrodes 5 and the signal electrodes 5. The p-Si layers 2 are formed by forming the p-Si layers to the band shape parallel with the x direction on the insulating substrate 1. The length L in the x direction is formed larger than 5/7 of the length Px of the scanning electrodes 5. A second substrate provided by providing a counter electrode on an insulating substrate is disposed to face this first substrate and a liquid crystal material is clamped between thee substrates.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat display device, and more particularly to a large capacity TFT active matrix liquid crystal display device.

[0002]

2. Description of the Related Art Conventionally, much research and development has been conducted on an active matrix liquid crystal display device using a thin film transistor element (hereinafter abbreviated as TFT) as a switching element. An active matrix liquid crystal display device provided with a TFT has a liquid crystal material sandwiched between a first substrate and a second substrate facing the first substrate. The first substrate includes a glass substrate on which a plurality of scanning electrodes and a plurality of signal electrodes are provided in a matrix direction. Each pixel separated by the scanning electrodes and the signal electrodes has a TFT element and a display electrode. Are arranged respectively. The TFT element is connected to the scan electrode, the signal electrode, and the display electrode, respectively. Further, a counter electrode is formed on the second substrate. As a TFT, a p-Si TFT using polycrystalline silicon (hereinafter abbreviated as p-Si) is considered promising. p-Si
Since the TFT has a charge mobility as high as about 30 cm ² / V as compared with the amorphous Si thin film transistor, it is useful for realizing a large-area, high-resolution liquid crystal display. Further, since the charge mobility is high, the driving peripheral circuit of the liquid crystal display panel section can be formed on the same substrate by using TFTs, which is effective for downsizing the display and reducing the cost.

A method of manufacturing such a p-Si TFT is reported in Proceedings of 1988 International Display Research Conference, pages 215 to 219. In this method, in order to form a p-Si thin film as an active layer, first, a low pressure CVD method is used to form a film at a substrate temperature of 500 ° C.
By firing at 600 ° C. in a nitrogen atmosphere, a Si thin film with improved crystallinity is formed. Then, on the patterned p-Si layer, a gate insulating film, a gate Si layer,
An SiO ₂ layer for interlayer insulation, a scan electrode, a signal electrode, a display electrode, etc. are sequentially formed. These are formed by atmospheric pressure CVD.
Method, low-pressure CVD method or the like, which can be performed by repeating film formation and patterning. In this way, a high-mobility p-Si TFT was manufactured, and a TFT using this-
An LCD can be realized.

Further, as a method for manufacturing a large-sized display, the Proceedings of 1991 International Display Research Conference pp. 227-230 applies a printing technique to a substrate of a diagonal size of 40 inches or more, thereby reducing the cost of the device. It is disclosed that a resist pattern can be formed with high productivity. Moreover, the thin line width of the pattern that can be formed by this is a minimum of 3 μm, and it is attempted to combine this patterning technology and the above-described p-Si TFT manufacturing process to manufacture a shift register circuit or an 8 × 8 matrix liquid crystal display device. Has been done.

[0005]

However, the above-mentioned p
-The maximum temperature during the Si TFT manufacturing process is 60.
The process temperature using the glass substrate is about 0 ° C., which is high. It is known that the glass substrate after firing at a high temperature has its substrate size changed from that before firing even if the temperature is lowered. With this change, the pattern size on the glass substrate is deformed, and the pixel size of the pixel is changed. There was a problem that the array pitch changed. As a result, when the layers after the gate Si layer are superposed on the patterned p-Si layer, the positions of the layers are displaced, and the displacement becomes more remarkable especially on a large-area substrate. was there. In addition, in the method of patterning by applying printing technology,
Although a thin line of about 3 μm can be formed, the printing technique is different from the photomask technique, and the interlayer alignment technique for overlapping a large number of patterns has been a particular problem. That is, if the overlap is largely deviated and even one of the gate electrode and scan electrode of the TFT, the drain electrode and signal electrode of the TFT, the source electrode of the TFT, and the display electrode does not overlap, the pixel operates due to poor connection. I can't
There was a risk of becoming a defect.

The present invention has been made in view of the above circumstances, and when a p-Si TFT is used to form a large-area liquid crystal display device, sufficient display characteristics can be obtained even if interlayer alignment accuracy is low. It is an object of the present invention to provide an active matrix liquid crystal display device capable of performing the above.

[0007]

In order to solve the above problems, an active matrix liquid crystal display device according to a first aspect of the present invention has a plurality of scanning electrodes and a plurality of signal electrodes arranged in a matrix on a transparent insulating substrate. And a display electrode is provided in each pixel, which is separated by the scanning electrode and the signal electrode and is composed of a p-Si layer and a gate electrode orthogonal to the p-Si layer. The Si layer and the signal electrode are connected, the p-Si layer on the other end side is connected to the display electrode, and the first substrate, to which the gate electrode and the scanning electrode are connected, faces the insulating substrate. An active matrix liquid crystal display device in which a second substrate provided with electrodes is opposed to each other, and a liquid crystal material is sandwiched between these substrates, wherein the p-Si layer has a strip shape parallel to the scanning electrode. , That run In which the length of the electrode direction is set to be larger than 5/7 of the length of the scanning electrodes forming one side of a pixel. The active matrix liquid crystal display device according to claim 2 is the device according to claim 1, wherein p-
The length of the gate electrode outside the intersection of the Si layer and the gate electrode is set to be ⅙ or more of the length of the scanning electrode forming one side of one pixel. The active matrix liquid crystal display device according to claim 3 is the device according to any one of claims 1 to 21, wherein the size of the non-insulating portion that can connect the p-Si layer and the signal electrode is one pixel side in the matrix direction. The length is set to 2/7 or more of the length of the scan electrode to be formed. According to a fourth aspect of the present invention, in the active matrix liquid crystal display device according to the first to third aspects, the size of the non-insulating portion that can connect the gate electrode and the scan electrode forms one side of one pixel in the matrix direction. The length is set to 2/7 or more of the length of the scanning electrode. According to a fifth aspect of the present invention, in the active matrix liquid crystal display device according to the first to fourth aspects, the size of the non-insulating portion that can connect the p-Si layer and the display electrode is one pixel in each of the matrix directions. 2 / the length of the scan electrode to be formed
It is set to 7 or more.

[0008]

In the active matrix liquid crystal display device of the present invention, the p-Si layer has a strip shape parallel to the scanning electrodes,
The length in the scanning electrode direction is larger than 5/7 of the length of the scanning electrode forming one side of one pixel. Therefore, in a manufacturing process of a liquid crystal display device, a pattern shift occurs due to a deformation of a substrate or a shift occurs when a pattern on a substrate and a pattern on a mask are superposed, and one side of one pixel is formed in both matrix directions. 1/7 of the scanning electrode length
It is possible to secure the shape of the TFT or the connection between the TFT and each of the scanning electrode, the signal electrode, and the display electrode against a dimensional change due to a smaller deviation. This makes it possible to prevent pixel defects due to defective connections.
Then, the length of the gate electrode outside the intersection of the p-Si layer and the gate electrode is set to 1/7 or more of the length of the scanning electrode forming one side of one pixel, whereby It is possible to secure the intersection between the p-Si layer of the TFT and the gate electrode with respect to a similar dimensional change. In addition, p-Si
The size of the non-insulating portion that can connect the layer and the signal electrode is set to 2 of the length of the scanning electrode forming one side of one pixel in the matrix direction.
By setting / 7 or more, the connection between the p-Si layer and the signal electrode can be secured against the same dimensional change as described above. In addition, by setting the size of the non-insulating portion that can connect the gate electrode and the scanning electrode to 2/7 or more of the length of the scanning electrode forming one side of one pixel in the matrix direction, the same dimensional change as described above can be achieved. On the other hand, the connection between the gate electrode and the scan electrode can be secured. Furthermore, p-S
By setting the size of the non-insulating portion that can connect the i-layer and the display electrode to 2/7 or more of the length of the scanning electrode forming one side of one pixel in the matrix direction, the same dimensional change as described above can be achieved. Thus, the connection between the p-Si layer and the display electrode can be secured.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The active matrix liquid crystal display device of the present invention will be described in detail below with reference to the drawings. FIG. 1 shows a first substrate of an embodiment of the liquid crystal display device of the present invention, and is a schematic plan view showing a portion corresponding to one pixel.
In the figure, reference numeral 1 is a transparent insulating substrate, 2 is a p-Si layer, 3 is a gate electrode, 5 is a scanning electrode, 6 is a signal electrode, and 7 is a display electrode. In the first substrate of this example, a plurality of scanning electrodes 5 and a plurality of signal electrodes 6 are arranged on a transparent insulating substrate 1 in a matrix direction (in the present embodiment, referred to as xy directions), and the scanning electrodes 5 and Each pixel divided by the signal electrode 6 has a P-Si layer 2 as a switching element and a T
The FT and the display electrode 7 are provided. In this pixel, the scanning electrode 5 direction is the x direction, the signal electrode 6 direction is the y direction, and the length of the scanning electrode 5 forming one side of one pixel is represented by Px.

The p-Si layer 2 is formed on the insulating substrate 1 by p-Si.
The layer is formed in a strip shape parallel to the x direction. The length in the x direction (indicated by L in the figure) is 5 / of Px.
It is formed larger than 7. The width in the Y direction can be set arbitrarily. Further, the p-Si layer 2 has one end located outside the center line of the signal electrode 6, and the outer portion 2
It is formed so that the length of a in the x direction is approximately 1/7 of Px. A gate electrode 3 composed of a gate insulating film 3a and a gate Si layer 3b is formed on the central portion of the p-Si layer 2 so as to be orthogonal to the p-Si layer 2. The gate electrode 3 has a length in the Y direction of Px.
Is formed larger than 4/7, and one end is made of Si.
It is located outside the intersection 3c with the layer 2, and the length 3d of the gate electrode outside the intersection 3c is formed to be 1/7 or more of Px. Further, the other end of the gate electrode 3 is located outside the center line of the scanning electrode 5, and the length of the outer portion 3e is 1/7 or more of Px.
Further, on both sides of the p-Si layer 2 sandwiching the gate electrode 3, impurity ions such as phosphorus ions are doped to form impurity-doped layers 11a and 12a serving as drains and sources, respectively, to form a TFT. There is.

A first interlayer insulating film 4 is formed on the TFT formed on the transparent insulating substrate 1 as described above. Impurities serving as drains on the gate electrode 3 of the first interlayer insulating film 4 are formed. The gate electrode connection opening 1 is formed on the doped layer 11a and the impurity-doped layer 12a serving as a source, respectively.
0, the drain electrode connection opening 11, and the source electrode connection opening 12 are opened. That is, these openings are non-insulating portions that can connect the electrodes formed in the openings to the electrodes. The gate electrode connection opening 10, the drain electrode connection opening 11, and the source electrode connection opening 12 are all in the x direction and the y direction.
The width in the direction is formed to be 2/7 or more of Px. Also, these openings are preferably formed in a square shape. The gate electrode connection opening 10 is arranged so that the gate electrode 3 and the scanning electrode 5 are connected at substantially the center thereof, and the drain electrode connection opening 11 is formed.
Are arranged so that the p-Si layer 2 and the signal electrode 6 are connected at substantially the center thereof. Further, the source electrode connection opening 12 is formed at least from the other end of the p-Si layer 2 to P
An inner portion 2b having a length of 1/7 of x is arranged so as to be located in this opening. In addition, of this opening 12,
The display electrode 7 is formed at least at the end portion on the gate electrode side, and the p-Si layer 2 and the display electrode 7 are connected here. Further, at the intersection of the scanning electrode 5 and the signal electrode 6, a second interlayer insulating film 13 is formed between these electrodes, whereby both electrodes are insulated.

Such a first substrate can be manufactured, for example, as follows. 2 and 3 show the manufacturing process of this substrate in the order of steps, and FIG.
3A to 3F are schematic plan views, and FIGS. 3A to 3F are sectional views taken along the line AA in FIG.

First, amorphous Si is formed on a transparent insulating substrate 1 such as a glass substrate at a substrate temperature of 550 ° C. by a low pressure CVD method.
A film is formed and then baked at 600 ° C. for 5 hours or more to crystallize it. After applying a resist on the obtained p-Si layer 2, exposure and resist development are performed using a mask to form a resist pattern, and a band-shaped p-Si layer 2 is formed by dry etching. [FIG. 2 (a) and FIG. 3 (a)] Next, an SiO ₂ film is used as the gate insulating film 3a by atmospheric pressure CVD.
Then, the gate Si layer 3b is formed thereon by the low pressure CVD method. Then, the gate insulating film 3a
Then, the gate Si layer 3b is patterned by photo and etching processes to form the gate electrode 3. [Fig. 2
(B) and FIG. 3 (b)] Next, phosphorus ions (P) are implanted by an ion implantation method, and further heat treatment is performed to form the drain and source phosphorus-doped layers 11a and 12a, and the gate electrode 3 is formed. Reduce resistance. [Fig. 3 (c)]

After that, a phosphide glass film is formed as the first interlayer insulating film 4 and patterned by a photo and etching process to form a gate electrode connection opening 10, a drain electrode connection opening 11, and a source electrode connection. The opening 12 is formed. [FIG. 2 (c) and FIG. 3 (d)] Next, after forming a thin film of a conductive material such as Al, Ta, or ITO by using a sputtering method or an electron beam evaporation method, patterning is performed to perform scanning electrode 5 To form. [Fig. 2
(D)] Then, as the second interlayer insulating film 13 is formed on the scanning electrode 5 at the intersection with the signal electrode 6 formed after this, as S
io ₂ or adjacent glass is used for sputtering, CVD,
Or apply by SOG (spin on glass) method,
This is fired. At this time, when the SOG method is used, a thin film can be formed in advance only on a necessary portion by using a printing method when applying, so that patterning by etching becomes unnecessary and the process can be simplified.

Next, after forming a thin film of a conductive material such as Al, Ta, or ITO by a sputtering method or an electron beam evaporation method, patterning is performed to form the signal electrode 6. [FIG. 2E and FIG. 3E] After that, a transparent conductive thin film such as ITO is formed and patterned to form the display electrode 7. [FIG. 2 (f) and FIG. 3 (f)] In this way, the first substrate is obtained. Then, the first substrate and a second substrate provided with a counter electrode on another insulating substrate are arranged so as to face each other, and liquid crystal is held between these substrates to form an active matrix liquid crystal display device. it can. In the above steps, when forming a resist pattern in patterning, in addition to the method of forming a combination of a photomask and a photoresist,
The resist pattern can be directly formed on the substrate by the printing method, and the printing method is advantageous in terms of productivity in the patterning process.

The first substrate according to the present embodiment as described above, even if the substrate is deformed during the manufacturing process or the pattern on the substrate and the pattern on the mask are misaligned during patterning, TFT shape or TFT
It is possible to secure the respective connections with the scanning electrode 5, the signal electrode 6, and the display electrode 7. That is, the intersection between the p-Si layer 2 forming the TFT and the gate electrode 3 is ensured for the displacement within the range shown by Mgd in FIG. 1 in both the x and y directions. Further, the connection between the p-Si layer 2 and the signal electrode 6 is
This is ensured against the displacement in the drain electrode connection opening 11. That is, in the x-direction and the y-direction, deviations are ensured within the ranges shown by WSIO _x and WSIO _Y in FIG. 1, respectively. Similarly, the connection between the gate electrode 3 and the scanning electrode 5 is secured against the displacement in the gate electrode connection opening 10, and the connection between the p-Si layer 2 and the display electrode 7 is connected to the source electrode connection opening 12. Secured against internal deviation. Furthermore p
-Si layer 2 is another p-Si provided in the adjacent pixel.
It is necessary to secure the separation from the layer 2, but the range of deviation of the p-Si layer 2 that secures the separation is within the range shown by Ms in FIG. 1 for each p-Si layer. Therefore,
When the length L of the p-Si layer 2 in the x direction is 5/7 of Px, Ms = 1 / 2WSIO _x , so L is 5 of Px.
When it is set to be larger than / 7, the above-mentioned allowable range of each deviation can be maximized, and the connection failure can be prevented with respect to the deviation smaller than 1/7 of Px at each connection portion or the intersection. Since the p-Si layer 2 of each pixel is formed at the same time by the same patterning process, the degree to which the p-Si layers 2 of adjacent pixels approach each other is larger than the shift caused by another patterning process. It's a small one. Therefore, Ms <1 / 2WSIO _x can be set. In this case, L may be larger than 5/7 and smaller than Px.

[0017]

As described above, in the active matrix liquid crystal display device of the present invention, a plurality of scan electrodes and a plurality of signal electrodes are arranged in a matrix direction on a transparent insulating substrate, and these scan electrodes and signal electrodes are separated from each other. P for each pixel
-TF comprising a Si layer and a gate electrode orthogonal to the Si layer
T and a display electrode are provided, the p-Si layer on one end side is connected to the signal electrode with the gate electrode interposed, and the p-S on the other end side is connected.
A second substrate having a counter electrode provided on an insulating substrate is arranged to face the first substrate to which the i layer and the display electrode are connected and the gate electrode and the scanning electrode are connected. An active matrix liquid crystal display device in which a liquid crystal material is sandwiched between the p-Si layers having a strip shape parallel to the scanning electrodes, and the length in the scanning electrode direction forms one side of one pixel. It is larger than 5/7 of the length of the scanning electrode.

Therefore, in the manufacturing process of the liquid crystal display device, there is a pattern shift due to the deformation of the substrate or a shift that occurs when the pattern on the substrate and the pattern on the mask are superposed. It is possible to secure the shape of the TFT or the connection between the TFT and each of the scan electrode, the signal electrode, and the display electrode with respect to a dimensional change due to a shift smaller than 1/7 of the length of the scan electrode forming the. Therefore, in the pixel portion of the active matrix liquid crystal display device, it is possible to simultaneously realize highly reliable wiring to the display electrode and good display characteristics such as a high contrast ratio.

In the active matrix liquid crystal display device of the present invention, the length of the gate electrode outside the intersection of the p-Si layer and the gate electrode is set to the length of the scanning electrode forming one side of one pixel. It is set to 1/7 or more. Therefore, the p-Si of the TFT is not affected by the same dimensional change as described above.
An intersection between the layer and the gate electrode can be ensured. The active matrix liquid crystal display device of the present invention is a p-Si device.
The size of the non-insulating portion that can connect the layer and the signal electrode is set to 2 of the length of the scanning electrode forming one side of one pixel in the matrix direction.
/ 7 or more. Therefore, the connection between the p-Si layer and the signal electrode can be secured against the same dimensional change as described above. In the active matrix liquid crystal display device of the present invention, the size of the non-insulating portion that can connect the gate electrode and the scanning electrode is set to 2/7 or more of the length of the scanning electrode forming one side of one pixel in the matrix direction. Is.
Therefore, it is possible to secure the connection between the gate electrode and the scanning electrode with respect to the same dimensional change as described above. In the active matrix liquid crystal display device of the present invention, the size of the non-insulating portion that can connect the p-Si layer and the display electrode is 2 / the length of the scanning electrode forming one side of one pixel in the matrix direction.
It is set to 7 or more. Therefore, it is possible to secure the connection between the p-Si layer and the display electrode against the same dimensional change as described above.

[Brief description of drawings]

FIG. 1 is a schematic plan view showing a first substrate of an embodiment of a liquid crystal display device of the present invention.

2A to 2D are schematic plan views showing the manufacturing process of the first substrate of FIG. 1 in the order of processes.

3A to 3D are schematic cross-sectional views showing the manufacturing process of the first substrate of FIG. 1 in process order.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 transparent insulating substrate 2 polycrystalline silicon layer 3 gate electrode 5 scanning electrode 6 signal electrode 7 display electrode 10 gate electrode connection opening (non-insulating portion) 11 drain electrode connection opening (non-insulating portion) 12 source electrode connection opening ( (Non-insulated part)

Claims (5)

[Claims] 1. A plurality of scanning electrodes and a plurality of signal electrodes are arranged in a matrix direction on a transparent insulating substrate, and each pixel divided by the scanning electrodes and the signal electrodes is provided with at least a polycrystalline silicon layer and orthogonal thereto. A thin film transistor element including a gate electrode and a display electrode are provided, the polycrystalline silicon layer on one end side is connected to the signal electrode with the gate electrode sandwiched, and the polycrystalline silicon layer on the other end side is connected to the display electrode. A second substrate in which a counter electrode is provided on the insulating substrate with respect to the first substrate in which the gate electrode and the scanning electrode are connected.
In the active matrix liquid crystal display device in which the substrates are opposed to each other and a liquid crystal material is sandwiched between the substrates, the polycrystalline silicon layer has a strip shape parallel to the scanning electrodes and has a length in the scanning electrode direction. An active matrix liquid crystal display device, characterized in that the length is larger than 5/7 of the length of the scanning electrode forming one side of one pixel. 2. The length of the gate electrode outside the intersection of the polycrystalline silicon layer and the gate electrode is 1/7 or more of the length of the scanning electrode forming one side of one pixel. The active matrix liquid crystal display device according to claim 1, wherein 3. The size of the non-insulating portion that can connect the polycrystalline silicon layer and the signal electrode is 2/7 or more of the length of the scanning electrode forming one side of one pixel in the matrix direction. The active matrix liquid crystal display device according to claim 1, wherein the active matrix liquid crystal display device is a liquid crystal display device. 4. The size of a non-insulating portion that can connect the gate electrode and the scanning electrode is 2/7 or more of the length of the scanning electrode forming one side of one pixel in the matrix direction. The active matrix liquid crystal display device according to claim 1. 5. The size of a non-insulating portion that can connect the polycrystalline silicon layer and the display electrode is 2/7 or more of the length of a scanning electrode forming one side of one pixel in the matrix direction. The active matrix liquid crystal display device according to any one of claims 1 to 4, which is characterized in that.