JPH0523106B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a special effects device, and is particularly suitable for application to obtaining a wipe key signal in a digital switcher for video signals.

[Background technology and its problems]

Switchers used to switch video signals, such as television signals, are designed to switch screens by wiping multiple screens. By wiping the screen with the screen, the screen is devised to have a visual and psychological effect on the person viewing the screen, and the use of a digital switch is advantageous because it can realize a variety of wipe shapes. It is considered.

When attempting to digitally generate a wipe key signal in this way, it is possible to easily convert this into various key signals using a relatively simple configuration based on a relatively simple wipe pattern. desirable. By the way, when switching screens by wiping, you can make the border between two screens hard or soft, change the width as necessary, or add color to the inside of the border. This is because if a wipe pattern can be achieved, a switcher with great functionality as a special effects device can be obtained.

[Purpose of the invention]

The present invention has been made in consideration of the above points, and
This paper attempts to propose a special effect device that can generate various wipe pattern key signals based on relatively simple basic data by generating key signals using digital calculation means. be.

[Summary of the invention]

In order to achieve this purpose, the present invention includes:
a first memory area for storing sample data of a first key signal waveform portion representing a double-sided portion; and a second memory area for storing sample data of a second key signal waveform portion representing a slope following the first key signal waveform portion. By providing a waveform storage circuit with areas, assigning a series of addresses to the first and second memory areas, and reading a predetermined range of sample data while changing the address of the access start point, the basic key signal A basic key signal is formed by controlling the address corresponding to the sample data to be read from the waveform storage circuit by the address control means according to the wipe pattern to be obtained. The input video signal is switch-controlled based on the key signal.

〔Example〕

An embodiment of the present invention will be described in detail below with reference to the drawings. FIG. 1 shows the general configuration of the special effects device as a whole, and includes a basic key signal generation circuit section K2 that is controlled by a control signal S1 generated from a key signal control circuit K1. K2
The basic key signal FK0 sent from the key signal forming circuit K3 is applied to the key signal forming circuit K3.

The key signal forming circuit section K3 selects various key signals S3 including various key signals, ie, soft key signals, hard key signals, soft border key signals, hard border key signals, etc., based on the condition signal S2 given from the outside. It is sent to the buffer circuit section K4.

This buffer circuit section K4 selectively stores one of the various key signals coming from the circuit section K3 based on the conversion mode selection signal S4, and stores the stored data in the horizontal and horizontal directions given to the key signal output circuit section K5.
Key signal output circuit section K5 at a timing that matches the timing of vertical video synchronization signals HD and VD.
Transfer to. The key signal output circuit section K5 is configured to output a key signal KY synchronized with the video signal from the transferred data at the timing of the video synchronization signals HD and VD.

The key signal control circuit section K1 is given a pattern mode command signal S5 consisting of a command signal regarding the operation mode of the fader lever and a command signal regarding the wipe pattern when the generated key signal KY is reproduced on the display screen. A control signal S1 for the basic key signal generation circuit section K2 is formed according to the command contents of the pattern or mode, and a control signal S for the key signal output circuit section K5 is generated.
6 is transmitted.

As shown in FIG. 2, the basic key signal generation circuit section K2 has a horizontal key signal waveform storage circuit 1 and a vertical key signal waveform storage circuit 2 having a ROM configuration. These waveform storage circuits 1 and 2 store sample data related to key signals in the horizontal direction and vertical direction, respectively, with addresses assigned sequentially, and have almost the same configuration except that the sampling frequencies for the addresses are different. have Therefore, the configuration of the horizontal key signal waveform storage circuit 1 will be described in detail here.

As shown in FIG. 3, the horizontal key signal waveform storage circuit 1 includes a storage area MA1 for storing sample data regarding screen A, a memory area MA3 for storing sample data regarding screen B, and a memory area MA3 for storing sample data regarding screen B. It also has a memory area MA2 for storing sample data regarding a border formed between the two. First memory area MA
1 is gain +127 from address 0 to 2183
Sample data corresponding to the second
The memory area MA3 stores sample data corresponding to a gain of -128 over addresses 2440 to 4623, and the third memory area MA2 stores sample data corresponding to a gain of +128 over addresses 2184 to 2439.
Sample data that linearly changes from 127 to -128 is stored sequentially.

Here, address 0 of the first memory area MA1
The sample points at addresses ~2183 are selected to correspond to one horizontal synchronization interval 1H, and the number of sample data at addresses 2440 to 4623 in the second memory area MA3 similarly corresponds to one horizontal synchronization interval 1H. The number has been selected. In addition, the number of sample data at addresses 2184 to 2439 in the third memory area MA2 is selected to a value corresponding to the maximum slope width of the border when considering the key signal to be generated. It is selected to be about 1/8H (for example, about 256 [tel] when the sampling frequency is 73.71 [MHz]).

Therefore, by accessing addresses 0 to 2183 in the first memory area MA1 of the horizontal key signal waveform storage circuit, a state in which screen A is displayed over the entire display screen can be obtained, and the second memory area
When the addresses 2440 to 4623 of MA3 are sequentially accessed, a state is obtained in which screen B is displayed over the entire display screen. On the other hand, if 1H of addresses including addresses 2184 to 2439 in the third memory area are accessed, as shown in FIG. You can get a screen where is displayed on both sides, and in this state, if you offset the access start point address in the direction of address 0, you will see a border as shown by the arrow.
If BH moves toward the B screen, and conversely the access start point address is offset in the direction of address 2440, the border BH on the display screen 1G will move toward the screen A side.

The 1H waveform data thus read out from the horizontal key signal waveform storage circuit 1 is applied to the polarity switching circuit 4 via the switch circuit 3 as the horizontal waveform signal FKH.

The vertical key signal waveform storage circuit 2 also stores waveform data similar to that described above with reference to FIG. 3, and therefore, the access start address to the waveform memory is offset as shown in FIG. A screen or B by going
A vertical waveform signal FKV is sent out that presents a screen in which only the screen is displayed or a border BV exists to divide the A screen and B screen vertically, and the border BV moves downward or upward. The signal is applied to the polarity switching circuit 4 through the switching circuit 3. The changeover switch circuit 3 is used to switch to the horizontal key signal waveform storage circuit 1 or the vertical key signal waveform storage circuit 2 during the vertical blanking period included in the video signals of the A screen and B screen where the screen is to be changed. The horizontal waveform signal FKH and the vertical waveform signal FKV can be output during the vertical blanking interval.

The polarity inversion circuit 4 is configured to be able to switch the polarity of the horizontal waveform signal FKH and the vertical waveform signal FKV by the inversion control signal PS, and thus, in correspondence with FIG. The sample data of the B screen is stored in the memory area MA1, and the sample data of the A screen is stored in the second memory area MA3, and the data from the B screen to the A screen is stored in the third memory area MA3 as the address advances. A waveform signal equivalent to that obtained by replacing the horizontal key signal waveform storage circuit 1 and the vertical key signal waveform storage circuit 2 with a waveform storage circuit storing waveform data such as the waveform data transitioning to the horizontal key signal waveform storage circuit 2 can be obtained. As a result, if the access start address is offset as described above with respect to FIGS. 4 and 5, the border BH and The borders BH and BV on the display screen IG move in the same manner as in FIGS. 4 and 5, except that the screens on both sides of the BV are switched.

Thus, the waveform data described above with reference to FIGS. 3 and 6 is sent to the output terminal of the polarity switching circuit 4 as the basic key signal FK0. The address signal ADR for the horizontal key signal waveform storage circuit 1 and the vertical key signal waveform storage circuit 2 is given from the key signal control circuit section K1 through the changeover switch circuit 5 which is switched in response to the changeover signal CH1 similarly to the changeover switch circuit 3. .

Key signal control circuit section K1 is address counter 1
1, and its count output S11 is added to the offset signal OS in an offset adder circuit 12 and sent as an address signal ADR.

The offset signal OS is generated by changing the content of the address signal of the access problem to the waveform storage circuits 1 and 2 according to the specified wipe pattern and fader lever operation mode as described above with reference to FIGS. 4 and 5. It is used to cause movement of borders BH and BV and is formed in the wipe control circuit.

The wipe control circuit 13 receives a pattern code signal PS which is separately given from a pattern code command input switch as a pattern mode command signal S5, and lever data LD regarding the operating position of the fader lever.
and a normal mode operation signal NOR and a reverse mode operation signal that specify the conversion mode to be generated on the display screen based on the fader lever operation.
REV, normal/reverse mode operation signal
Receive NOR/REV.

The pattern code signal PC is a wipe pattern code from "0000" assigned to, for example, 10 types of wipe patterns to be generated as shown in FIG.
By specifying one of "0110", the wipe pattern of the key signal to be generated is selected.

In addition, the lever data LD is stored in the range where the address of the access start point can be moved in the waveform memory circuits 1 and 2 when the fader lever is operated from the A screen position to the B screen position or vice versa, that is, addresses 0 to 2440. It consists of data signals that undergo corresponding changes.

In response to such changes in the lever data LD, the wipe control circuit 13 outputs mode operation signals NOR, REV,
The contents of the offset signal OS are changed as follows by NOR/REV. That is, when the normal mode operation signal NOR arrives, the wipe control circuit 13 activates the fader lever 1 as shown in FIG. 10A.
When 4 is operated from the B screen position to the A screen position in the direction of the arrow, the contents of the offset signal OS are changed from address 2440 (consisting of all "1" digital signals) to address 0 (consisting of all "0" digital signals). ), then turn the fader lever 14
is operated in the reverse direction from the A screen position to the B screen position as shown in Figure 10B, the contents of the offset signal OS are changed from address 2440 (consisting of digital codes of all 1's) to address 0 (all digital codes). An offset signal OS that changes to a digital code of "0" is applied to the offset adder circuit 12.
As a result, for example, when the fader lever is operated as shown in FIG.
1 Border on the display screen IG as shown in Figures A and B
BH moves to the right from screen A to screen B.

On the other hand, after that, the fader lever 14 is moved to the first position.
When operated as shown in Figure 0B, the wipe control circuit 13 sends an inversion control signal PS to the polarity switching circuit 4.
By giving
The border on the display screen IG as shown in Figure 1 C and D
It is possible to perform a screen change such that BH moves from both sides of B to the right in the direction of screen A.

In this way, in the normal mode, when the fader lever is operated from the B screen position to the A screen position or vice versa, the screen switching effect can be realized such that the border BH is always moved to the right.

Furthermore, when the reverse mode operation signal REV is applied, the wipe control circuit 13 has a relationship between the position of the fader lever and its value as shown in FIGS. 12A and B, which is the reverse of the relationship shown in FIGS. 11A and B. It sends out an offset signal OS like this. In this case, when moving the fader lever 14 from the screen A position to the screen B position as shown in FIG. 11th
This is the same as in Figure B.

In this way, the fader lever 1 can be moved as shown in FIGS. 13A to D in correspondence with FIGS. 11A to D.
When the operation shown in Fig. 12A is performed for 4, a screen change is performed in which the border BH on the screen IG moves to the left from screen A to screen B, and then as shown in Fig. 12B. When such an operation is performed, a screen switching effect is obtained in which the border BH moves leftward from screen B toward screen A as shown in FIGS. 13C and D.

Furthermore, normal/reverse mode operation NOR/
When REV arrives, the wipe control signal 13 is sent to the address 2440 in the same manner as described above with respect to FIG. 10A when the fader lever 14 is operated from the B screen position to the A screen position as shown in FIG.
It generates an offset signal OS that changes the address from 0 to 0, and also generates an offset signal OS that changes the address from 0 to 2440 when operated from the A screen position to the B screen position. In this way, the upper border BH of the display screen IG first moves to the right from screen A to screen B as shown in FIGS. 15A and B, and when the lever 14 is operated in the opposite direction, the border BH of FIG. Screen B as shown in C and D
A transition screen is obtained in which the screen moves from A to A.

Thus, in the normal reverse mode, when the fader lever 14 is moved from the B screen to the A screen, and conversely, when it is moved from the A screen to the B screen, the moving direction of the screen border BH is reversed. You will get a conversion screen that looks like this. Note that at this time, the inversion control signal PS to the polarity switching circuit 4 is not sent out from the wipe control circuit 13.

The screen switching mode in the horizontal direction has been explained above, but the offset operation by the offset signal OS is similarly executed when reading the vertical key signal waveform storage circuit 2, and as a result, the fifth
In each pattern of the diagram, the screen is changed so that the area of the A screen and the B screen changes as the border moves while maintaining the wipe shape.

The case where the address counter 11 counts up from address 0 has been explained above, but in this state, non-target items (for example "0000", "0001", "0100") are used as the wipe pattern (Figure 9). This corresponds to the operation when obtaining. On the other hand, when obtaining a horizontally and/or vertically symmetrical wipe pattern (for example, "0010", "0011", "1000"), the address counter 11 counts up and then switches to the downcount mode. The count contents are designed to be reversed. For example, in order to obtain the wipe pattern "0001" shown in FIG. After being set to a state in which the key signal FKO is generated, the address counter 11 first performs an up-count operation in accordance with the up-down control signal S12 given from the up-down switching control circuit 14, and then performs an up-count operation in the memory area MA1 of the horizontal key signal waveform storage circuit 1. From there, MA3 is read out through MA2.

The address count output S11 obtained based on the up-count operation is fed back to the up-down switching control circuit 14, and thus the address for the address memory MA3 is displayed on the display screen.
When the address corresponds to the center point of the A screen on the IG, the up/down switching control circuit 14 detects this and switches the counting operation so that the address counter 11 counts down. In this way, the up/down switching control circuit 14 causes the address counter 11 to perform an up-count operation when the wipe pattern to be generated according to the contents of the pattern code signal PC is asymmetrical, and when it is symmetrical, causes the address counter 11 to perform an up-count operation and then down-counts after the wipe pattern is symmetrical. To perform a counting operation that returns to the original count value by counting.

The basic key signal FK0 generated in the basic key signal generation storage circuit K2 is the key signal forming circuit section K.
The signal is applied to the first gain adjustment circuit 21 of No. 3. This gain adjustment circuit 21 receives a gain adjustment signal G from a software adjuster separately provided on the operation panel.
1 is given, and as a result, as shown in FIG. signal
key and is applied to the changeover switch circuit 22.
Therefore, the width of the screen switching part of the key signal KEY can be controlled to change from the maximum slope width Wo to the width Wd corresponding to the adjustment signal G1, thus making it possible to arbitrarily adjust the softness when switching the screen. ing.

In this way, the key signal KEY (first
6A) is given to the hard key signal forming circuit 23, which obtains the hard key signal HKY (FIG. 16D) that changes stepwise at the time when the key signal KEY crosses the 0 level, and sends it to the signal selection buffer circuit section. The data is sent to K4.

Furthermore, the key signal KEY is given to a border key signal forming circuit 24. Border key signal forming circuit 2
4 corresponds to FIG. 16A, as shown in FIG. 16B, a waveform signal BDS similar to that obtained by folding the positive waveform part of the key signal KEY to the negative side is obtained, and the signal level is referenced to the level of -128. Thus, as shown by the solid line in FIG. 16C, a border key signal BKY having a width corresponding to the width of the screen conversion part BH of the key signal KEY is generated, and this is used as the border key signal to obtain the second gain. It is applied to the adjustment circuit 25.

This gain adjustment circuit 25 changes the rising and falling slopes of the border key signal BKY with reference to the value of the reference level -128, as shown by the broken line in FIG. The softness between the two can be adjusted by an adjustment signal G2 separately given from a software adjuster. In practice, the border key signal BKY part is given a different color from the screens to be converted, that is, the A screen and B screen,
It is used to create special effects by including other screens.

Note that the maximum level of the border key signal BKY after the gain adjustment is performed in the gain adjustment circuit 25 in this way is limited to the signal level 127,
In this way, a flat portion k can be formed at the center of the border key signal BKY, and this portion can form a strip-shaped border on the actual display screen.

This border key signal BKY is given to the changeover switch circuit 22. The changeover switch circuit 22 is configured to select the border key signal BKY or the key signal KEY and supply it to the visual correction circuit 26 in response to a changeover signal CH2 separately received from an operation panel. This visual correction circuit 26 detects changes in the slope of the key signal KEY or the slope of the border key signal BKY.
By performing the calculation of sin ² , the signal is corrected to be visually easy to read and the corrected signal S31 (Fig. 16F)
is sent to the signal selection buffer circuit section K4.

Further, the border key signal forming circuit 24 generates a hard border key signal HBY having a waveform having a rise width corresponding to the width of the screen conversion portion BH based on the key signal KEY (FIG. 16A), and selects this as a signal. The signal is sent to the buffer circuit section K4.

The signal selection buffer circuit section K4 is the visual correction circuit 2.
Signal S31 coming from 6, hard key signal
It has a buffer memory 31 that sequentially stores HKY and hard border key signals HBY, and one selection circuit 22 selects one of the waveform data of each signal stored in the buffer memory 31 and sends it to the key signal output circuit section K5. . Note that selection circuit 3
As a selection signal for 2, a selection signal SEL obtained separately from an operation panel is used.

The key signal output circuit section K5 sequentially stores the waveform data sent from the signal selection buffer circuit section K4 in the horizontal waveform memory 41 and the vertical waveform memory 42, and uses the stored data as the video signal of the A screen and the B screen to be changed. The signals are output one after another at a speed synchronized with the synchronization signal included in the KY signal, and one of them is selected by the NAM circuit 43 and sent out as the key signal KY.

Based on the inverted control signal S30 latched in the latch circuit 44, the NAM circuit 43 converts the horizontal waveform data S31 read from the horizontal waveform memory 41 into the vertical waveform data S31 read from the vertical waveform memory 42.
32 is selectively output according to the wipe pattern to be formed (FIG. 9). i.e. pattern code "0100"
~ When obtaining a new key KY with a wipe pattern of "1001", the basic key signal generation circuit K2 sends out a waveform signal similar to the wipe pattern "0001" as a horizontal waveform signal FKH, and also as a vertical waveform signal FKV. In addition to obtaining a waveform signal similar to the wipe pattern "0000", the latch circuit 44 is made to latch the contents of the inverted control signal S32 based on the contents of the pattern code signal PC designated by the wipe control circuit 13. , At this time, for areas where key signals are obtained such that, for example, the A screen and B screen are both output according to the combination of the arrangement of the A screen and B screen based on the waveform signals in the horizontal and vertical directions on the screen, For example, the inversion control signal S30 to select screen B
If it is given to the NAM circuit 43, a key signal KY having a wipe pattern of pattern code "0100" can be sent out. For example, if priority is given to the key signal with the lower signal level among the vertical and horizontal key signals, it is possible to send out the key signal KY with a wipe pattern of pattern code "1000" or "1001". can.

Writing or reading from the horizontal waveform memory 41 and vertical waveform memory 42 is performed at different timings depending on address signals ADH and ADV applied through changeover switch circuits 44 and 45, respectively. That is, the changeover switch circuits 44 and 4
5 is controlled by the vertical blanking signal included in the video signals of the A screen and B screen to be changed, and addresses the transfer clock S44 sent from the transfer address counter 46 when the vertical blanking signal arrives. It is applied to the horizontal waveform memory 41 and vertical waveform memory 42 as signals ADH and ADV. Here, as described above for the changeover switch circuits 3 and 5 of the basic key signal generation circuit section K2, when writing the horizontal direction key signal and the vertical direction key signal to the buffer memory 31, this is executed in a time-sharing manner. Accordingly, waveform data is transferred to the horizontal waveform memory 41 and the vertical waveform memory 42 in a time-sharing manner during the vertical blanking interval.

On the other hand, when the vertical blanking signal VBLK is no longer applied to the changeover switch circuits 44 and 45, data in the waveform memories 41 and 42 is read by switching to the horizontal address counter 47 and vertical address counter 48 sides. It is given based on counter outputs S45 and S46.

Here, the horizontal address counter 47 is given the reference horizontal synchronization signal HD as a clear signal to the horizontal address counter 47 through a delay circuit 49 driven by the count pulse CK, and thus the horizontal address counter 47 is driven in each horizontal synchronization period. Counting starts at the timing when the signal is generated, and the count output S45 is sent at the timing of the clock signal CKH with a frequency of 4f _SC (color subcarrier frequency), thus converting the key signal corresponding to each horizontal sample point into the horizontal waveform. The data is read from the memory 41.

In response, the reference vertical synchronization signal VD is given to the vertical address counter 48 as a clear signal,
As a result, the vertical address counter 48 receives the clock signal having the horizontal synchronization frequency from the vertical synchronization point.
A counting operation is started by CKV, and the count output S46 is applied to the vertical waveform memory 42 as an address signal ADV, thereby reading a key signal from the vertical waveform memory 42 for each scanning line.

In the above configuration, the wipe pattern to be obtained is separately selected on the operation panel and the corresponding pattern code signal PC is given to the key signal control circuit section K1, and one of the mode signals NOR, REV, NOR/REV regarding the operation mode of the fader lever is selected. is selected and given to the key signal control circuit section K1, the address counter 11 counts up according to the selected wipe pattern and is stored in the horizontal key signal waveform storage circuit 1 and the vertical key signal waveform storage circuit 2. 1H and 1V worth of waveform data is read out and sent as horizontal waveform signal FKH and vertical waveform signal FKV, or after the address counter 11 counts up once, it is switched to count down and returned to the original count contents. The waveform data in the waveform storage circuits 1 and 2 is read out so as to reciprocate by 1/2H or V/2 and is sent out as a horizontal waveform signal FKH and a vertical waveform signal FKV,
After the polarity of this signal is inverted in the polarity switching circuit 4, it is sent out as the basic key signal FKO from the basic key signal generation circuit section K2.

The reading operation of the waveform storage circuits 1 and 2 is performed by the changeover switch circuits 3 and 5 in a time-sharing manner during the vertical blanking interval.

The basic key signal FKO is the key signal forming circuit section K3
It is used to generate various key signals.

First, key signal screen conversion part BH (Figure 16A)
The gain adjustment circuit 21 adjusts the slope of the slope portion constituting the
The key signal KEY is obtained and stored in the buffer memory 31.

Second, the key signal KEY is given to the hard key signal forming circuit 23 to generate the key signal as shown in FIG. 16D.
A hard key signal HKY, which switches the level by hard when KEY crosses the 0 level, is stored in the buffer memory 31.

Thirdly, based on the key signal KEY, the waveform portion is partially folded back to obtain a border key signal BKY having a border corresponding to the width of the screen transition part BH of the key signal KEY, as shown in FIGS. 16B and C. The gain is adjusted in the gain adjustment circuit 25 as necessary, and then stored in the buffer memory 31.

Fourth, based on the key signal KEY, the border key signal forming circuit 24 forms a hard border key signal HBY that hard rises in the width section of the screen conversion part BH of the key signal KEY, as shown in FIG. 16E. It is stored in the buffer memory 31.

In this way, various key signals are stored in the buffer memory 31 during the vertical blanking interval, and these are selected by the selection circuit 32 and horizontally processed by the address signals ADH and ADV based on the count output S44 of the transfer address counter 46. The waveform memory 41 and the vertical waveform memory 42 are loaded in a time-divisional manner. Then, when the vertical blanking period passes, the horizontal waveform memory 41 and the vertical waveform memory 4
2, the count outputs S45 and S46 obtained from the horizontal address counter 47 and the vertical address counter 48 in synchronization with the reference horizontal synchronization signal HD and the reference vertical synchronization signal VD are used as address signals ADH and ADV. Yotsute A
It is sent as a key signal KY synchronized with the sampling data that makes up the screen and B screen.

Then, the NAM circuit 43 provided at the output ends of the horizontal waveform memory 41 and the vertical waveform memory 42 is controlled to change the priority selection order based on the pattern code signal PC given to the key signal control circuit section K1. Key signals can be generated for the 10 types of wipe patterns shown in the figure.

In the above embodiment, as shown in FIG.
Although waveform sample data for each screen is prepared and waveform data constituting the screen switching section is prepared in between, the present invention is not limited to this, and data for one screen may be deleted.

〔Effect of the invention〕

As described above, according to the present invention, basic waveform data forming a basic key signal for obtaining various key signals is prepared as a lookup table in the memory, and the reading section of the waveform data is changed and controlled. Since the position of the screen switching part of the key signal can be easily changed and controlled as necessary, the width and angle of inclination of the sloped part of the key signal that constitutes the screen switching part can be precisely controlled. I can do it. Therefore, signal processing for the basic key signal can be easily and reliably performed, and various key signals can be easily obtained with high precision. As a result, it is possible to effectively prevent the slope portion of the key signal from protruding into the next line or field.

[Brief explanation of the drawing]

FIG. 1 is a schematic system diagram showing an embodiment of the special effects device according to the present invention, FIG. 2 is a block diagram showing its detailed configuration, and FIG. 3 is a diagram showing the configuration of the horizontal key signal waveform storage circuit shown in FIG. Curve diagrams shown in Figures 4 and 5
The figure is a schematic diagram for explaining the moving operation of the screen switching section on the screen, FIG. 6 is a curve diagram showing an equivalent configuration of the polarity switching circuit 4 in FIG. 2, and FIGS. 7 and 8 are the screen switching sections. FIG. 9 is a schematic diagram showing the wipe pattern to be generated; FIG.
15 to 15 are schematic diagrams for explaining the relationship between the operation of the fader lever and the moving operation of the screen switching section on the screen, and FIG. 16 shows the signals of each part of the key signal forming circuit section K3 of FIG. 2. FIG. 1, 2...Horizontal and vertical key signal waveform storage circuits,
4... Polarity switching circuit, 11... Address counter, 12... Offset addition circuit, 13... Wipe control circuit, 14... Up/down switching control circuit, 21, 25... Gain adjustment circuit, 23... Hard key formation Circuit, 24...Border key signal forming circuit, 26...Visual correction circuit, 31...Buffer memory, 32...Selection circuit, 41, 42...Horizontal and vertical waveform memory, 46...Transfer address counter, 47, 48... ...Horizontal and vertical address counters, 43...NAM circuit, 44...Latch circuit.

Claims (1)

[Scope of Claims] 1 (a) A first memory area for storing sample data of a first key signal waveform portion representing a screen portion, and a second key representing a slope following the first key signal waveform portion. It has a waveform storage circuit having a second memory area for storing a signal waveform portion, and a series of addresses are assigned to the first and second memory areas, and a predetermined range is assigned while changing the address of the access start point. (b) controlling the address corresponding to the sample data to be read from the waveform storage circuit in accordance with the wipe pattern to be obtained; 1. A special effect device comprising: address control means for controlling an input video signal based on the basic key signal. 2 (a) a first memory area for storing sample data of a first key signal waveform portion representing a screen portion and a second key signal waveform portion representing a slope following the first key signal waveform portion; It has a waveform storage circuit having a second memory area, and reads a predetermined range of sample data by assigning a series of addresses to the first and second memory areas and changing the address of the access start point. (b) address control means for controlling an address corresponding to sample data to be read from the waveform storage circuit in accordance with a wipe pattern to be obtained; (c) gain control means for controlling the gain of a second key signal waveform portion representing the slope of the basic key signal, the signal obtained at the output end of the gain control means being used as the input video signal as the key signal; A special effects device characterized by switch control.