JP2532688B2 - Dual screen tv - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dual-screen television (hereinafter referred to as PinP) function in a double-density television receiver that performs progressive scan conversion.

2. Description of the Related Art In recent years, a dual-screen television is a television receiver that performs scanning line interpolation and progressive scan conversion as a method of improving image quality like IDTV, and is added as one means and function to increase added value. (Toshiba review: Vol. 42, No. 12, "High-definition digital TV", issued December 1, 1987).

Hereinafter, an example of the above-described conventional PinP will be described with reference to the drawings. 3 and 4 are for explaining a conventional example. First, FIG. 3 is a block diagram of a PinP using one frame memory.

In FIG. 3, reference numeral 1 denotes an input terminal for a sub-picture video signal,
Reference numeral 2 is a filter unit for interpolating the input sub-picture video signal, 3 is a thinning-out processing circuit section for thinning out in the horizontal and vertical directions, 4 is a frame memory, 5 is a vertical synchronizing pulse of the sub-picture video signal, and horizontal First to generate sync pulse and clock
Of the sync signal generation circuit, 6 is the input terminal of the video signal for the main screen, 7
Is a second sync generation circuit for generating a vertical sync pulse, a horizontal sync pulse and a clock of the parent screen video signal, 8 is an output changeover switch for synthesizing the parent screen and the child screen, and 9 is an output terminal of the synthesized video signal , 10 is a switch for switching the size of the small screen, 13 is output switching control means for determining the image output position of the small screen, 14 is a read control circuit for controlling the reading of the frame memory 4, and 15 is writing of the frame memory 4. A write control circuit 16 for executing the operation is a circuit for predicting whether or not the read will be preceded by the write to the frame memory 4.

PinP with 1-frame memory configured as above
The operation will be described below.

4a and 4b are timing charts for explaining the operation of FIG. In FIG. 4a, I is the video signal of the child screen, II is the video signal of the parent screen, III is the timing of reading and writing the frame memory, IV is the timing of writing the frame memory, and V is the timing of reading the frame memory. is there. Further, as shown in FIG. 2B, the contents of two fields, one for A field and the other for B field, are written in one frame memory. To read the frame memory 4, the read control circuit 14 determines the field polarity of the parent screen video signal from the vertical sync pulse and horizontal sync pulse reproduced by the second sync generation circuit 7, and the frame output is made by the decision output signal. Alternately with the contents of the A field and the B field of 4. On the other hand, in the writing of the frame memory 4, the write control circuit 15 generates a signal that alternately changes in field units from the vertical synchronization pulse reproduced by the first synchronization generation circuit 5, and this output signal is used for the A field, Do for B field. In the prediction circuit 16, the field polarity determination signal of the master screen video signal output from the read control circuit 14, the image output position of the child screen output from the output switching control unit 13, and the child screen image signal with respect to the image output position. From the relative phase, it is predicted whether or not read overtaking will occur during the writing of the frame memory 4, and if read overtaking occurs during the writing of the contents of one field, the output of the write control circuit 15 Invert the signal,
The writing position to the frame memory 4 is reversed. For example, if the contents of the i-th field in FIG. 4 are written for the B-field, the reading will overtake the writing in the middle of the writing, so the video signal of the i-th field is written for the A-field. Now, when the size of the small screen is switched by the changeover switch 10, the internal processing of the thinning processing circuit unit 3 and the output switching control means 13 is immediately switched.

FIG. 5 is a block diagram of a double-density PinP corresponding to a double-density television receiver that performs progressive scan conversion by the method of FIG. Here, 1 is an input terminal of a video signal for a child screen, 2 is a filter section, 3 and 20 are first and second thinning processing circuits, and 4 and 21 are first and second
Frame memory, 5 is a first sync generation circuit, 6 is an input terminal for a parent screen video signal, 7 is a second sync generation circuit, 22
Is a scanning line interpolation circuit, 8 and 23 are first and second output changeover switches, 24 and 25 are first and second double speed conversion circuit sections, 9 is an output terminal of a synthesized video signal, and 10 is a child screen A size changeover switch, 13 is an output changeover control means, and 17 is a frame synchronization unit.

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention However, in the above configuration, when the size of the small screen is switched, the thinning processing circuit unit and the output switching control unit are immediately changed to the processing of the switched size, Since the reading is performed before the video signal in the frame memory is rewritten to the switched video signal, when the size of the sub-screen is changed, a strange video (video of the size before switching) is displayed for a moment. There was a problem that it was output.

In view of the above problems, the present invention provides a dual-screen television that does not output a sub-screen when the size of the sub-screen is switched and until all video signals in the frame memory are rewritten.

Means for Solving the Problems In order to solve the above problems, the dual-screen television of the present invention is
Sub-picture video signal input terminal, filter section connected to the sub-picture video signal input terminal, thinning processing circuit section connected to the filter section, and frame memory connected to the thinning processing circuit section And a frame synchronization unit that controls the frame memory, an input terminal for the parent screen video signal, and an output switch that selects one of the input parent screen video signal and the output signal of the frame memory. A switch, an output changeover control means for controlling the output changeover switch and the frame synchronization unit, a small screen size changeover switch for controlling the thinning processing circuit section and the output changeover control means, and the small screen size changeover switch The sub-picture size switching detection circuit connected to the sub-screen and the output pulse of the sub-screen size switching detection circuit are activated to drive the output switching control means. It is those with the configuration that counter.

Effect The present invention detects, by the above-described configuration, that the size of the small screen has been switched, and after the detection signal is output, all the video signals inside the frame memory are rewritten to the switched video signal. During the period, the output switching control means is controlled so as to output only the parent screen video signal.

Embodiment A dual-screen television according to an embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a dual screen television according to an embodiment of the present invention. In the figure, 1 is an input terminal for a sub-picture video signal, 2 is a filter unit for interpolating an input sub-picture video signal, 3 is a thinning-out processing circuit for thinning out horizontally and vertically, and 4 is a frame memory. Reference numeral 5 denotes a first sync generation circuit for generating a vertical sync pulse, a horizontal sync pulse and a clock of the sub-picture video signal, 6 is an input terminal for the main picture signal, and 7 is a vertical sync pulse for the main picture signal. , A horizontal sync pulse, a second sync generation circuit for generating a clock, 8 is an output changeover switch for synthesizing a parent screen and a child screen, 9 is an output terminal of a synthesized video signal, and 10 is a size of the child screen A switch, 13 is an output switching control unit that determines the image output position of the small screen, 14 is a read control circuit that controls reading of the frame memory 4, 15 is a write control circuit that controls writing of the frame memory 4, and 16 is a frame This is a circuit for predicting whether the reading will be performed first with respect to the writing to the memory 4, and the above is the same as FIG. 3 described in the conventional example. Reference numeral 11 is a sub-screen size switching detection circuit connected to the sub-screen size switching switch 10, and 12 is a counter which is activated by a switching detection signal output from the sub-screen size switching detection circuit 11 and is used for the second synchronization. The output vertical synchronizing pulse of the generating circuit 7 is counted and its output is applied to the output switching control means 13.

The operation of the dual-screen television configured as described above will be described below with reference to FIG. In the figure a, III
Is the read / write timing of 1-frame memory, IV is 1
The writing timing of the frame memory is shown, and V shows the reading timing of the I frame memory. Now, at time k, the size of the inset screen is switched from 1/3 to 1/2 in both the vertical and horizontal directions. From the video signal written for the B field immediately after the time k, the thinning processing of 1/2 is performed. The output control means 13 also performs processing when the size of the small screen is 1 / 2x1 / 2 at time k. However, the video signal for the A field that is read next is a video signal that has been decimated to 1/3, and the video of the child screen that is output becomes strange. Therefore, the small screen size switching detection circuit 11 detects the time k and activates the counter 12. The counter 12 counts the period in which the sub-picture is not output by the vertical sync pulse reproduced by the second sync generation circuit 7, and outputs the pulse signal during that period. The output switching control means 13 controls the output switching control switch 8 to forcibly output only the main screen video signal while the pulse signal is being output from the counter 12. As described above, according to this embodiment, the size of the small screen can be changed neatly by outputting only the video signal of the main screen for a while, for example, one screen period immediately after the size switching.

It should be noted that although the PinP of a normal television receiver has been described in the embodiment, the same process can be implemented for a PinP of a double-density television receiver.

EFFECTS OF THE INVENTION As described above, the present invention includes an input terminal for a sub-picture video signal, a filter section connected to the sub-picture video signal input terminal, and a thinning processing circuit section connected to the filter section. , A frame memory connected to the thinning-out processing circuit unit, a frame synchronization unit for controlling the frame memory, an input terminal for a parent screen video signal, an input parent screen video signal and the output of the frame memory An output changeover switch for selecting one of the two signals, an output changeover control means for controlling the output changeover switch and the frame synchronization section, and a small screen size for controlling the thinning processing circuit section and the output changeover control means. Change-over switch, the small screen size switching detection circuit connected to the small screen size switching switch, and the output pulse of the small screen size switching detection circuit By providing a counter that is activated and drives the output switching control means, when the size of the small screen is switched, the size can be switched neatly without outputting the image of the size before the momentary switching. .

[Brief description of drawings]

FIG. 1 is a block diagram of a dual-screen television according to an embodiment of the present invention, FIG. 2 is a timing diagram for explaining the operation of FIG. 1, and FIG. 3 is a block diagram of a conventional dual-screen television. FIG. 4 is a timing diagram for explaining the operation of FIG. 3, and FIG. 5 is a block diagram of another conventional dual-screen television. 1 ... Sub-screen video signal input terminal, 2 ... Filter section,
3 ... thinning processing circuit section, 4 ... frame memory, 5 ...
... 1st sync generation circuit, 6 ... parent screen video signal input terminal, 7 ... 2nd sync generation circuit, 8 ... output changeover switch, 9 ... combined video signal output terminal, 10 ... Small screen size selection switch, 11 ... Small screen size switching detection circuit, 12 ... Counter, 13 ... Output switching control means, 14
…… Read control circuit, 15 …… Write control circuit, 16 …… Overtaking Prediction circuit for overtaking.

Front page continuation (72) Inventor Atsushi Ishizu 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. Within Soft Co., Ltd.

Claims (2)

(57) [Claims] 1. A sub-screen video signal input terminal, a filter section connected to the sub-screen video signal input terminal, a thinning processing circuit section connected to the filter section, and a thinning processing circuit section. The selected frame memory, the frame synchronization unit that controls the frame memory, the input terminal for the parent screen video signal, the input parent screen video signal and the output signal from the frame memory. An output changeover switch to be selected, an output changeover control means for controlling the output changeover switch and the frame synchronization unit, a changeover switch having a small screen size for controlling the thinning processing circuit section and the output changeover control unit, and the small screen. The sub-screen size switching detection circuit connected to the size switching switch and the output switching control hand activated by the output pulse of the sub-screen size switching detection circuit. The a counter for a predetermined period of time controlled, dual-screen television said output switching control means, characterized in that fixed to the fixed period, the video signal side for the output changeover switch main screen. 2. The frame synchronization unit includes a read control circuit for controlling reading of the frame memory, a write control circuit for controlling writing of the frame memory, and a read / write overtaking of the frame memory for controlling the write control circuit. A dual-screen television as set forth in claim 1, further comprising a circuit for predicting the occurrence thereof.