JPH0522096A - High voltage switching circuit - Google Patents

Abstract

PURPOSE:To lower the operating power supply voltage of the high voltage switching circuit to the operating limit voltage of a device. CONSTITUTION:In order to transmit the level of a terminal 5 to a terminal 4 according to a control signal inputted to a terminal 3, boosting is executed by the clock of a positive phase inputted from a terminal 2 while using a charge pump circuit composed of a transistor 10, transistor 8 and capacitor 12. Further, the boosting of a connecting part 13 is executed by the clock of a reverse phase inputted from the terminal 2 while using a charge pump circuit composed of a transistor 9, transistor 7 and capacitor 11. Thus, a transistor 6 improving a boosting effect with the complementary of the charge pump circuits using the two clocks of the inverted phases prevents the level of the boosted terminal 4 and the control signal of the terminal 3 from being short-circuited.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high voltage switching circuit for controlling a signal system of a digital circuit whose level and power supply voltage are greatly different from each other.

[0002]

2. Description of the Related Art In a digital circuit, a high voltage switching circuit of a charge pump type is used for controlling a signal system of a high voltage having a level different from that of a power supply voltage. Figure 2 below
The conventional configuration will be described below.

In order to transmit the level of the terminal 17 to the terminal 16 by the control signal input to the terminal 15, the transistor 1
The voltage is boosted by the clock input from the terminal 14 using the charge pump circuit composed of the transistor 9, the transistor 18 and the capacitor 19. The transistor 19 prevents the boosted level of the terminal 4 and the control signal of the terminal 3 from being short-circuited.

[0004]

In the circuit of the one-clock system as shown in FIG. 2, the operating power supply voltage cannot be lowered to the operating limit of the device.

[0005]

SUMMARY OF THE INVENTION According to the present invention, a power supply voltage is obtained by further charge pumping a signal charge-pumped by a positive-phase clock signal using two-phase inverted clock signals by an opposite-phase clock signal. It is a high-voltage switching circuit characterized by propagating a higher level signal and reducing the operating power supply voltage to the operating limit of the device.

[0006]

With this configuration, the input clock can be output as it is from the output of the frequency divider by switching the selection signal of the multiplexer of FIG. 2, and when the function of the logic circuit is tested, the input clock is divided. The time spent can be shortened.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows the configuration of an embodiment of the present invention.

According to the control signal input to the terminal 3, the terminal 4
In order to transmit the level of the terminal 5 to the terminal 10, a charge pump circuit composed of the transistor 10, the transistor 8 and the capacitor 12 is used to boost the voltage with the positive phase clock input from the terminal 2. Further, the charge pump circuit composed of the transistor 9, the transistor 7, and the capacitor 11 is used to boost the voltage of the connection portion 13 with the clock of the opposite phase input from the terminal 2. In this way, the charge pump circuit using the clocks having the two inverted phases complements each other to enhance the boosting effect. The transistor 6 prevents the boosted level of the terminal 4 and the control signal of the terminal 3 from being short-circuited.

Transistors 9 and 1 of the charge pump circuit
By setting the threshold level of 0 higher than that of the transistors 7 and 8, the level transmitted from the terminal 5 to the terminal 4 is never higher than that of the terminal 5.

[0010]

According to the present invention, it is possible to reduce the operating power supply voltage of a circuit having a plurality of power supplies to the operating limit voltage of the device.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a high voltage switching circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram of a conventional high voltage switching circuit.

[Explanation of symbols]

 1 Positive Phase Clock 2 Reverse Phase Clock 3 Input Terminal 4 Output Terminal 5 High Voltage Power Supply 6 to 10 Transistors 11 and 12 Capacitance 13 Positive Phase Clock 14 Input Terminal 15 Output Terminal 16 High Voltage Power Supply 17 to 19 Transistor 20 Capacitance

Claims (1)

Claim: What is claimed is: 1. A voltage higher than a power supply voltage is obtained by charge pumping a signal charge-pumped by a first clock signal by a second clock signal using a clock signal whose phase is reversed. High-voltage switching circuit capable of propagating the signal of the device and operating up to the operating limit of the device.