JP2964558B2 - I / O interface circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention is used for an input / output interface circuit for connecting an intelligent terminal and an external device in data communication.

The present invention particularly includes a single power supply driven DC-DC converter circuit and a serial communication transceiver circuit, for example, RS232D
Used for interface circuits.

〔Overview〕

The present invention relates to an input / output interface circuit for data communication including a DC-DC converter circuit and a transmitting / receiving circuit for serial communication, wherein the frequency of a clock signal for driving the DC-DC converter is set to start operation of the DC-DC converter. By increasing the voltage sometimes and lowering it in the steady state of operation, the power consumption is reduced and the operation start-up time is shortened.

[Conventional technology]

Conventionally, a DC-DC converter circuit driven by a single power supply is often configured by a charge pump method. As shown in FIG. 3, the transistor switches S _{1 to} S ₈ are turned “ON” and “OFF” using the clock signal generated from the oscillation circuit 5, and the voltage of +5 V input to the input terminal 1 is changed to the capacitor C _1. and C ₃ with + 10V is generated in the output terminal 2 a, also constitutes a circuit for generating a -10V to the output terminal 3 by using the capacitor C ₂ and C _4.

 Next, the operation will be described.

The clock signal output from the oscillation circuit 5 is given as a signal of a transistor switch, and the odd-numbered transistor switches S ₁ , S ₃ , S _5, and S ₇ , and the even-numbered transistor switches S ₂ , S _{2 4} , S ₆ and
S ₈ by passing through the inverter 4, the "on" at the same time at different timings, performing "off" operation.

On the other hand, +5 V is applied to the input terminal 1 of the DC-DC converter circuit 10.
Although but applied, by repeating the operation of the transistor switches S ₁ to S _8, the capacitor C ₃ + 10V is charged, -10 V is charged to the capacitor C _2.

The power supply voltage of ± 10 V obtained by the above operation is supplied as the power supply voltage of the transmission / reception buffer for transmitting and receiving data in serial communication.

When the DC-DC capacitor circuit 10 is applied to data terminal equipment, a clock signal is generated from the oscillation circuit 5 during communication, and the clock signal is stopped during non-communication to reduce the current consumption of the set. DC capacitor circuit 10
The device has been devised to stop the operation.

[Problems to be solved by the invention]

However, transistor switches S ₁ to S ₈ of this conventional DC- capacitor circuit 10, because it is a switch of a CMOS (complementary MOS transistor) structure in order to measure the power consumption of the set, the oscillation circuit 5 If the frequency of the output clock signal is set too high, the through current flowing through the switch having the CMOS structure increases, and on the contrary, the power consumption of the set is impaired.

On the other hand, when shifting from non-communication to communication, if the frequency of this clock signal is too low to stabilize the output voltage ± 10 V of the DC-DC converter circuit 10 at an early stage, the state transits to a communicable state. There is a disadvantage that the operation start-up time is long and real-time communication becomes impossible.

The object of the present invention is to eliminate the disadvantages mentioned above,
It is an object of the present invention to provide an input / output interface circuit that achieves low power consumption and a short operation start-up time.

[Means for solving the problem]

The present invention provides a DC-DC converter circuit that receives a positive DC voltage and outputs a boosted positive / negative DC voltage and a serial communication transmitting / receiving circuit that operates using the output voltage of the DC-DC converter circuit as a power supply voltage. DC according to the input control signal
An input / output interface circuit comprising: an oscillation circuit that generates a clock signal for driving the DC converter circuit; wherein the oscillation circuit includes a frequency control circuit that changes the frequency of the clock signal according to the frequency control signal; A frequency control signal generating circuit for generating the frequency control signal according to a request signal is provided.

Also, the present invention provides a positive and negative
DC-DC converter circuit that outputs DC voltage, and this DC-DC
A transmission / reception circuit for serial communication that operates using an output voltage of the converter circuit as a power supply voltage, and a first oscillation circuit that generates a first clock signal for driving the DC-DC converter circuit by an input control signal. In the input / output interface circuit, a frequency divider that divides a first clock signal output from the first oscillation circuit to generate a second clock signal, and a communication request signal that is input,
A switching circuit for switching a clock signal for the DC-DC converter circuit from the first clock signal to the second clock signal.

Also, the present invention provides a positive and negative
DC-DC converter circuit that outputs DC voltage, and this DC-DC
A transmission / reception circuit for serial communication that operates using an output voltage of the converter circuit as a power supply voltage, and a first oscillation circuit that generates a first clock signal for driving the DC-DC converter circuit by an input control signal. An input / output interface circuit configured to generate a second clock signal having a lower frequency than the first clock signal by an input set ready signal; and the DC-DC converter by an input communication request signal. A switching circuit for switching a clock signal for the circuit from the first clock signal to the second clock signal.

[Action]

As a clock signal of the DC-DC converter circuit, for example, a switching circuit uses a first clock signal output from a high-frequency first oscillation circuit at the time of starting operation, and a signal used for communication in a steady operation state, for example. The second clock signal whose frequency has been lowered to the above frequency is used. This switching circuit is realized by, for example, a one-shot multivibrator that generates one pulse having a rise time width according to an input transmission request signal, and a multiplexer that switches the first and second clock signals by the pulse. it can. Further, a variable frequency type oscillator may be used to change the frequency of a clock oscillated by an input transmission request signal.

Therefore, in the steady operation state, the frequency of the clock signal is reduced, the through current of the CMOS type transistor switch is reduced, the power consumption is reduced, and the frequency of the clock signal is increased at the start of operation to increase the operation start time. Can be shortened.

〔Example〕

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing a main part of a first embodiment of the present invention, in which a transmitting / receiving circuit for serial communication is omitted.

In the first embodiment, a positive DC voltage is
A DC-DC converter circuit 10 for outputting a DC voltage;
A serial communication transceiver circuit (not shown) that operates using the output voltage of the DC converter circuit 10 as a power supply voltage, and a first clock signal 13 that drives the DC-DC converter circuit 10 by a set ready signal 11 as an input control signal. A first clock signal output from the first oscillation circuit 5, which is a feature of the present invention.
Frequency divider 7 for dividing the frequency of 13 and generating the second clock signal 14
And a one-shot multivibrator 6 as a switching circuit for switching the clock signal for the DC-DC converter circuit 10 from the first clock signal 13 to the second clock signal 14 in response to a transmission request signal 12 as an input communication request signal. And a multiplexer 8.

 Next, the operation of the first embodiment will be described.

There are two types of signals to be switched by the multiplexer 8, a first clock signal 13 output from the oscillation circuit 5, and a second clock signal obtained by dividing the frequency of the clock signal 13 by the frequency dividing circuit 7.

Then, in order to select the first clock signal, the one-shot multivibrator 6 synchronizes with the transmission request signal 12 on the communication partner side until the output voltage of the DC-DC converter circuit 10 rises to the specified value. The pulse output is applied to the signal selection terminal of the multiplexer 8 during the operation start-up time.
As a result, the period until the output voltage of the DC-DC converter circuit 10 rises, due first clock signal 13 output from the oscillator circuit 5 by which the high frequency driving transistor switches S ₁ to S _8, DC- The rise time of the output voltage of the DC converter circuit 10 can be shortened.

After the output voltage rises, the multiplexer 8 selects the second clock signal 14 after frequency division. Thus, the driving frequency of the transistor switches S ₁ to S ₈ is lower to the frequency used during normal communication, it is possible to hold the through current flowing through the transistor switch S ₁ to S ₈ suppress the current consumption of the entire input-output interface circuit .

Here, the reason why the one-shot multivibrator 6 is used is that the pulse width of the transmission request signal transmitted from the communication partner differs depending on the communication content.
-The DC converter circuit 10 is configured to generate a pulse having a pulse width until the output voltage reaches a specified value after the power is turned on.

The input / output interface circuit of the present invention includes a unit (not shown) that can receive a set ready signal 11 for confirming set ready from a communication partner, and stop the DC-DC converter circuit 10 during non-communication.

FIG. 2 is a block diagram showing a main part of a second embodiment of the present invention.

The second embodiment is different from the first embodiment in FIG. 1 in that the frequency dividing circuit 7 is replaced by a first clock signal 13 by an input set ready signal 11, which is a feature of the present invention.
That is, a second oscillation circuit 5a that outputs the second clock signal 14 having a lower frequency is provided.

 Next, the operation of the second embodiment will be described.

Immediately after the set ready signal 11 rises, the first clock signal 13 from the first oscillator circuit to drive a transistor switch S ₁ to S _8, the time after which the output voltage rises to the prescribed value, the second The second clock signal 14 from the oscillation circuit 5a of
Drives the transistor switches S _{1 to} S ₈ to switch the operating frequency of the DC-DC converter circuit 10.

The switching between the oscillation circuits 5 and 5a and the setting of the switching time are controlled by the one-shot multivibrator 6. During non-communication, the transmission request signal 12 is normally “low”.
Therefore, both oscillation circuits 5 and 5a are stopped, and the standby state can be maintained.

Although not shown in the above embodiment,
As an oscillation circuit, for example, a frequency control circuit including a variable capacitance diode is included, and the output signal of the one-shot multivibrator may be given to this frequency control circuit.
The present invention can be realized.

〔The invention's effect〕

As described above, the present invention changes the driving frequency of the DC-DC converter circuit between the non-communication state and the communication state and between the communication state, and particularly, the operation frequency immediately after the communication. As a result, the transient characteristics of the DC-DC converter circuit are improved, and the input / output interface circuit can be maintained in the standby state during non-communication, so that there is an effect that the current consumption of the set can be reduced.

This effect is particularly remarkable for the battery life when real-time communication is performed between a handy terminal and a laptop personal computer.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a main part of a first embodiment of the present invention. FIG. 2 is a block diagram showing a main part of a second embodiment of the present invention. FIG. 3 is a block diagram showing a main part of a conventional example. 1, input terminals, 2, 3, output terminals, 4, inverters, 5, 5a, oscillation circuits, 6, one-shot multivibrators, 7, frequency divider circuits, 8, multiplexers,
10: DC-DC converter circuit, 11: Set ready signal, 12: Transmission request signal, 13, 14: Clock signal, C ₁
CC ₄ …… Capacitor, S ₁ SS ₈ …… Transistor switch.

Claims (3)

(57) [Claims] 1. A DC-DC converter circuit that receives a positive DC voltage and outputs a boosted positive / negative DC voltage, and a serial communication transceiver circuit that operates using the output voltage of the DC-DC converter circuit as a power supply voltage. An oscillation circuit that generates a clock signal for driving the DC-DC converter circuit according to an input control signal, wherein the oscillation circuit changes a frequency of the clock signal by a frequency control signal. An input / output interface circuit, comprising: a control circuit; and a frequency control signal generating circuit for generating the frequency control signal according to an input communication request signal. 2. A DC-DC converter circuit that receives a positive DC voltage and outputs a boosted positive / negative DC voltage, and a serial communication transceiver circuit that operates using the output voltage of the DC-DC converter circuit as a power supply voltage. A first oscillation circuit that generates a first clock signal for driving the DC-DC converter circuit according to an input control signal, an input / output interface circuit comprising: a first oscillation circuit output from the first oscillation circuit. A frequency divider for dividing one clock signal to generate a second clock signal; and a clock signal for the DC-DC converter circuit is converted from a first clock signal to a second clock signal by an input communication request signal. An input / output interface circuit, comprising: a switching circuit for switching. 3. A DC-DC converter circuit that inputs a positive DC voltage and outputs a boosted positive / negative DC voltage, and a serial communication transmitting / receiving circuit that operates using the output voltage of the DC-DC converter circuit as a power supply voltage. A first oscillation circuit for generating a first clock signal for driving the DC-DC converter circuit in accordance with an input control signal. A second oscillation circuit that generates a second clock signal having a lower frequency than the clock signal; and a clock signal for the DC-DC converter circuit is changed from the first clock signal to the second clock signal by an input communication request signal. An input / output interface circuit, comprising: a switching circuit for switching.