JPH05219449A - Charge transfer device - Google Patents

Abstract

PURPOSE:To improve the transfer efficiency by forming plural barrier regions with respect to one storage region in the unit of repetition and connecting electrodes of the storage region and the barrier region in common. CONSTITUTION:Plural barrier regions (comprising barrier layers 3a, 3b and barrier electrodes 9, 10) are formed to one storage region in the unit of repetition and the electrodes 5, 9 and 6, 10 of the storage region and the barrier region are connected in common in the unit of repetition. That is, the barrier layer is made up of a 1st barrier layer 3a and a 2nd barrier layer 3b and the transfer electrodes 9, 10 are used for the barrier layers 3a, 3b in common. Thus, the unit length X in the structure is the sum of a storage area length L1, a 1st barrier length L2 and a 2nd barrier length L2. Thus, the transfer length of each region is reduced up to X/3 below X/2 thereby improving the transfer efficiency.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a charge transfer device,
More specifically, a CCD having a storage region and a barrier region
Type charge transfer device.

[0002]

2. Description of the Related Art In recent years, in the development of a solid-state image pickup device suitable for an HDTV system, a 1-inch size 130-2
A CCD image sensor with, 000,000 pixels has been proposed.
Such an image sensor includes two horizontal registers. FIG. 4 shows a conventional two-phase drive buried channel type C
The structure of the CD horizontal register is shown.

In the figure, 1 is a semiconductor substrate, 2 is a buried layer forming a transfer channel, 4 is a gate insulating film on the surface of the semiconductor substrate, and 5, 6 and 7 are transfer of storage regions formed through the insulating film 4. Electrodes 3 are barrier layers in which impurities having a conductivity type opposite to that of the buried layer 2 are introduced so as to generate a desired potential difference with the storage region. It is a transfer electrode.

The horizontal register having the above structure is required to have a high-speed operation (driving frequency of about 24 to 37 MHz) which is about 2 to 3 times that of the image sensor for the current system. Further, since the horizontal register is composed of two lines, the structural repeating unit length X which is generally composed of a combination of one storage electrode (5, 6, 7) and one barrier electrode (9, 10) is 7 to 11 μm, which is equal to the horizontal pixel pitch
It becomes a degree. Since the transfer efficiency of the CCD register generally depends on the exponential function with respect to the transfer length (electrode length), it is desirable to make this as short as possible.

[0005]

However, the conventional register shown in FIG. 4 has a disadvantage that the electrode length cannot be set to X / 2 or less.

[0006]

It is an object of the present invention to provide a charge transfer device having high transfer efficiency.

[0007]

In order to achieve the above object, a charge transfer device according to the present invention forms a plurality of barrier regions for one storage region within one repeating unit, and The storage region and each electrode in the barrier region are commonly connected.

[0008]

Since the present invention is configured as described above, it is possible to make the transfer length of each area of the storage and barrier shorter than before.

[0009]

Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 shows the structure of a charge transfer device (two-phase drive buried channel CCD register) according to the first embodiment of the present invention. The same parts as those in the prior art (FIG. 4) are designated by the same reference numerals, and the description thereof will be omitted. Only different parts will be described in detail.

In this embodiment, the barrier layer is composed of first barrier layers 3a and 3b having different impurity concentrations, and
The transfer electrodes 9 and 10 are connected to the first and second barrier layers 3
It is shared with a and 3b.

With such a configuration, the structural unit length X
Is the sum of the accumulation region length L1, the first barrier region length L2, and the second barrier region length L3. Therefore, the transfer length of each area can be shortened to X / 3 at X / 2 or less, and the transfer efficiency is significantly improved. Note that barrier electrodes may be provided corresponding to each of the first barrier layer 3a and the second barrier layer 3b, and a total of three electrodes may be formed.

FIG. 2 shows a second embodiment of the present invention.
The structure of a phase driven buried channel CCD register is shown. In this embodiment, the barrier region is composed of the first barrier electrodes 9a and 10a, the second barrier electrodes 9b and 10b having different gate insulating film thicknesses, and the common barrier layer 3. With such a configuration, the same operational effect as that of the first embodiment can be obtained.

FIG. 3 shows a second embodiment according to the present invention.
The structure of a phase driven buried channel CCD register is shown. In this example, the storage electrodes 5 to 7, the first barrier electrodes 9a and 10a, and the second
The desired potential difference is obtained by setting the gate insulating films of the barrier electrodes 8b to 10b of different thicknesses.

In the above three embodiments,
Although either the impurity concentration of the barrier layer or the film thickness of the gate insulating film is made different, the combination of both is 2
You may make it comprise one barrier area | region. Further, it goes without saying that the present invention can be applied to the case where there are three or more barrier regions.

[0015]

As described above, in the charge transfer device according to the present invention, a plurality of barrier regions are formed for one storage region in one repeating unit, and the storage region and the barrier region are formed. Since the electrodes are commonly connected, the transfer efficiency is significantly improved.

[Brief description of drawings]

FIG. 1 is an embedded CCD according to a first embodiment of the present invention.
It is sectional drawing which shows the structure of a register.

FIG. 2 is an embedded CCD according to a second embodiment of the present invention.
It is sectional drawing which shows the structure of a register.

FIG. 3 is an embedded CCD according to a third embodiment of the present invention.
It is sectional drawing which shows the structure of a register.

FIG. 4 is a cross-sectional view showing the structure of a conventional embedded CCD register.

[Explanation of symbols]

 1 Semiconductor Substrate 2 Buried Layer 3 (3a, 3b) Barrier Layer 4 Gate Insulating Film 5, 6, 7 Storage Electrode 8, 9, 10 Barrier Electrode

Claims (5)

[Claims] 1. A structural repeating unit is formed from a storage region and a barrier region formed on an insulating substrate, and a plurality of barrier regions are provided for one storage region in one repeating unit. A charge transfer device, wherein the charge transfer device is formed, and each electrode of the storage region and the barrier region in the repeating unit is commonly connected. 2. The charge transfer device according to claim 1, wherein the plurality of barrier regions includes one barrier electrode and a plurality of barrier layers having different impurity concentrations. 3. The plurality of barrier regions are composed of one barrier layer and a plurality of barrier electrodes, and gate insulating films having different film thicknesses are formed under the plurality of barrier electrodes, respectively. The charge transfer device according to claim 1, which is characterized in that. 4. The plurality of barrier regions are composed of a plurality of barrier electrodes having different impurity concentrations and a plurality of barrier layers corresponding to the barrier electrodes, and gate insulating layers having different film thicknesses are formed under the plurality of barrier electrodes. The charge transfer device according to claim 1, wherein a film is formed. 5. The plurality of barrier regions do not have a barrier layer, and gate insulating films having different film thicknesses are formed below the storage electrodes forming the barrier region and the storage region, respectively. The charge transfer device according to claim 1.