JP3381151B2 - Charge transfer device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a charge transfer device, and more particularly to a charge transfer device having an improved transfer efficiency for minute signal charges.

[0002]

2. Description of the Related Art FIG. 12 shows a conventional floating diffusion amplification method (Float
is a plan view showing an example of a charge transfer device having an output mechanism called an ing diffusion amplifer).
hnicalDigest, 1973, pp24, and IEDM Technical Diges
12 (a) is a plan view and FIG. 12 (b) is a cross-sectional view showing an internal structure taken along line II ′ of FIG. 12 (a). is there. A low concentration N ⁻ -type semiconductor region 102 is formed on a P-type semiconductor substrate 101.
And N-type semiconductor regions 103 having a higher concentration than these are alternately arranged, and the first conductive electrodes 107a and 107b are provided on the N ⁻ -type semiconductor region 102 via the insulating film 106.
And second conductive electrodes 108a and 108b are arranged on the N-type semiconductor region 103. The clock pulse Φ1 is supplied to the first and second conductive electrodes 107a and 108a, and the clock pulse Φ2 is supplied to the first and second conductive electrodes 107b and 108b. Adjacent first and second conductive electrodes 107a, 108a or 207a, 208a, 1
07b, 108b as one set, and the metal wiring 1 every other set
11 are connected.

At the final stage of the charge transfer section, a third conductive electrode 109 is formed via the insulating film 106 in the N ⁻ type semiconductor region 102. The third conductive electrode 1
A constant voltage VOG is applied to 09 through the metal wiring 111. Further, a floating diffusion layer portion 112 is provided in an outer region of the third conductive electrode 109, and the floating diffusion layer portion 112 is an N ⁺ type semiconductor formed on the P type semiconductor substrate 101. A pulse voltage ΦR for resetting the signal charge transferred to the floating diffusion layer portion 112, which has a region 104 and is connected to the metal wiring 111 via the insulating film 106 on the N ⁻ type semiconductor region 102. Has a fourth conductive electrode 110 to which is applied. The reset voltage VR is applied to the outer region of the N ⁺ type semiconductor region 104 by the metal wiring 111. In addition, the P-type semiconductor substrate 101 is formed of P ⁺ to be an element isolation region so as to surround the semiconductor regions.
The type semiconductor region 105 is formed.

In the charge transfer device having this structure, the first and second conductive electrodes 107a and 108a are connected every other pair.
And the first and second conductive electrodes 107b, 108
In the second group of b, the clock pulses Φ1 and Φ2 shown in FIG.
By applying, the signal charges under the electrodes are sequentially transferred to the floating diffusion layer section 112, and the output circuit section performs charge-voltage conversion. The above operation is shown in FIGS.
It will be explained using the potential diagram shown in FIG. 12
When the fourth conductive electrode 110 is turned on by applying the reset clock voltage ΦR as shown in (c), the potential of the floating diffusion layer portion 112 is set to the same as the reset voltage VR. Subsequently, as shown in FIG. 12D, the fourth conductive electrode 110 is set to OFF for signal charge detection. Then, as shown in FIG. 12E, the clock pulses Φ1 and Φ2 applied to the wiring lines connected to the transfer electrodes are changed from the state of t1 shown in FIG. 13 to the state of t2, respectively. , First, second
Conductive electrodes 107a, 107b, 108a, 108b of
By changing the lower potential, the signal charges e1, e2, e
, 3 ... Are transferred one stage each.

At this time, the signal charge e1 is transferred to the floating diffusion layer portion 112 via the third conductive electrode 109, and the potential fluctuation due to the sent signal charge e1 is M
Impedance conversion is performed by an output circuit unit having a source follower amplifier composed of OS transistors,
The voltage output V is taken out. Assuming that the transferred signal charge amount is Q, the floating diffusion capacitance is C, and the voltage gain of the source follower amplifier is G, the signal output V is V = Q.
/ C ・ G. Then, for the next signal charge detection,
The fourth conductive electrode 110 is turned on, and the floating diffusion layer portion 112
Is set to the same as the reset voltage VR. By repeating this operation, the signal charges e1, e2, e3, ... Which are sequentially transferred through the first and second conductive electrodes 107a, 107b, 108a, 108b can be taken out as output signals.

[0006]

However, in the conventional charge transfer device described above, the floating diffusion layer portion 11 formed at the end of the charge transfer portion as shown in FIG.
By reducing the area of 2, the diffusion layer capacitance C is reduced and the signal charge detection sensitivity is improved. for that reason,
A structure is adopted in which the channel width W of the charge transfer portion is narrowed down to the channel width W ′ to make it narrow. However, in this charge transfer device, in order to make the signal charge storage areas S equal and secure the signal charge transfer capacity, the electrode length L ′ of the second conductive electrode formed at the end of the charge transfer portion is set.
Is designed to be longer than the electrode length L of the other second conductive electrode. Therefore, the traveling distance of the charge existing at the furthest place under the second conductive electrode is L ″,
The transfer efficiency of the minute signal charge, which is longer than the traveling distance L ′ in the central region under the second conductive electrode and is particularly problematic in the transfer efficiency, is the second one formed at the end of the charge transfer portion. The conductive length of the conductive electrode 208a is limited by the travel distance L "of the charge existing at the farthest position under the electrode L ', and there is a problem that the transfer efficiency becomes low.

An object of the present invention is to provide a charge transfer device which shortens the effective signal charge transfer distance and improves deterioration of the transfer efficiency of minute signal charges.

[0008]

The present invention has a charge transfer electrode having a plurality of first potential potential regions and a second potential potential region deeper than the first potential potential, and is adjacent to the output electrode. In the charge transfer device in which the channel width of the potential potential region is narrowed toward the output side immediately below the final charge transfer electrode, the first line is formed immediately below the final charge transfer electrode in the charge transfer direction. Potential potential, a third potential potential region deeper than the first potential potential region, and a fourth potential potential region deeper in potential than the third potential potential region, and a fourth potential potential region. , the area smell that was narrowed down the channel width
Then, the plane shape is any one of an ellipse, a trapezoid, and a triangle that widens toward the output side . Further, the fourth potential potential region and the second potential potential region are configured to have the same potential potential, or the third potential potential region and the second potential potential region are configured to have the same potential potential. The first to fourth potential potential regions are formed by the impurity concentration difference or the thickness of the insulating film under the electrodes.

According to the present invention, the charge storage region of the final charge transfer electrode formed at the end of the charge transfer portion is formed by the first, third and fourth potential potential regions having different potential potentials. When the transferred charges can be accumulated in the fourth potential potential region provided at a position close to the output side, and thus the electrode length of the final charge transfer electrode is increased in order to equalize the accumulation area of the signal charges, Also, it becomes possible to shorten the traveling distance of the electric charge existing at the furthest place under the electrode and improve the transfer efficiency of the signal electric charge.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a reference example according to the present invention.
Is a view showing the first embodiment of FIG. 1 (a) is a plan view, FIG. 1 (b) is a sectional view showing the internal structure along the line I-I '. A low concentration of N ⁻ on the P-type semiconductor substrate 101.
Type semiconductor regions 102 and N type semiconductor regions 103 having a higher concentration than these are alternately arranged, and first conductive electrodes 107a and 107b are formed on the N ⁻ type semiconductor region 102 via an insulating film 106. The N-type semiconductor region 1 disposed
The second conductive electrodes 108a and 108b are arranged on 03. Then, the first and second conductive electrodes 107
a and 108a are supplied with a clock pulse Φ1 as a timing driving signal, and the first and second conductive electrodes 107b and 108b are supplied with a clock pulse Φ2 as a different timing driving signal. The first and second conductive electrodes 107a, 108a or 207a, 208a, 107b, 108b are set as one set, and the metal wiring 111 is connected to every other set.

At the final stage of the charge transfer section, a third conductive electrode 109 is formed via the insulating film 106 of the N ⁻ type semiconductor region 102, and the third conductive electrode 1 is formed.
A constant voltage VOG is applied to 09 through the metal wiring 111. Further, a floating diffusion layer portion 112 is provided in an outer region of the third conductive electrode 109, and the floating diffusion portion 112 is an N ⁺ type semiconductor region formed on the P type semiconductor substrate 101. And a metal wiring 111 on the insulating film 106 on the N ⁻ type semiconductor region 102.
And the fourth conductive electrode 110 to which the pulse voltage ΦR for resetting the signal charges transferred in the floating diffusion layer portion 112 is applied. Also, the N ⁺
The metal wiring 1 is formed in the outer region of the type semiconductor region 104.
At 11, the reset voltage VR is applied. Further, on the P-type semiconductor substrate 101, a P ⁺ -type semiconductor region 105 to be an element isolation region is formed so as to surround each of the semiconductor regions.

Here, adjacent to the third conductive electrode 109,
And the clock pulse Φ1 with the same timing is input.
First conductive electrode 20 as the final charge transfer electrode
7a and the region immediately below the second conductive electrode 208a are
N having a first potential potential^-Type semiconductor region 102
And an N-type semiconductor region 2 having a third potential potential
03a and the fourth electric potential deeper than the third potential potential.
Three N-type semiconductor regions 203b having potentials
Area. The P-type semiconductor substrate 101
Impurity concentration of 1E15cm^-3And then each N
The impurity concentration of the semiconductor region of the mold is as follows. Sanawa
Then, N of the first potential potential^-Type semiconductor region 102
Is 8E16cm^-3, N-type semiconductor of the second potential potential
Body area 103 is 1E17cm^-3, Third potential potentiometer
Of the N-type semiconductor region 203a is 9E16 cm^-3, The fourth
The potential type N-type semiconductor region 203b is 1E17.
cm^-3, N⁺The semiconductor region 104 is 1E19 cm^-3And
It In addition, P for element isolation⁺ Type semiconductor region 105 is 1E
18 cm^-3Is. As a result, in this first embodiment
Has an impurity concentration of 104> 203 in each N-type semiconductor region.
The order is b> 103> 203a> 102.

The operation of the charge transfer device of the first embodiment will be described with reference to the potential diagrams shown in FIGS. 1 (c) to 1 (e). By applying the reset clock voltage ΦR as shown in FIG. 1C, the fourth conductive electrode 1
When 10 is turned on, the potential of the floating diffusion layer 112 is set to the same as the reset voltage VR. At this time, particularly in the case of a signal charge e1 in which the signal charge is small in which transfer efficiency is a problem, the N-type having the fourth potential potential of the final charge transfer electrode 208a adjacent to the third conductive electrode 109. Since the charges are accumulated in the semiconductor region 203b, the transfer distance L ″ 1 becomes smaller than that in the conventional example. Subsequently, as shown in FIG. 1D, the fourth conductive electrode is used for signal charge detection. 110 is set to off.
As shown in FIG. 1E, the clock pulses Φ1 and Φ2 applied to the wiring lines connected to the transfer electrodes are changed from the state of t1 shown in FIG. , Second conductive electrodes 107a, 1
The signal charges e1, e2, e3, ... By changing the potential under 07b, 108a, 108b207a, 208a.
Are transferred one stage each.

At this time, the signal charge e1 is transferred to the floating diffusion layer portion 112 via the third conductive electrode 109, and the potential fluctuation due to the sent signal charge e1 is M
Impedance conversion is performed by an output circuit unit having a source follower amplifier composed of OS transistors,
The voltage output V is taken out. Then, in order to detect the next signal charge, the fourth conductive electrode 110 is turned on, and the potential of the floating diffusion layer portion 112 is set to be the same as the reset voltage VR. By repeating this operation, the first and second
Conductive electrodes 107a, 107b, 108a, 108
The signal charges e1, e2, e3, ... Which are sequentially transferred through b, 207a, 208a can be taken out as output signals.

As described above, in the first embodiment,
The regions of the final first and second conductive electrodes 207a and 208a formed at the ends of the charge transfer portion are the first potential potential region 102 and the third and fourth potential potential regions 203a and 203b having different potentials. By forming the charges, the transferred charges can be accumulated in the fourth potential potential region 203b provided at a position close to the output side, so that the final charge transfer electrode, especially the final charge transfer electrode, can be accumulated in order to equalize the accumulation area of the signal charges. Even when the electrode length of the second conductive electrode 208a is increased, it is possible to shorten the traveling distance of the charge existing at the farthest position under the electrode and improve the transfer efficiency of the signal charge.

In the case where the signal charge is a large signal charge e2, as shown in FIG. 2, the fourth potential potential region 203b below the second conductive electrode 208a formed at the end of the charge transfer portion is formed. In addition to the storage region formed in the third potential potential region, the storage region formed in the third potential potential region 203a can also contribute to the storage of signal charges.
Therefore, the amount of accumulated charge is not reduced.

Here, in order to further shorten the traveling distance of charges under the second conductive electrode 208a, the fourth potential potential region 203b is arranged in a region as close as possible to a region with a narrow channel width. Is preferred. Therefore, the planar shape of the fourth potential potential region 203b may be a "U" shape as in the second embodiment as the reference example of the present invention shown in FIG. It is a "trapezoid" shaped like a third embodiment
preferable. Furthermore, it is also preferable to have a “triangular” shape as in the fourth embodiment shown in FIG. 5 and an “ellipse” shape as in the fifth embodiment shown in FIG . Thus, the fourth
By appropriately designing or selecting the shape of the potential potential region 203b, it is possible to construct a charge transfer device having the highest transfer efficiency for signal charges having different charge amounts.

Further, in the first embodiment , the first to fourth potential potential regions are formed by the impurity concentration difference. However, as in the sixth embodiment shown in FIG. 7, each charge transfer electrode is formed. It is also possible to form the first to fourth potential potential regions under the respective charge transfer electrodes by making the thicknesses of the lower insulating films 106 different from each other. Further, as in the seventh embodiment shown in FIG. 8, the thickness of the insulating film 106 is made different and the impurity concentration of each region is made different.
A combination of both is also possible.

[0019] In the first embodiment has described a charge transfer device having a two-layer electrode two-phase driving, as in the eighth embodiment shown in FIG. 9, a single-layer electrode the two-phase driving charge transfer The same applies to a device or a charge transfer device having three or more layers of electrodes. In this embodiment, the final charge transfer electrode 208 according to the invention is
a is configured as a single electrode, and the charge transfer electrode 20
The first, third, and fourth potential potential regions 102, 203a, and 203b are formed immediately below 8a.

Furthermore, in the present invention, when the final charge transfer electrode 208a adjacent to the third conductive electrode 109 of the first embodiment is off (low voltage VL is applied), the third conductive property is obtained. If the potential is shallower than the potential potential formed under the electrode 109 and deeper than the potential potential formed under the adjacent charge transfer electrode 207a, FIG.
As in the ninth embodiment shown in FIG. 0, the N-type semiconductor region 203a serving as the third potential potential region may have the same potential potential structure as the N-type semiconductor region 103 serving as the second potential potential region. Further, for the same reason, as in the tenth embodiment shown in FIG. 11, the N-type semiconductor region 203b to be the fourth potential potential region is formed.
However, the potential potential structure may be the same as that of the N-type semiconductor region 103 which is the second potential potential region. As described above, by making the impurity concentration of each semiconductor region forming the third potential potential region or the fourth potential region equal to the impurity concentration of the semiconductor region serving as the second potential potential region, the charge transfer is performed. Since it is possible to reduce the number of N-type semiconductor regions having different impurity concentrations required to form the device, it is effective in reducing the number of manufacturing steps.

Further, since the potential potential under the third conductive electrode 109 can be set by the constant voltage VOG, it does not have to be the N − type semiconductor region 102, as long as the potential potential relationship is maintained. In the above, the thickness of the insulating film 106 under the third conductive electrode 109 may be different from that of the other electrodes to set the potential to a predetermined potential.

In each of the above-described embodiments, an example in which the present invention is applied to a buried type charge transfer device has been described, but it goes without saying that the same can be applied to a surface type charge transfer device.

[0023]

As described above, according to the present invention, in the charge transfer device having the first and second potential potential regions, the first charge transfer electrode is provided immediately below the final charge transfer electrode along the charge transfer direction. Potential potential region of the
Has a third potential potential deeper than the third potential potential region and a fourth potential potential region deeper than the third potential potential region, and the fourth potential potential region is a region with a narrow channel width.
, Or an ellipse that widens toward the output side,
Since the trapezoidal or triangular planar shape is used, when the signal charge, which causes a problem in transfer efficiency, is small, the signal charge is accumulated in the fourth potential potential region having a deep potential provided on the output side. By doing so, it is possible to shorten the travel distance of the electric charge existing at the farthest place under the electrode,
It is possible to solve the problem that the transfer efficiency is limited by the electrode length or the traveling distance of the charges, and improve the transfer efficiency. Further, when the signal charges are large, the signal charges can be accumulated not only in the fourth potential potential region but also in the third potential potential region, so that the accumulated charge amount is not reduced. Further, by making the fourth potential potential region have the above-mentioned planar shape, it is possible to shorten the traveling distance of the charges, thereby constructing the charge transfer device having the highest transfer efficiency for the signal charges having different charge amounts. The effect that can be obtained can be obtained.

[Brief description of drawings]

FIG. 1 is a plan view (a) of a first embodiment as a reference example of the present invention, a cross-sectional view (b) taken along the line II ′ of FIG. 1, and potential diagrams (c) to () showing the operation thereof. e).
The same applies to FIGS. 2 to 11 below.

2A and 2B are a plan view, a cross-sectional view, and a potential diagram when the amount of signal charges in the first embodiment as a reference example of the invention is large.

FIG. 3 is a plan view, a sectional view, and a potential diagram of a second embodiment as a reference example of the present invention.

FIG. 4 is a plan view, a cross-sectional view, and a potential diagram of a third embodiment of the present invention.

FIG. 5 is a plan view, a sectional view, and a potential diagram of a fourth embodiment of the present invention.

FIG. 6 is a plan view, a sectional view, and a potential diagram of a fifth embodiment of the present invention.

FIG. 7 is a plan view, a sectional view, and a potential diagram of a sixth embodiment of the present invention.

FIG. 8 is a plan view, a sectional view, and a potential diagram of a seventh embodiment of the present invention.

FIG. 9 is a plan view, a sectional view, and a potential diagram of an eighth embodiment of the present invention.

FIG. 10 is a plan view, a cross-sectional view, and a ninth embodiment of the present invention.
It is a potential diagram.

FIG. 11 is a plan view, a sectional view, and a potential diagram of a tenth embodiment of the present invention.

FIG. 12 is a plan view of an example of a conventional charge transfer device (a).
FIG. 4B is a cross-sectional view taken along the line II ′, and FIG. 9C is a potential diagram showing the operation thereof.

FIG. 13 is a diagram showing a voltage of a timing drive signal applied to an electrode of a charge transfer device.

[Explanation of symbols]

101 P-type semiconductor substrate 102 N− type semiconductor region (first potential potential region) 103 N type semiconductor region (second potential potential region) 104 N + type semiconductor region 105 P + type semiconductor substrate 106 Insulating films 107a, 107b First conductive electrode 108a, 108b Second conductive electrode 109 Third conductive electrode 110 Fourth conductive electrode 111 Metal wiring 112 Floating diffusion layer section 203a N-type semiconductor region (third potential potential region) 203b N-type semiconductor region (fourth potential potential region) 207a Final first conductive electrode 208a Final second conductive electrode

─────────────────────────────────────────────────── ─── Continuation of front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 21/339 H01L 27/14 H01L 29/762 H04N 5/335

Claims (6)

(57) [Claims] 1. A charge transfer electrode having a plurality of first potential potential regions and a second potential potential region deeper than the first potential potential, and directly below a final charge transfer electrode adjacent to the output electrode. In the charge transfer device in which the channel width of the potential potential region is narrowed toward the output side, immediately below the final charge transfer electrode, the first potential potential region and the first potential potential region are provided along the charge transfer direction. Third deeper than the potential region of 1
Potential potential region and a fourth potential potential region having a potential potential deeper than the third potential potential region, the fourth potential potential region being on the output side in the region where the channel width is narrowed.
It is configured in any one of an elliptical shape, a trapezoidal shape, and a triangular shape that spreads toward the end.
Charge transfer device according to. 2. The charge transfer device according to claim 1, wherein the fourth potential potential region and the second potential potential region have the same potential potential. 3. The charge transfer device according to claim 1, wherein the third potential potential region and the second potential potential region have the same potential potential. 4. The charge transfer device according to claim 1, wherein the final charge transfer electrode is composed of one charge transfer electrode or a plurality of charge transfer electrodes to which drive signals at the same timing are input. 5. The charge transfer device according to claim 1, wherein each of the first to fourth potential potential regions is formed by a difference in impurity concentration. 6. The first to fourth potential potential regions are formed by making the thicknesses of insulating films under the respective charge transfer electrodes different from each other. Charge transfer device according to.