JPH0521905A - Manufacture of semiconductor quantum fine line - Google Patents

Abstract

PURPOSE:To solve the problem of the fluctuation of line width having a large effect on the characteristics of a quantum fine line, and to manufacture the quantum fine line having uniform line width regarding the manufacture of the semiconductor quantum fine line utilized for various semiconductor devices. CONSTITUTION:A fine line 16 is formed through electron beam exposure conducting the scanning of beams to one line while overlapping at least twice or more. The fine line pattern 16 is transferred to an SiO2 mask 15, and an etchant, in which the mixing ratio of sulfuric acid (100% in concentration) to hydrogen peroxide (30% in concentration) extends from 1/3 to 1/5 and which is composed of sulfuric acid, hydrogen peroxide and water, is used, thus producing a GaAs group semiconductor quantum fine line 17 having uniform line width by the polishing effect of side etching.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor quantum wire used in a semiconductor device.

[0002]

2. Description of the Related Art In recent years, there has been a demand for improving the characteristics and functions of semiconductor devices such as reduction of threshold current of semiconductor lasers, improvement of temperature characteristics, reduction of spectrum line width, and speeding up of FET devices. Quantum wires are drawing attention.

At present, various proposals have been made for a method for producing a semiconductor quantum wire, and no method has been established yet. An example of a conventional method for producing a semiconductor quantum wire will be described below.

FIG. 2 is a process diagram showing a conventional method for producing a semiconductor quantum thin wire, and FIG. 2 is a sectional view perpendicular to the direction of the thin wire. As shown in FIG. 2A, a barrier layer 22 (AlGaAs layer) and a quantum well layer 23 (G
Then, a laminated structure including an aAs layer) is formed. Next, after forming a resist mask having a fine line pattern by electron beam exposure, a fine line is formed by utilizing side etching of wet chemical etching as shown in FIG. Next, as shown in FIG. 2C, after removing the resist, the quantum wires 25 are formed by embedded growth.

[0005]

However, in the above-mentioned conventional method, the controllability of the side etching is poor because the adhesion between the resist and the substrate is insufficient, and there is a fluctuation in the electron beam exposure amount. There is a problem that there is a fluctuation in the width of the thin wire and the effect of the quantum wire cannot be sufficiently obtained.

The present invention solves the above-mentioned problems of the prior art, and an object of the present invention is to provide a method of manufacturing a semiconductor quantum wire having a uniform line width.

[0007]

In order to achieve this object, a method of manufacturing a semiconductor quantum thin line of the present invention uses a uniform electron beam exposure in which one line is scanned with an electron beam at least twice. Forming a fine line mask pattern having a wide line width.

[0008] A further solution of the present invention is to provide a GaA including a quantum well layer with a fine line pattern formed by the above electron beam exposure.
Transfer to the SiO ₂ mask deposited on the s-based semiconductor crystal,
After improving the adhesion between the mask and the substrate and improving the controllability of the side etching, a process of performing wet chemical etching using the polishing effect of the side etching using an etchant composed of sulfuric acid, hydrogen peroxide and water was used. This is a method of manufacturing a semiconductor quantum wire.

[0009]

By using the above-mentioned electron beam exposure to form a fine line mask pattern having a uniform narrow line and using a SiO2 mask, the adhesion between the mask and the substrate is improved and the side etching controllability is improved. By using the etchant, quantum wires having a uniform line width are formed by the polishing effect of side etching.

[0010]

Embodiments of the present invention will be described below in detail with reference to the drawings while considering fluctuations in the width of a quantum thin line.

FIG. 1 is a process chart of a method of manufacturing a semiconductor quantum wire in an embodiment of the present invention. In FIG. 1, 11 is a GaAs substrate, 12 is a first barrier layer made of AlGaAs, 13 is a quantum well layer made of GaAs, and 14 is AlG.
a second barrier layer made of aAs, 15 a SiO ₂ mask, 1
6 is a resist mask pattern.

First, as a cause of the fluctuation of the line width of the quantum thin line, it is conceivable that the amount of exposure changes due to the fluctuation of the electron beam current amount and the line width of the mask pattern of the thin line fluctuates.

Therefore, as shown in FIG.
The first barrier layer 12 and the quantum well are formed on the (100) plane of the substrate 11.
After forming a laminated structure including the layer 13 and the second barrier layer, S
iO ₂ Deposit the film, then SiO₂ On one line on the membrane
By electron beam exposure that performs beam scanning for multiple times,
Fine line pattern 1 parallel to the [011] direction of the GaAs substrate
6 is formed. The above exposure reduces the fluctuation of the pattern.
And fluctuations of line width less than tens of angstroms have been reduced.
A fine line pattern is obtained.

Although the line width fluctuation of the thin line pattern can be greatly reduced by forming the thin line pattern by the electron beam exposure described above, the line width fluctuation of about several tens of angstroms may still exist. This line width fluctuation of several tens of angstroms can be reduced by wet chemical etching.

That is, when etching is performed using an etchant having a different etching rate depending on the plane orientation, a crystal plane having a low etching rate tends to appear, and a crystal plane having a low etching rate has a polishing effect.
Therefore, in the step of etching the thin wire, the polishing effect can be utilized by making the side surface of the thin wire a crystal plane with a small etching rate, and the fluctuation of the line width of the thin wire of several tens of angstroms can be reduced. Conventionally,
The etchant used for polishing with a high etching concentration has a high etching rate, and thus requires precise etching control. Concentration 3
Mixing ratio of sulfuric acid (concentration 100%) to 1%
To ⅕ and further diluted with water, a GaAs-based etchant having a good controllable etching rate and a large plane orientation selectivity can be obtained.

That is, (10) of a GaAs-based semiconductor substrate
The polishing effect can be utilized by forming a thin line mask pattern in the [011] direction on the (0) plane and etching using the above etchant. The side surface of the mesa formed by wet chemical etching becomes flatter as it gets deeper. In other words, the polishing effect of side etching is more effective when the etching depth is deeper. Therefore, by increasing the thickness of the barrier layer above the quantum well layer to deepen the position of the quantum well layer, the polishing effect is further exerted and a uniform line width is obtained. Quantum wires with can be formed.

Specifically, as shown in FIG. 1B, the fine line pattern formed by the above method is transferred to the SiO ₂ film using a hydrofluoric acid type etchant. Thereafter, as shown in FIG. 1 (c), using a SiO ₂ mask 15, etching is performed in an inverted mesa shape to a depth at which the quantum well layer exists, using an etchant composed of sulfuric acid, hydrogen peroxide, and water. By selecting the mixing ratio of sulfuric acid (concentration 100%) to hydrogen peroxide (concentration 30%) to be a value between 1/3 and 1/5, an etchant with good controllability and high plane orientation selectivity can be obtained. The polishing effect of etching works and the fluctuation of the line width of the quantum wire can be reduced to several angstroms or less. In order to maximize the polishing effect, a barrier layer is provided above the quantum well layer to deepen the position of the quantum well layer. Finally, Fig. 1 (d)
After the mask is removed as shown in FIG. 3, the quantum wire 17 is obtained by the buried growth.

[0018]

As described above, according to the present invention, a fine line pattern is formed by electron beam exposure in which beam scanning for one line is repeated at least twice, so that fluctuations in the electron beam amount are averaged and a uniform line width is obtained. A thin line mask pattern is obtained. In addition, this fine line pattern is changed to SiO ₂
By providing the step of transferring to a mask and the step of etching using an etchant composed of sulfuric acid, hydrogen peroxide and water, a quantum wire having a more uniform line width can be realized.

[Brief description of drawings]

FIG. 1A is a sectional view showing a method for producing a semiconductor quantum wire in an embodiment of the present invention. FIG. 1B is a sectional view showing a method for producing a semiconductor quantum wire in an embodiment of the present invention. Sectional drawing which shows the manufacturing method of the semiconductor quantum wire in (d) Sectional drawing which shows the manufacturing method of the semiconductor quantum wire in the Example of this invention.

2A is a cross-sectional view showing a method for manufacturing a conventional semiconductor quantum wire, FIG. 2B is a cross-sectional view showing a method for manufacturing a conventional semiconductor quantum wire, and FIG. 2C is a cross-sectional view showing a method for manufacturing a conventional semiconductor quantum wire.

[Explanation of symbols]

11 GaAs Substrate 12 First Barrier Layer 13 Quantum Well Layer 14 Second Barrier Layer 15 SiO ₂ Mask 16 Resist Mask Pattern 17 Quantum Wire 18 Embedded Layer

Claims (2)

[Claims] 1. A method for producing a quantum thin line, wherein a mask pattern of a fine line having a uniform line width is formed by an exposure process using an electron beam in which beam scanning for one line is repeated at least twice. 2. A step of forming a SiO ₂ mask pattern by transferring the thin line mask pattern formed by the electron beam exposure according to claim 1 to a SiO ₂ film deposited on a semiconductor crystal surface, and the SiO ₂ mask pattern. Hydrogen Peroxide (concentration 30%)
Mixing ratio of sulfuric acid (concentration 100%) to 1/3 to 1
Of a semiconductor quantum wire having a step of forming a quantum wire with less fluctuation in line width by performing wet chemical etching utilizing the polishing effect of side etching using an etchant composed of / 5 sulfuric acid, hydrogen peroxide and water. Manufacturing method.