JPH05217904A - Separating method for element of semiconductor laser diode - Google Patents

Separating method for element of semiconductor laser diode

Info

Publication number
JPH05217904A
JPH05217904A JP1670992A JP1670992A JPH05217904A JP H05217904 A JPH05217904 A JP H05217904A JP 1670992 A JP1670992 A JP 1670992A JP 1670992 A JP1670992 A JP 1670992A JP H05217904 A JPH05217904 A JP H05217904A
Authority
JP
Japan
Prior art keywords
laser diode
semiconductor laser
etching
separating
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1670992A
Other languages
Japanese (ja)
Inventor
Hironobu Makita
宏信 牧田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Original Assignee
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Semiconductor Manufacturing Co Ltd, Kansai Nippon Electric Co Ltd filed Critical Renesas Semiconductor Manufacturing Co Ltd
Priority to JP1670992A priority Critical patent/JPH05217904A/en
Publication of JPH05217904A publication Critical patent/JPH05217904A/en
Pending legal-status Critical Current

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  • Semiconductor Lasers (AREA)
  • Led Devices (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To provide a method for separating many semiconductor laser diodes to be manufactured in a wafer state without forming a step instead of an etching method since various problems occur in the next step due to an overhang step to be formed on the side of an element when a separation groove for separating the diodes into independent elements is formed by etching. CONSTITUTION:A part to be formed with a separating groove of an element 1 of a semiconductor substrate 2 is covered with an insulating film 9 not to be epitaxially grown of an oxide film to be formed, for example, by an ordinary pressure CVD method, and then a laser diode element 1 is formed of an epitaxially grown layer on the other part, for example, by a metal organic VPE method. Thus, an element separating groove 5 is resultantly formed on the film 9.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、ウェーハ状態で製作
される半導体レーザーダイオードを、各素子に分離する
ための分離溝の形成方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a separation groove for separating a semiconductor laser diode manufactured in a wafer state into each element.

【0002】[0002]

【従来の技術】半導体レーザーダイオードは、半導体基
板にエピタキシャル成長させたPN接合からなる素子層
に電流を流して、コヒーレント光を放出させるものであ
る。この素子1を、図2に示すように半導体基板2上に
碁盤目状の整列状態で形成した後、素子別に良不良を判
別する検査は、図3に示すように、一列の素子1が連結
したバー状態で切り出し、各素子1の電極3に、個別に
検針4を当て、側面からの発光を調べている。このと
き、隣接する素子1に電流が流れると、個別検査ができ
なくなるので、各素子1を分離する溝5を、エッチング
により形成していた。
2. Description of the Related Art A semiconductor laser diode emits coherent light by passing a current through an element layer formed of a PN junction epitaxially grown on a semiconductor substrate. After the elements 1 are formed on the semiconductor substrate 2 in a grid-like alignment state as shown in FIG. 2, the inspection for determining good or bad for each element is performed by connecting the rows of the elements 1 as shown in FIG. The bar is cut out and the probe 3 is individually applied to the electrode 3 of each element 1 to check the light emission from the side surface. At this time, if a current flows through the adjacent elements 1, individual inspection cannot be performed. Therefore, the groove 5 for separating each element 1 is formed by etching.

【0003】この分離溝5の従来の形成は、図4で説明
するエッチング法で行っていた。
The conventional formation of the separation groove 5 is performed by the etching method described in FIG.

【0004】まず、図4(a)に示すように、ウェーハ状
の半導体基板2の上にエピタキシャル成長法により素子
層6を形成し、次に、この素子層6の要所にフォトレジ
スト層(以下PR層という)7を形成する。次に、図4
(b)に示すように、PR層7のない部分をエッチングし
て分離溝5を形成する。この後、PR層7を除去した
後、保護膜としての酸化膜の全面被着、この酸化膜の電
極形成部分への窓開け、電極形成用金属膜の全面被着、
この金属膜の電極となる部分を覆うPR層の形成、ドラ
イエッチングによる金属膜の不要部分の除去等を経て、
ウェーハ状態での工程を終了する。
First, as shown in FIG. 4 (a), an element layer 6 is formed on a wafer-shaped semiconductor substrate 2 by an epitaxial growth method, and then a photoresist layer (hereinafter A PR layer) 7 is formed. Next, FIG.
As shown in (b), the isolation groove 5 is formed by etching the portion without the PR layer 7. After that, after removing the PR layer 7, the entire surface of an oxide film as a protective film is deposited, a window is opened to the electrode formation portion of this oxide film, the entire surface of a metal film for electrode formation is deposited,
After forming the PR layer covering the portion of the metal film to be the electrode and removing the unnecessary portion of the metal film by dry etching,
The process in the wafer state is completed.

【0005】[0005]

【発明が解決しようとする課題】上記選択エッチングに
より各素子1を確実に分離するには、かなり長めの時間
を掛けてエッチングを行なう必要があり、そのために必
要以上のエッチングがされることになる。また、エッチ
ング液はその組成が異なる様々な種類のものが使用さ
れ、そのエッチングレートが相違するので分離溝5の形
状が不安定になり、レートが高いエッチング液では、エ
ッチングが過剰に行われてしまうことがある。
In order to surely separate the elements 1 by the selective etching described above, it is necessary to perform the etching for a considerably long time, and therefore, the etching is performed more than necessary. .. In addition, various types of etching solutions having different compositions are used, and the etching rates are different, so that the shape of the separation groove 5 becomes unstable, and an etching solution having a high rate causes excessive etching. It may end up.

【0006】このように、必要以上のエッチングがされ
ると、残された素子部分の側面には図5に示すように、
ひさし状の段差8が形成され易い。この段差8がある
と、この後に、図3に示す電極3を形成するために行わ
れるフォトリソグラフィ工程で、段差の影になった部分
が露光されず、フォトレジストや金属膜がこの部分に、
ひげ状に残されることがある。これらのフォトレジスト
や金属膜は、素子を個別にパッケージした後に剥がれ
て、特性不良の原因となるゴミを発生させる問題を引き
起こす。
As described above, when etching is performed more than necessary, the side surface of the remaining element portion is, as shown in FIG.
The eave-shaped step 8 is easily formed. If there is this step 8, the portion shadowed by the step will not be exposed in the photolithography process performed to form the electrode 3 shown in FIG.
May be left whiskers. These photoresists and metal films are peeled off after the devices are individually packaged, which causes a problem of generating dust that causes characteristic defects.

【0007】また、ひさし状の段差8が形成されると、
図5に示したようにウェーハ状の半導体基板2から一列
の素子1をバー状に切出すとき、レーザー光が出る切出
し端面にクラックが入り、特性劣化の原因となることが
ある。
When the eave-shaped step 8 is formed,
As shown in FIG. 5, when a row of elements 1 is cut out from a wafer-shaped semiconductor substrate 2, cracks may occur at the cut-out end face from which laser light is emitted, which may cause characteristic deterioration.

【0008】そこで本発明は、素子の分離溝を、段差の
原因となるエッチングを行なわないで、形成する方法を
提供することにより上記問題の解決を図る。
Therefore, the present invention solves the above problem by providing a method for forming an isolation groove of an element without performing etching that causes a step.

【0009】[0009]

【課題を解決するための手段】本発明の半導体レーザー
ダイオードの素子分離方法は、ウェーハ状の半導体基板
の素子の分離溝形成予定部分にエピタキシャル成長がさ
れない絶縁膜を予め被着形成し、その後、他の部分にエ
ピタキシャル成長によってレーザーダイオード素子を形
成する。
According to the method of isolating a semiconductor laser diode of the present invention, an insulating film which is not epitaxially grown is previously formed on a portion of a wafer-shaped semiconductor substrate where an isolation groove is to be formed, and then another A laser diode element is formed by epitaxial growth on the portion.

【0010】このように選択的なエピタキシャル成長を
させるため、上記絶縁膜は、例えば常圧CVD法により
形成する酸化膜を使用し、エピタキシャル成長層は、例
えば有機金属CVD法を採用する。
In order to carry out selective epitaxial growth as described above, an oxide film formed by, for example, an atmospheric pressure CVD method is used as the insulating film, and an organic metal CVD method is used as the epitaxial growth layer.

【0011】[0011]

【作用】上述したように、素子の分離溝形成予定部分
に、絶縁膜を形成しておくと、この部分にはエピタキシ
ャル成長がなく、各素子がエピタキシャル成長により形
成されると、結果的に素子の分離溝が形成されることに
なる。
As described above, when the insulating film is formed in the portion where the isolation groove is to be formed in the element, there is no epitaxial growth in this portion, and when each element is formed by the epitaxial growth, the element isolation results. A groove will be formed.

【0012】[0012]

【実施例】本発明による半導体レーザーダイオードの製
造工程を図1に示し、説明する。まず、図1(a) に示す
ように、ウェーハ状の半導体基板2の分離溝形成予定部
分に、絶縁膜9を形成する。これは、例えば、絶縁膜9
である酸化膜(Si2)を所定の厚さだけ、常圧CVD
(ケミカル・ベーパ・デポジション)法により全面形成
し、これにPR層を全面に被着形成し、そのPR層の分
離溝の形成予定部分に窓開けし、エッチング液を用いて
酸化膜を選択的にエッチング除去し、この後PR膜を溶
剤で除去して行なう。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A manufacturing process of a semiconductor laser diode according to the present invention will be described with reference to FIG. First, as shown in FIG. 1A, an insulating film 9 is formed on a portion of a wafer-shaped semiconductor substrate 2 where a separation groove is to be formed. This is, for example, the insulating film 9
In a oxide film (S i O 2) of a predetermined thickness, normal pressure CVD
The entire surface is formed by the (chemical vapor deposition) method, the PR layer is deposited on the entire surface, a window is opened in the portion of the PR layer where the separation groove is to be formed, and an oxide film is selected using an etching solution. By etching, and then the PR film is removed with a solvent.

【0013】次に、図1(a)に示すように、分離溝形成
予定部分に絶縁膜9が形成された半導体基板2に対し、
エピタキシャル成長法によってPN接合からなる素子1
を形成する。このエピタキシャル成長工程は、絶縁層9
の上にエピタキシャル層が成長しないように、例えば所
定の圧力・温度・成長速度を保持した有機金属気相成長
法(MO−VPE)によって行なう。ここで、気相成長
ガスに、添加される有機金属は、例えば、TMG(トリ
メチルガリウム)またはTEG(トリエチルガリウム)
等が使用される。
Next, as shown in FIG. 1A, with respect to the semiconductor substrate 2 in which the insulating film 9 is formed in the separation groove forming portion,
Element 1 consisting of PN junction by epitaxial growth method
To form. In this epitaxial growth process, the insulating layer 9
In order to prevent the epitaxial layer from growing on top of it, for example, metalorganic vapor phase epitaxy (MO-VPE) is performed with a predetermined pressure, temperature and growth rate. Here, the organic metal added to the vapor growth gas is, for example, TMG (trimethylgallium) or TEG (triethylgallium).
Etc. are used.

【0014】このようにして形成される素子1は、図1
(b)に示すように、絶縁膜9の上にエピタキシャル成長
がされないため結果的に形成された、分離溝5で区画さ
れている。
The element 1 thus formed is shown in FIG.
As shown in (b), the insulating film 9 is partitioned by the isolation trench 5 formed as a result of no epitaxial growth.

【0015】この後、保護膜としての酸化膜を全面に形
成し、さらにフォトリソグラフィ法により、この酸化膜
の電極形成部分への窓開け、電極形成用金属膜の全面被
着、ドライエッチングによる金属膜の不要部分の除去等
の工程によって、図3に示すように電極3を素子1上に
形成して、半導体レーザーダイオード製造のウェーハ状
態での最終工程が終了する。
After that, an oxide film as a protective film is formed on the entire surface, and a window is opened to the electrode forming portion of the oxide film by the photolithography method, the entire surface of the electrode forming metal film is deposited, and the metal is formed by dry etching. The electrode 3 is formed on the element 1 as shown in FIG. 3 by a process such as removal of an unnecessary portion of the film, and the final process in the wafer state for manufacturing the semiconductor laser diode is completed.

【0016】このとき、各素子1の側面は、エピタキシ
ャル成長の自然な傾斜を持ち、段差によるひさし等は形
成されていないので、露光工程やドライエッチング工程
で陰になる部分はなく、電極層形成時のPR工程で、フ
ォトレジストや金属膜が残されることはない。したがっ
て、残されたフォトレジストや金属膜が、半導体レーザ
ーダイオードのパッケージ後に剥がれて、ゴミとなり特
性劣化の原因となることはなくなる。
At this time, since the side surface of each element 1 has a natural inclination of epitaxial growth and no eaves or the like due to a step is formed, there is no shaded portion in the exposure step or the dry etching step, and when the electrode layer is formed. In the PR process, the photoresist and the metal film are not left. Therefore, the remaining photoresist or metal film is not peeled off after packaging of the semiconductor laser diode and becomes dust, which does not cause deterioration of characteristics.

【0017】このように半導体レーザーダイオードの素
子1が形成された半導体基板2を、図5に示すように、
一列の素子1が連なるようにバー状に切出し、検針4を
各素子1に当てる検査を行う。この切出しの際にも、各
素子1の側面には段差が形成されていないので、段差部
からクラックが入る現象はなくなり、歩止まり向上が図
れ、このクラックによる特性劣化はなくなる。
As shown in FIG. 5, the semiconductor substrate 2 on which the element 1 of the semiconductor laser diode is formed is
The elements 1 in a row are cut out in a bar shape so as to be continuous, and the inspection 4 is applied to each element 1 for inspection. Even at the time of this cutting, since no step is formed on the side surface of each element 1, there is no phenomenon of cracking from the step, the yield is improved, and the characteristic deterioration due to the crack is eliminated.

【0018】[0018]

【発明の効果】この発明によれば、エピタキシャル成長
がされない絶縁膜を除く部分に、半導体レーザーダイオ
ードの素子をエピタキシャル成長法で形成することによ
り、素子の個別検査に必要な分離溝を、段差のない自然
な形状で作ることができる。したがって、この後に行わ
れる、電極形成工程におけるフォトレジスト及び金属膜
の残留現象をなくして、製品の信頼性を向上するととも
に、素子分離前の検査のためのバー状態への切出し時に
おける段差によるクラックの発生をなくして、歩止向上
を図ることができる。
According to the present invention, an element of a semiconductor laser diode is formed by an epitaxial growth method in a portion excluding an insulating film which is not epitaxially grown, so that an isolation groove necessary for individual inspection of the element can be formed without a step. It can be made in various shapes. Therefore, the residual phenomenon of the photoresist and the metal film in the electrode formation process performed after this is eliminated to improve the reliability of the product, and the crack due to the step at the time of cutting into the bar state for the inspection before the element isolation. It is possible to improve the retention by eliminating the occurrence of.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明による半導体レーザーダイオードの製
造工程を断面で示す斜視図
FIG. 1 is a cross-sectional perspective view showing a manufacturing process of a semiconductor laser diode according to the present invention.

【図2】ウェーハ状態の半導体レーザーダイオードを示
す平面図
FIG. 2 is a plan view showing a semiconductor laser diode in a wafer state.

【図3】検査のためウェーハから連結状態でバー状に切
出された半導体レーザーダイオードを示す斜視図
FIG. 3 is a perspective view showing a semiconductor laser diode cut out in a bar shape in a connected state from a wafer for inspection.

【図4】従来方法による半導体レーザーダイオードの素
子分離溝の形成方法を示す断面図
FIG. 4 is a sectional view showing a method for forming an element isolation groove of a semiconductor laser diode by a conventional method.

【図5】図4に示す方法によって分離溝を形成した場合
にひさし状の段差が形成される様子を断面にして示す半
導体ウェーハの部分斜視図
5 is a partial perspective view of a semiconductor wafer showing a cross section of how an eave-shaped step is formed when a separation groove is formed by the method shown in FIG.

【符号の説明】[Explanation of symbols]

1 半導体レーザーダイオードの素子 2 半導体基板 3 電極 4 検針 5 素子の分離溝 9 絶縁膜 1 Semiconductor laser diode element 2 Semiconductor substrate 3 Electrode 4 Meter reading 5 Element separation groove 9 Insulating film

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 ウェーハ状半導体基板の素子分離溝形成
予定部分にエピタキシャル成長がされない絶縁膜を予め
被着形成し、前記絶縁膜を形成した以外の部分にエピタ
キシャル成長させて、レーザーダイオード素子を形成す
ることを特徴とする半導体レーザーダイオードの素子分
離方法。
1. A laser diode element is formed by previously depositing an insulating film which is not epitaxially grown on a portion of a wafer-shaped semiconductor substrate where an element isolation groove is to be formed, and epitaxially growing the portion other than the portion where the insulating film is formed. And a method for separating a semiconductor laser diode.
【請求項2】 絶縁膜を常圧CVD法により形成するこ
とを特徴とする請求項1記載の半導体レーザーダイオー
ドの素子分離方法。
2. The element isolation method for a semiconductor laser diode according to claim 1, wherein the insulating film is formed by an atmospheric pressure CVD method.
【請求項3】 エピタキシャル成長層を有機金属VPE
法で生成することを特徴とする請求項1記載の半導体レ
ーザーダイオードの素子分離方法。
3. The epitaxial growth layer is formed of organometallic VPE.
The method for isolating a semiconductor laser diode according to claim 1, wherein the element is separated by a method.
JP1670992A 1992-01-31 1992-01-31 Separating method for element of semiconductor laser diode Pending JPH05217904A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1670992A JPH05217904A (en) 1992-01-31 1992-01-31 Separating method for element of semiconductor laser diode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1670992A JPH05217904A (en) 1992-01-31 1992-01-31 Separating method for element of semiconductor laser diode

Publications (1)

Publication Number Publication Date
JPH05217904A true JPH05217904A (en) 1993-08-27

Family

ID=11923802

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1670992A Pending JPH05217904A (en) 1992-01-31 1992-01-31 Separating method for element of semiconductor laser diode

Country Status (1)

Country Link
JP (1) JPH05217904A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1988007027A1 (en) * 1987-03-09 1988-09-22 Dai Nippon Insatsu Kabushiki Kaisha Method of producing decorative interlayer for laminated glass
WO2004086579A1 (en) * 2003-03-25 2004-10-07 Matsushita Electric Industrial Co., Ltd. Nitride semiconductor device and its manufacturing method
WO2004086580A1 (en) * 2003-03-26 2004-10-07 Nec Corporation Semiconductor laser and method for manufacturing same

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1988007027A1 (en) * 1987-03-09 1988-09-22 Dai Nippon Insatsu Kabushiki Kaisha Method of producing decorative interlayer for laminated glass
WO2004086579A1 (en) * 2003-03-25 2004-10-07 Matsushita Electric Industrial Co., Ltd. Nitride semiconductor device and its manufacturing method
CN100349341C (en) * 2003-03-25 2007-11-14 松下电器产业株式会社 Nitride semiconductor device and its manufacturing method
US7338827B2 (en) 2003-03-25 2008-03-04 Matsushita Electric Industrial Co., Ltd. Nitride semiconductor laser and method for fabricating the same
US8198637B2 (en) 2003-03-25 2012-06-12 Panasonic Corporation Nitride semiconductor laser and method for fabricating the same
WO2004086580A1 (en) * 2003-03-26 2004-10-07 Nec Corporation Semiconductor laser and method for manufacturing same

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