JPH0521434A - Pattern formation method of semiconductor device - Google Patents

Abstract

PURPOSE:To increase the reliability of an interconnection by a method wherein a film is formed of a specific metal element on a CVD-Al film in such a way that the element is set at a specific composition ratio to the CVD-Al film in terms of its weight ratio. CONSTITUTION:A LOCOS oxide film 2 and an interlayer insulating film 3 are formed on an Si semiconductor substrate 1; a CVD-Al film 4 is formed on them; an Si film 5 is formed on it by a sputtering method in such a way that it is set at 0.8% to the CVD-Al film in terms of its weight ratio. Then, the Si film 5 is coated with a resist film 6; an exposure operation is execute by exposure light 8 through a mask 7; the CVD-Al film 4 and the Si film 5 are etched by using the patterned resist film 6 as a mask; the resist film 6 is removed; an Al interconnection is formed. Then, when a heat treatment is executed at 500 deg.C, an Al-0.8% Si interconnection 9 is formed. Thereby, it is possible to prevent a bonded part from being spiked, and the interconnection whose reliability against an electromigration is high, can be formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a pattern forming method thereof, and more particularly to a wiring technique for a semiconductor integrated circuit.

[0002]

2. Description of the Related Art The wiring of a semiconductor device using a Si substrate is
A low resistance aluminum alloy wiring to which elements such as Cu, Ti, and Pd are added to reduce migration and Si is added to prevent junction spikes during heat treatment is generally used. At present, the aluminum alloy film used for wiring is mainly formed by the sputter deposition method. This is because it is relatively easy to make an aluminum alloy target to which elements such as Si, Cu, Ti, and Pd are added, and Si, Cu, for reducing migration and preventing spiking of bonding during heat treatment, This is because it is possible to easily form an aluminum alloy film to which an element such as Ti or Pd is added.

[0003]

However, in the sputter deposition method, as the miniaturization of the semiconductor device progresses, the coverage of the aluminum alloy film at the step portion is poor, which is a problem in terms of process and reliability. On the other hand, as a newly developed method in recent years, there is a chemical vapor deposition method of aluminum (hereinafter referred to as “CVC-Al method”).
Since this method uses the CVD method, the coverage of the aluminum film at the step portion is good, but since there is no suitable source gas, Si, Cu, Ti, Pd
However, there is a problem that it is impossible to add elements such as.

In view of the above problems, the present invention is a CVD-Al.
S for reducing migration in the Al film formed by the method or for preventing spiking of the junction during heat treatment.
Even if an element such as i, Cu, Ti, or Pd is added, and the reflectance of the aluminum film at the exposure wavelength when the photolithography method is applied is lowered, and even if there is a step on the underlying layer, the reflected light causes the wiring resist pattern to break Provided is a method for forming a pattern of a semiconductor device having a wiring having a high reliability against electromigration and stress migration, which has a low probability of occurrence.

[0005]

In order to solve the above problems, a method for forming a pattern of a semiconductor device according to the present invention is a method for manufacturing a semiconductor device provided with aluminum wiring to which an element for reducing migration is added. After forming an aluminum film on the entire surface of the device, an element for reducing migration on the aluminum film or for preventing a junction spike during heat treatment is contained in an amount of several% or less by weight ratio with respect to the aluminum film. In order to reduce the migration by a step of forming a film, a step of forming an aluminum wiring by simultaneously etching the film of the element for reducing the migration and the aluminum film into a predetermined shape by a photolithography method, and then performing a heat treatment. Or the above-mentioned elements for preventing spiking of the junction during heat treatment Diffused into aluminum film, those having a step of forming an aluminum alloy wiring.

[0006]

According to the present invention, the element for reducing migration on the formed aluminum film or for preventing the spike of the junction during the heat treatment is contained in the aluminum film in a weight ratio of several% or less. To form a film. Elements such as Si, electromigration, and Cu, Ti are known to be effective in reducing the junction spike during heat treatment, and are known to be effective in reducing the stress migration.
At a wavelength of 436 mm, the reflectance of these elements is lower than that of pure aluminum.

Therefore, even if there is a step difference in the underlying layer when the photolithography method is applied, the effect of breaking or thinning the resist pattern of the wiring due to the reflected light can be suppressed.

Further, after the wiring pattern is formed, a heat treatment is usually carried out at 400 to 500 ° C. for recovery of crystal defects. At this time, the element diffuses into a pure aluminum layer formed by CVD and electromigration is performed. ， Form an aluminum alloy film with high reliability against stress migration. Therefore, according to the present invention, good coverage at the step portion, high migration resistance,
It is possible to obtain a method for forming a pattern of a semiconductor device, which has a wiring having no junction spike during heat treatment and no disconnection due to light reflected from the underlying step.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A cross-sectional view of steps of an embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows the first of the present invention.
7A to 7C are cross-sectional views of steps in the example of FIG.

In the present invention, a LOCOS oxygen film 2 and an interlayer insulating film 3 are formed on a semiconductor substrate 1 made of Si as shown in FIG.
The -Al film 4 is formed, and the Si film 5 is deposited thereon by a sputtering method so as to have a weight ratio of 0.8% with respect to the CVD-Al film. Here, 0.8% is set so that the solubility of Si in aluminum is equal to or less than the solubility at the heat treatment temperature after wiring formation. This is because if Si is added in an amount larger than that, it may cause precipitation of Si during heat treatment, resulting in a decrease in reliability.

Next, as shown in FIG. 1B, a photoresist film 6 is applied on the Si film 5 and exposed through a photomask 7 with exposure light 8. At this time, since the Si film 5 has a lower reflectance than the aluminum film, even if there is a step difference in the underlying layer, the reflected light of the Si film 5 may cause the resist pattern of the wiring to become thin,
The effect of breaking the wire can be suppressed.

Next, as shown in FIG. 1C, the photoresist film 6 is developed, and the CVD-Al film 4 and the Si film 5 are etched by using the patterned photoresist film 6 as a mask to etch the photoresist film 6. Are removed to form aluminum wiring.

Next, as shown in FIG. 1D, a heat treatment at 500 ° C. is performed to recover the crystal loss. This is generally a necessary step and not specifically introduced for the present invention. At this time, since Si can be dissolved up to 0.8% by weight, the Si film 5 is entirely diffused into the CVD-Al film 4 and the Al-0.8% Si wiring 9 is formed. It is superior to the film formed by CVD. However, the aluminum that can be formed by CVD is pure aluminum with no added impurities.
Are diffused, aluminum may enter the junction of the semiconductor device and cause a spike. Thus CVD-
Since there is a Si diffusion source also on the Al film 4, in the present embodiment, it is possible to suppress the diffusion of Si from the semiconductor substrate 1 during the heat treatment and prevent the spikes at the junction of the semiconductor device. Further, since Si has an effect of suppressing electromigration at 120 ° C. or higher, according to this embodiment, a wiring having high reliability against electromigration can be obtained.

FIG. 2 is a sectional view showing the steps in the second embodiment of the present invention. In this embodiment, the first
In place of the Si film 5 in the embodiment of FIG.
4% by weight of the D-Al film 4 is deposited. The other steps are exactly the same as in the first embodiment. Since the Cu film 10 also has a lower reflectance than the aluminum film, it is possible to prevent the resist pattern of the wiring from being thinned or broken due to the reflected light even when there is a step difference in the base. In the present example, as shown in FIG.
Alloy wiring is formed. Since Cu has the effect of suppressing both electromigration and stress migration, according to the present embodiment, a highly reliable wiring against electromigration and stress migration can be obtained.

[0015]

As described above, according to the present invention, an element for reducing migration on the deposited aluminum film or for preventing a junction spike during heat treatment is added in a weight ratio to the aluminum film. The film is formed so as to be several percent or less. The reflectance of these elements is lower than that of pure aluminum. Therefore, even if there is a base step when the photolithography method is applied, it is possible to suppress the effect of breaking or thinning the resist pattern of the wiring due to the reflected light. In addition, after the wiring pattern is formed, a heat treatment at 400 to 500 ° C. is usually performed to recover crystal defects. At this time, the element diffuses into the deposited pure aluminum layer, and reliability against electromigration and stress migration is increased. An aluminum alloy film having high properties is formed. Therefore, according to the present invention, it is possible to obtain a method for forming a pattern of a semiconductor device, which has good coverage at a step portion, has a high migration resistance, and has a wiring having a junction spike during heat treatment and a wiring line which is not broken due to reflected light from the underlying step. .

[Brief description of drawings]

FIG. 1 is a sectional view of a step in a first embodiment of the present invention.

FIG. 2 is a sectional view of a process in a second embodiment of the present invention.

[Explanation of symbols]

1 Semiconductor substrate 2 LOCOS oxide film 3 Interlayer insulation film 4 CVD-Al film 5 Si film 6 Photoresist film 7 Photomask 8 exposure light 9 Al-0.8% Si alloy film 10 Cu film 11 Al-4% Cu alloy wiring

Claims (3)

[Claims] 1. A method of manufacturing a semiconductor device having an aluminum wiring to which a so-called migration-reducing element is added. A step of forming an element for preventing the aluminum film so that the weight ratio thereof is several percent with respect to the aluminum film, and forming both the aluminum film and the element film for reducing the migration by photolithography into predetermined shapes. The method includes a step of forming an aluminum wiring by etching, and then a step of forming an aluminum alloy wiring by diffusing into the aluminum film an element for reducing the migration by heat treatment or for preventing a junction spike during the heat treatment. Of the semiconductor device characterized in that Pattern formation method. 2. The pattern forming method for a semiconductor device according to claim 1, wherein the aluminum film is formed by a chemical vapor deposition method (hereinafter referred to as “CVD”). 3. The method for forming a pattern of a semiconductor device according to claim 1, wherein the element for reducing migration or for preventing junction spikes during heat treatment is Si, Su, Ti, Pd or the like. .