JPH0521307A - Semiconductor aligner - Google Patents

Semiconductor aligner

Info

Publication number
JPH0521307A
JPH0521307A JP3199789A JP19978991A JPH0521307A JP H0521307 A JPH0521307 A JP H0521307A JP 3199789 A JP3199789 A JP 3199789A JP 19978991 A JP19978991 A JP 19978991A JP H0521307 A JPH0521307 A JP H0521307A
Authority
JP
Japan
Prior art keywords
exposure
wafer
retreatment
cassette
control computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3199789A
Other languages
Japanese (ja)
Inventor
Hiroki Suzukawa
弘樹 鈴川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP3199789A priority Critical patent/JPH0521307A/en
Publication of JPH0521307A publication Critical patent/JPH0521307A/en
Pending legal-status Critical Current

Links

Landscapes

  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Electron Beam Exposure (AREA)

Abstract

PURPOSE:To reduce operational load of an operator by automatically performing determination and treatment of a wafer whose exposure is interrupted by a device and to accelerate automation of a semiconductor manufacture process by holding exposure data of each exposed wafer in a memory of a control computer. CONSTITUTION:An exposure method, retreatment determination value when exposure is interrupted, a retreatment method and exposure hysteresis for each wafer are held in a memory 7 of a control computer 2 as memory contents. As for a wafer which is fed out of a wafer cassette 4, retreatment is performed automatically for a wafer which requires retreatment based on data held in the control computer 2 when exposure of all the wafers is finished. As for a wafer fed out of a resist application development device 6, it is returned to the resist application development device 6 after a wafer whose exposure is interruped is temporarily contained in the wafer cassette 4 and the wafer temporarily contained in the cassette 4 is retreated when exposure of all the wafers is finished.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体製造におけるウ
エハ露光工程の改良に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to improvement of a wafer exposure process in semiconductor manufacturing.

【0002】[0002]

【従来の技術】ウエハ露光工程ではー枚のウエハに対し
て数十個の回路パターンをステップアンドリピート方式
で露光する。1つの回路パターンを1ショットとすると
数十ショットの露光が完了してはじめて一枚のウエハの
露光が完了する。一枚のウエハの露光中に、あるショッ
トで位置合わせ失敗等が発生してそのショットの露光が
完了しなかった場合は、そのウエハの露光はそこで中断
し、その後のそのウエハの扱いは、装置のオペレ−タ等
が決定する。
2. Description of the Related Art In a wafer exposure process, several tens of circuit patterns are exposed on one wafer by a step-and-repeat method. When one circuit pattern is taken as one shot, the exposure of one wafer is completed only after the exposure of several tens of shots is completed. During the exposure of a single wafer, if the exposure of that shot is not completed due to misalignment or the like in a certain shot, the exposure of that wafer is interrupted there, and the subsequent handling of that wafer is performed by the device. The operator etc. of will be decided.

【0003】[0003]

【発明が解決しようとする課題】前述のように露光中断
されたウエハが発生した場合、そのウエハの扱いはオペ
レ−タ等によって決定されるが、その処理と判断基準は
通常次のようなものである。判断基準としては、全ショ
ット数中何ショットまで露光完了しているかにより判断
される。処理として、ほとんど露光完了している場合に
はそのウエハは露光完了とみなして現像工程に送る。ま
た、ほとんど露光完了していない場合には露光完了して
いない部分(ショット)を露光する。即ちそのウエハに
ついてもう一度露光工程を行う。
When a wafer whose exposure has been interrupted occurs as described above, the handling of the wafer is determined by an operator or the like, and the processing and judgment criteria are usually as follows. Is. The determination criterion is determined by how many shots of the total shots have been completed. As a process, when the exposure is almost completed, the wafer is considered to be exposed and is sent to the developing process. If the exposure is almost not completed, the part (shot) that has not been exposed is exposed. That is, the exposure process is performed again for the wafer.

【0004】このような作業をオペレ−タにより人為的
に行うことは作業負担となり信頼性も低いものであっ
た。
[0004] Performing such work artificially by an operator causes a work load and is unreliable.

【0005】本発明は上記従来技術の欠点に鑑みなされ
たものであつて、露光中断したウエハの判断と処置を装
置が自動的に行い、オペレ−タの作業負荷を軽減し、さ
らに半導体製造工程の自動化の促進を図った半導体露光
装置の提供を目的とする。
The present invention has been made in view of the above-mentioned drawbacks of the prior art. The apparatus automatically judges and treats a wafer whose exposure has been interrupted, reduces the workload of the operator, and further reduces the semiconductor manufacturing process. An object of the present invention is to provide a semiconductor exposure apparatus that promotes automation of the above.

【0006】[0006]

【課題を解決するための手段および作用】通常ウエハ露
光工程では25枚程のウエハを1まとまりとしてこれを
1ロットと呼びロット単位で露光処理する。1ロットの
露光処理を終了すると、その中に露光の中断されたウエ
ハが含まれている。前記目的を達成するため、本発明で
は露光中断されたウエハのその後の処置の判断基準とし
て例えば数値nを持つ。nは、露光完了ショット数又は
全ショット数に対する露光完了ショット数の割合いとす
る。この数値nは、装置使用者の都合に応じて設定可能
である。
In the normal wafer exposure process, about 25 wafers are collectively treated as one lot, and each lot is exposed. When the exposure processing for one lot is completed, the wafer whose exposure has been interrupted is included in it. To achieve the above object, the present invention has, for example, a numerical value n as a criterion for subsequent treatment of a wafer whose exposure has been interrupted. Let n be the number of exposure completed shots or the ratio of the number of exposure completed shots to the total number of shots. This numerical value n can be set according to the convenience of the user of the apparatus.

【0007】また露光処理したウエハについては、1枚
ごとに露光完了したショット数又は割合n1〜n25 〜n
nを記憶しておく。そして1ロットについて処理終了し
た時点で判定値nとウエハごとのn1〜nnを比較するこ
とによりn>nn、n≧ nn等に該当したウエハをnn以
降について自動的に再露光する。
With respect to the wafers that have been subjected to the exposure processing, the number of shots or the ratio n1 to n25 to n for which the exposure is completed for each wafer is completed.
Remember n. Then, when the processing is completed for one lot, the judgment value n is compared with n1 to nn for each wafer to automatically re-expose the wafer corresponding to n> nn, n ≧ nn, etc. for nn and thereafter.

【0008】[0008]

【実施例】図1は半導体露光装置の概略構成図である。
ウエハカセット4又はレジスト塗布現像装置6から送ら
れたウエハ5は、露光レンズ3の下で露光され再びウエ
ハカセット4又はレジスト塗布現像装置6へ送り返され
る。実施例では、ウエハごとに(a)露光方法、(b)
露光中断時の再処置判定値、(c)再処置方法(d)露
光履歴を記憶内容として制御コンピュ─タ2のメモリ7
内に保持する。ウエハカセット4から送り出されたウエ
ハについては、全ウエハの露光が完了した時点で制御コ
ンピュータ2に保持されている上記デ−タに基ずき自動
的に再処理の必要なウエハについて再度処理を行う。ま
たレジスト塗布現像装置6から送り出されたウエハにつ
いては、露光中断したウエハを一時的にウエハカセット
4に収納し全ウエハの露光完了時点でウエハカセット4
のウエハの場合と同様に一時的にカセットに収納したウ
エハを再処理してからレジスト塗布現像装置6へ送り返
す。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a schematic configuration diagram of a semiconductor exposure apparatus.
The wafer 5 sent from the wafer cassette 4 or the resist coating / developing device 6 is exposed under the exposure lens 3 and sent back to the wafer cassette 4 or the resist coating / developing device 6. In the embodiment, (a) exposure method for each wafer, (b)
Memory 7 of the control computer 2 with the re-treatment judgment value at the time of exposure interruption, (c) re-treatment method (d) exposure history as stored contents
Hold in. With respect to the wafers sent out from the wafer cassette 4, when the exposure of all the wafers is completed, the wafers that need to be reprocessed are automatically reprocessed based on the data stored in the control computer 2. . As for the wafers sent out from the resist coating / developing device 6, the wafers whose exposure has been interrupted are temporarily stored in the wafer cassette 4 and the wafer cassette 4
As in the case of the above wafer, the wafer temporarily stored in the cassette is reprocessed and then sent back to the resist coating and developing apparatus 6.

【0009】上記実施例では1ロット単位で,終了時に
まとめて再処置する方法を述べたが、ウエハ1枚単位で
露光中断時に直ちに再処置してもよい。また直ちに再処
置するか後で再処置するかについても制御コンピュ−タ
で記憶保持しておいてもよい。更に、ウエハカセットと
露光レンズ間およびレジスト塗布現像装置と露光レンズ
間でのウエハハンドリング中(搬送中)にハンドリング
エラ−が発生したウエハについてもこれをオペレ−タの
アシストによりウエハカセットに戻して再処置ウエハの
対象とする場合がある。このような場合再処置判定値を
複数保持し、各々に対して再処置方法を保持しておいて
もよい。
In the above-mentioned embodiment, the method of collectively performing re-treatment at the end of each lot has been described. However, re-treatment may be performed immediately at the time of interruption of exposure for each wafer. In addition, the control computer may store and store whether to perform the re-treatment immediately or later. Furthermore, even for wafers that have handling errors during wafer handling (during transfer) between the wafer cassette and the exposure lens and between the resist coating / developing device and the exposure lens, the wafer is returned to the wafer cassette with the assistance of the operator and re-processed. It may be the target of the treatment wafer. In such a case, a plurality of retreatment determination values may be held, and a retreatment method may be held for each.

【0010】[0010]

【発明の効果】以上説明したように、本発明によれば、
ウエハ露光工程における人為的作業負荷を軽減できると
ともに半導体製造工程の自動化をすすめ易くできる。こ
れにより半導体製造効率(歩留り)の向上が図られる。
As described above, according to the present invention,
It is possible to reduce human work load in the wafer exposure process and facilitate automation of the semiconductor manufacturing process. This improves the semiconductor manufacturing efficiency (yield).

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明に係わる半導体露光装置の概略構成図
である。
FIG. 1 is a schematic configuration diagram of a semiconductor exposure apparatus according to the present invention.

【符号の説明】[Explanation of symbols]

1;半導体露光装置、2;制御コンピュ−タ、3;露光
レンズ、4;ウエハカセット、5;ウエハ、6;レジス
ト塗布現像装置、7;メモリ。
1; semiconductor exposure apparatus, 2; control computer, 3; exposure lens, 4; wafer cassette, 5; wafer, 6; resist coating and developing apparatus, 7; memory.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 半導体ウエハ上に回路パタ−ンを露光転
写する半導体露光装置において、露光処理したウエハ1
枚ごとの露光デ−タを保持する記憶手段を具備したこと
を特徴とする半導体露光装置。
1. A semiconductor exposure apparatus for exposing and transferring a circuit pattern onto a semiconductor wafer, the wafer 1 being subjected to an exposure process.
A semiconductor exposure apparatus comprising a storage means for holding exposure data for each sheet.
【請求項2】 前記露光デ−タは、露光方法、露光中断
時の再処理判定値、再処理方法、および露光履歴を含む
ことを特徴とする請求項1の半導体露光装置。
2. The semiconductor exposure apparatus according to claim 1, wherein the exposure data includes an exposure method, a reprocessing determination value when the exposure is interrupted, a reprocessing method, and an exposure history.
【請求項3】 前記露光デ−タに基づき、露光中断時に
自動的にウエハ再処置判断を行い再処置を実施する制御
手段を具備したことを特徴とする請求項2の半導体露光
装置。
3. A semiconductor exposure apparatus according to claim 2, further comprising a control means for automatically performing a retreatment on the wafer at the time of interruption of the exposure based on the exposure data and performing the retreatment.
JP3199789A 1991-07-16 1991-07-16 Semiconductor aligner Pending JPH0521307A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3199789A JPH0521307A (en) 1991-07-16 1991-07-16 Semiconductor aligner

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3199789A JPH0521307A (en) 1991-07-16 1991-07-16 Semiconductor aligner

Publications (1)

Publication Number Publication Date
JPH0521307A true JPH0521307A (en) 1993-01-29

Family

ID=16413642

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3199789A Pending JPH0521307A (en) 1991-07-16 1991-07-16 Semiconductor aligner

Country Status (1)

Country Link
JP (1) JPH0521307A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6162010A (en) * 1997-06-23 2000-12-19 Tokyo Electron Limited Method for recovering object to be treated after interruption
US7403259B2 (en) 2003-10-17 2008-07-22 Asml Netherlands B.V. Lithographic processing cell, lithographic apparatus, track and device manufacturing method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6162010A (en) * 1997-06-23 2000-12-19 Tokyo Electron Limited Method for recovering object to be treated after interruption
US7403259B2 (en) 2003-10-17 2008-07-22 Asml Netherlands B.V. Lithographic processing cell, lithographic apparatus, track and device manufacturing method
US7679715B2 (en) 2003-10-17 2010-03-16 Asml Netherlands B.V. Lithographic processing cell, lithographic apparatus, track and device manufacturing method

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