JPH05207731A - Resonance type driving circuit - Google Patents

Abstract

PURPOSE:To accelerate an operation and to reduce the loss by preventing parasitic vibration due to wirings, etc., when a switch element of a switching converter, etc., is driven by an inverter. CONSTITUTION:An output of an inverter having a PMOSFET 3 and an NMOSFET 5 is connected to a gate of an NMOSFET 8 for a main switch via a wiring, sources of the NMOSFETs 5, 8 and the PMOSFET 3 are connected to negative and positive terminals of a DC power source 1. An inverter is turned ON, OFF to drive the NMOSFET 8. Here, Diodes 10, 11 are connected between the gate and the source of the NMOSFET 8 and between the gate and the positive electrode of the power source 1, and a capacitor 12 is connected to both ends of the diodes 11, 10. Thus, energy to be stored at an inductance 7 of the wiring to the NMOSFET 8 and the input capacity of the NMOSFET 8 is recovered by a resonance in the power source 1, thereby obtaining a high speed drive signal in which a parasitic vibration due to the inductance 7, etc., is prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resonance type drive circuit suitable for driving switch elements such as switching converters and switching power supplies.

[0002]

2. Description of the Related Art In recent years, miniaturization of integrated circuits has made electronic circuits smaller and lighter, and miniaturization is an essential issue for switching converters and switching power supplies that can obtain high-quality power. To reduce the size of switching power supplies and the like, it is effective to increase the conversion frequency and reduce the size of magnetic parts and capacitors. Therefore, the conversion frequencies of switching power supplies and the like are increasing year by year.
In particular, when the MOSFET is widely used as a main switching element, it is possible to control a large amount of power with a small amount of power, and since it is a voltage-driven element, high-frequency operation is relatively easy. The converter has come to be realized.

In order to drive such a MOSFET, it is necessary to apply an ON / OFF electric signal between the gate and the source at high speed. For this reason, conventionally, a drive circuit as shown in the circuit diagram of FIG. 5 has been used. Was used. In the figure, 1
Is a DC power supply, 2 is a control circuit, 3 is a PMOSFET, 4 is a body diode of the PMOSFET 3, and 5 is a first NM.
OSFET, 6 is the body diode of the first NMOSFET 5, 7 is the wiring inductance, and 8 is the second NMO.
SFET (main switch element), 9 is the second NMOSFE
The body diode of T8 is shown. A drive circuit is shown within a dotted line in FIG. 5, and a control circuit 2 for operating the drive circuit is provided around the drive circuit.

The drive circuit has a P having a body diode 4.
First N with MOSFET 3 and body diode 6
It is an inverter circuit in which MOSFET 5 is connected in series to the DC power supply 1, and the common drain of this inverter circuit and the gate of the main switch NMOSFET 8 are connected to each other.
It drives the main switch NMOSFET 8. The gates of the NMOSFET 5 and the PMOSFET 3 of the inverter circuit are connected in common, and the pulse voltage having the low level and high level values shown in FIG. 6 from the control circuit 2 is applied to this terminal to operate the inverter circuit.

In the above structure, when a low level signal is applied from the control circuit 2 to the common gate of the inverter circuit of the drive circuit, the PMOSFET 3 is turned on and the NMOS is turned on.
The FET is turned off, an on-voltage is applied to the gate of the main switch NMOSFET 8 from the DC power supply 1 connected to the inverter circuit, and the main switch NMOSFET 8 is turned on. Further, when a high level signal is applied from the control circuit 2 to the inverter circuit of the drive circuit, the PMOSFET is
3 is turned off and the NMOSFET 5 is turned on, the charge charged in the gate of the main switch NMOSFET 8 is extracted, and the main switch NMOSFET 8 is turned off. By the above operation, the main switch NMOSFET 8 repeats non-conduction and conduction to control the electric power transmitted to the load circuit.

[0006]

However, in the drive circuit according to the above-mentioned prior art, the commonly connected drain of the NMOSFET 5 and the PMOSFET 3 forming the inverter circuit of the drive circuit and the NMOSFET 8 for the main switch are formed.
Wiring that connects to the gate of the
Source of MOSFET 5 and NMOSFET for main switch
When the wires connecting the sources of 8 are long, the inductance of these wires (for example, 7 in FIG. 1) and the junction capacitance (input capacitance) between the gate and the source of the main switch NMOSFET 8 resonate. N for main switch in this case
The voltage applied between the gate and source of the MOSFET 8 has a positive and negative oscillation waveform, and in accordance with this, the NM for the main switch
Since the operation of turning on or off the OSFET 8 is repeated, the main switch NMOSFET 8 is controlled by the control circuit 2.
There is a problem that you can not control.

For example, when the drive circuit and the main switch NMOSFET 8 are constructed by the components shown in Table 1, the voltage waveform shown in FIG. 7 is applied between the gate and the source of the main switch NMOSFET 8. NMOSFET 8 for main switch
The gate-source voltage becomes negative voltage during the period when it should be turned on (the period when the control circuit 2 supplies a low level signal voltage to the gate of the inverter circuit), or during the period when it should be turned off (the control circuit 2 Thus, it can be seen that the main switch NMOSFET 8 malfunctions because of a positive value during the period when a high-level signal voltage is applied to the gate of the inverter circuit. The problem due to this parasitic vibration can be reduced by adding a snubber circuit, but there is a new defect that the loss increases.

[0008]

[Table 1]

The present invention has been made to solve the above problems, and its purpose is to reduce the inductance of wiring when driving switching elements such as a switching converter and a switching power source at a high frequency by an inverter circuit. It is to provide a resonance type drive circuit which prevents parasitic oscillation and is high speed and low loss.

[0010]

In order to achieve the above object, in the resonance type drive circuit of the present invention, the common drain of the PMOSFET and the first NMOSFET forming the inverter circuit is connected to the second drive target. The gates of the NMOSFETs are connected, the sources of the first and second NMOSFETs are connected to the negative electrode of the DC power source, and the PMOSFETs are connected.
Is connected to the positive electrode of the DC power source,
A means for supplying an on / off electric signal is connected to a common gate of the ET and the first NMOSFET and the second NMOSFET is connected.
A first diode is connected between the gate and the source of the MOSFET in a direction in which the source side serves as an anode, and the second N
A second diode is connected between the gate of the MOSFET and the positive electrode of the DC power source in a direction in which the gate side serves as an anode,
A capacitor is connected between the anode of the first diode and the cathode of the second diode.

[0011]

In the resonance type drive circuit of the present invention, the energy stored in the inductance of the wiring connecting the inverter circuit and the second NMOSFET and the capacitance between the gate and the source of the second NMOSFET is regenerated to the DC power supply by the resonance operation. To do. As a result, the inverter circuit and the main switch element N
A high-speed drive signal that prevents high-frequency parasitic oscillation due to the inductance of the wiring connecting the MOSFETs is obtained, and the loss is reduced by regenerating the excess energy to the DC power supply.

[0012]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 1 is a circuit diagram showing the configuration of an embodiment of the present invention. In the figure, 1 is a DC power supply, 2 is a control circuit, 3 is P
MOSFET, 4 is a body diode of PMOSFET 3, 5 is a first NMOSFET, and 6 is a first NMOSF.
ET5 body diode, 7 wiring inductance, 8 second NMOSFET (main switch element), 9
Is a body diode of the second NMOSFET 8, 10 is a first diode, 11 is a second diode, and 12 is a capacitor.

The present embodiment is different from the conventional circuit of FIG. 5 in that in addition to the conventional circuit of FIG. 5, a first diode 10 and a second diode 11 are connected in the direction shown in the drawing. That is, the capacitor 12 is connected between the anode of and the cathode of the second diode.

That is, in the structure of the present embodiment, the gate of the second NMOSFET 8 for the main switch to be driven is connected to the common drain of the PMOSFET 3 and the first NMOSFET 5 which form the inverter circuit.
The sources of the first NMOSFET 5 and the second NMOSFET 8 are connected to the negative electrode of the DC power supply 1, and the PMOSFET 3
Source is connected to the positive electrode of the DC power supply 1, and the PMOSFET
3 and the first NMOSFET 5 have a common gate connected to a control circuit 2 for supplying an ON / OFF electric signal, and a second NM
The first diode 10 is connected between the gate and the source of the OSFET 9 in the direction in which the source side serves as the anode, and the second N
A second diode 11 is connected between the gate of the MOSFET 9 and the positive electrode of the DC power supply 1 in a direction with the gate side as an anode, and a capacitor 12 is connected between the anode of the first diode 10 and the cathode of the second diode 11. ..

In the above, the purpose of the capacitor 12 is
Energy absorption of the inductance between the inverter circuit of the drive circuit and the main switch element, and the main switch NMOSF
Input capacitance of ET8, that is, capacitance between gate and source (C
gs) energy absorption, so the capacitor 12
In general, a capacitor having a value about 1000 to 10000 times the capacity Cgs is used.

The operation and action of the embodiment of the present invention constructed as above will be described. First, the circuit operation of this embodiment is
This will be described below with reference to the equivalent circuits of FIGS. 2A to 2F and the waveform diagrams of the respective parts of FIG. This equivalent circuit shows the gate-source capacitance of the main switch NMOSFET 8 as Cg.
s, the intagance (7 in FIG. 1) between the inverter circuit and the main switch NMOSFET 8 is described as Lc, and the PMOSFET 3 and the NMOSFET 5 of the inverter circuit are described as ideal switches. Further, in this equivalent circuit, the diodes 10 and 11 in FIG. 1 are represented by D1 and D2. Figure 2 (b)
2 to (f), the reference numerals of the constituent elements are omitted, but the same as in FIG. 2 (a). The operation in the embodiment of the present invention is shown in six operation states shown in FIGS.

State 1 is the PMOS FE of the inverter circuit.
T3 is on, NMOSFET5 is off, and the capacitance C
The state where gs is being charged is shown. In this state 1, when the voltage of the capacitor Cgs reaches the threshold voltage of the main switch NMOSFET 8, the main switch NMOSFET 8
Turns on. When the period of the state 1 continues, the charging voltage of the capacitor Cgs reaches the voltage of the DC power source 1, and when the capacitor Cgs is further charged, the second diode D2 is forward biased and becomes conductive. State 2 starts from this time.

During the period of the state 2, the current of the inductance Lc is the loop shown in (b) (inductance Lc → diode D2 → PMOSFET3 → inductance Lc).
Keeps flowing. During the period of state 2, the control circuit 2 turns off the PMOSFET 3 of the inverter circuit, and the NMOSFE
State 3 starts when T5 is turned on.

In the state 3, the current of the inductance Lc is regenerated to the DC power supply 1 through the body diode 6 and the diode D2 of the NMOSFET 5 of the inverter circuit. When the current of the inductance Lc becomes zero, the operation shifts to the state 4.

In the state 4, the charged electric charge of the capacitance Cgs is discharged through the inductance Lc and the NMOSFET 5 of the inverter circuit. Therefore, the voltage of the capacitor Cgs gradually drops, and when this voltage becomes lower than the threshold voltage of the main switch NMOSFET 8, the main switch NMOSFET 8
8 turns off. When the period of the state 4 continues, the voltage of the capacitor Cgs reaches zero, and when it is about to be charged to a negative voltage, the first diode D1 is forward biased and becomes conductive. State 5 starts from this time.

During the period of the state 5, the current of the inductance Lc is (e) shown in the loop (inductance Lc → NM).
OSFET5 → diode D1 → inductance Lc)
Keeps flowing. By the control circuit 2 during the period of state 5,
Turn on the PMOSFET 3 of the inverter circuit, NMOSF
State 6 begins when ET5 is turned off.

In the state 6, the current of the inductance Lc is regenerated to the DC power supply 1 through the body diode 4 and the diode D1 of the PMOSFET 3 of the inverter circuit. When the current in the inductance Lc becomes zero, the operation returns to the state 1. The rest is the above.

The voltage waveform of the capacitance Cgs and the current waveform of the inductor Lc during the above series of operations are as shown in FIG. A high-speed pulse waveform in which the oscillating voltage is not superimposed is obtained in the capacitor Cgs, and the current of the inductance Lc is regenerated in the DC power supply 1 in the states 3 and 6, so that the effect of power saving can be expected.

FIG. 4 shows the components of Table 1 above, the first diode 10 (D1) and the second diode 11 (D2) of the unit load UES1103, and the capacitor 12 of 0.4.
7 shows a voltage waveform between the gate and the source of the main switch NMOSFET 8 when the embodiment circuit of the present invention is configured using a 7 μF ceramic capacitor. As expected from the circuit operation analysis, it was confirmed that a high-speed pulse waveform with no oscillating voltage was obtained, and the loss was reduced by 20% as compared with the case of the conventional example.

[0026]

As is apparent from the above description, according to the resonance type drive circuit of the present invention, high-speed parasitic vibration is prevented by preventing the high-frequency parasitic vibration due to the inductance of the wiring connecting the inverter circuit and the main switch NMOSFET. Not only the drive signal can be obtained, but the surplus energy can be regenerated to the DC power source, so that the loss of the drive circuit can be reduced.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

2 (a), (b), (c), (d), (e),
(F) is an equivalent circuit diagram showing the operating state of the circuit of the above embodiment.

FIG. 3 is a waveform chart of each part in the above embodiment

FIG. 4 is an experimental waveform diagram showing the effect of the above embodiment.

FIG. 5 is a circuit diagram showing a conventional example of a drive circuit.

FIG. 6 is a waveform diagram showing a pulse voltage output by the control circuit in the conventional example.

FIG. 7 is a measured waveform diagram showing the gate-source voltage of the main switch NMOSFET of the conventional example.

[Explanation of symbols]

1 ... DC power supply, 2 ... control circuit, 3 ... PMOSFET, 4
... PMOSFET body diode, 5 ... First NM
OSFET, 6 ... First NMOSFET body diode, 7 ... Wiring inductance, 8 ... Second NMOS
FET (main switch element), 9 ... second NMOSFET
Body diode, 10 ... first diode, 11 ...
Second diode, 12 ... Capacitor.

Claims (1)

[Claims] 1. A PMOS FE forming an inverter circuit
The gate of the second NMOSFET to be driven is connected to the common drain of T and the first NMOSFET, the sources of the first and second NMOSFETs are connected to the negative electrode of the DC power source, and the source of the PMOSFET is connected to The PMOSFET and the first NMOS are connected to the positive electrode of a DC power source.
A common gate of the FET is connected to a means for applying an electric signal for turning on and off, and a first diode is connected between the gate and the source of the second NMOSFET in a direction in which the source side serves as an anode, and the second NMOSFET. A second diode is connected between the gate of the DC power supply and the positive electrode of the DC power source in a direction in which the gate side serves as an anode, and a capacitor is connected between the anode of the first diode and the cathode of the second diode. Resonant type drive circuit.