JPH05206448A - Press contact type semiconductor element - Google Patents
Press contact type semiconductor elementInfo
- Publication number
- JPH05206448A JPH05206448A JP1158492A JP1158492A JPH05206448A JP H05206448 A JPH05206448 A JP H05206448A JP 1158492 A JP1158492 A JP 1158492A JP 1158492 A JP1158492 A JP 1158492A JP H05206448 A JPH05206448 A JP H05206448A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- main
- cathode
- buffer plate
- electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Thyristors (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、圧接型半導体素子に係
り、特に圧接型半導体素子のカソード電極板の位置決め
構造に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pressure contact type semiconductor device, and more particularly to a positioning structure for a cathode electrode plate of the pressure contact type semiconductor device.
【0002】[0002]
【従来の技術】図4に従来の圧接型半導体として圧接型
ゲートターンオフサイリスタの構造を示す。図でろう付
けや溶接などにより接着されずに接触している部分は、
説明のため切り離して図示してある。図4において1は
一方の主電極導体である銅ブロック、2はシリコンと熱
膨張係数がほぼ等しい材料であるモリブデン,タングス
テン等からなるアノード電極、3はPNPN構造を有す
る半導体基体であるシリコンウエハである。銅ブロック
1はアノード電極2に加圧接触され、アノード電極2は
シリコンウエハ3の一方の主表面にろう付けされてい
る。4はパッシベーションゴム、5はアルミニウム蒸着
層からなり、シリコンウエハ3の他方の主表面の中心部
上に形成されたゲート電極である。6はカソード電極
で、このカソード電極6は、アルミニウム蒸着層からな
り、シリコンウエハ3のゲート電極5が形成された主表
面上にゲート電極5を取り囲んで形成された他方の主電
極である。7,8は熱緩衝板、9はカソード銅ブロック
で、熱緩衝板7はシリコンと熱膨張係数がほぼ等しい材
料からなるドーナツ状薄板で、周辺にカソード銅ブロッ
ク9の外周を取り囲む周壁を有する。熱緩衝板8はシリ
コンと熱膨張係数がほぼ等しい材料からなるドーナツ状
円板であり、カソード銅ブロック9は熱緩衝板8に加圧
接触された他方の主電極導体である。10は絶縁体、1
1は金属弾性体からなりそのばね力により一端がゲート
電極5に加圧接触されるゲートリード、12はシリコン
ラバー等からなる弾性部材である。2. Description of the Related Art FIG. 4 shows the structure of a conventional pressure contact type gate turn-off thyristor as a pressure contact type semiconductor. In the figure, the parts that are in contact without being adhered by brazing or welding are
It is separated and shown for the sake of explanation. In FIG. 4, 1 is a copper block which is one of the main electrode conductors, 2 is an anode electrode made of molybdenum, tungsten or the like which is a material having a thermal expansion coefficient substantially equal to that of silicon, and 3 is a silicon wafer which is a semiconductor substrate having a PNPN structure. is there. The copper block 1 is brought into pressure contact with the anode electrode 2, and the anode electrode 2 is brazed to one main surface of the silicon wafer 3. Reference numeral 4 is a passivation rubber, 5 is an aluminum vapor deposition layer, and is a gate electrode formed on the central portion of the other main surface of the silicon wafer 3. Reference numeral 6 denotes a cathode electrode, and this cathode electrode 6 is the other main electrode formed of an aluminum vapor deposition layer and formed so as to surround the gate electrode 5 on the main surface of the silicon wafer 3 on which the gate electrode 5 is formed. Reference numerals 7 and 8 are thermal buffer plates, 9 is a cathode copper block, and the thermal buffer plate 7 is a doughnut-shaped thin plate made of a material having a thermal expansion coefficient substantially equal to that of silicon, and has a peripheral wall surrounding the outer periphery of the cathode copper block 9. The thermal buffer plate 8 is a donut-shaped disk made of a material having a thermal expansion coefficient substantially equal to that of silicon, and the cathode copper block 9 is the other main electrode conductor that is pressed into contact with the thermal buffer plate 8. 10 is an insulator, 1
Reference numeral 1 is a gate lead which is made of a metal elastic body and one end of which is pressed against the gate electrode 5 by its spring force, and 12 is an elastic member made of silicon rubber or the like.
【0003】カソード電極6はシリコンウエハ3に放射
状に多数形成されたスリット状のカソードエミッタ上に
形成されている。また、両銅ブロック1,9とカソード
電極2に合金されたシリコンウエハ3との位置出し精度
が±1mm程度であるため、銅ブロック1の外径はカソ
ード電極2の領域よりも小さくしてある。The cathode electrodes 6 are formed on slit-shaped cathode emitters radially formed on the silicon wafer 3. Further, since the positioning accuracy between the copper blocks 1 and 9 and the silicon wafer 3 alloyed with the cathode electrode 2 is about ± 1 mm, the outer diameter of the copper block 1 is smaller than the area of the cathode electrode 2. ..
【0004】[0004]
【発明が解決しようとする課題】上記従来の圧接型半導
体素子では、熱緩衝板8を固定して位置決めするので、
熱緩衝板7や弾性部材12等の余分な部品を必要とし、
それだけ製作が面倒でコストが高くなる。また、熱緩衝
板8よりも外周側のカソード電極は圧接されないため、
素子動作時の電流分布が不均一になり、特性上好ましく
ない。さらに、熱緩衝板8の外周部のエッジに圧接応力
が集中し、このエッジが圧接される最外周のカソード電
極が伸ばされて、外周の構造物と短絡する恐れがあり、
信頼性に欠けていた。In the above conventional pressure contact type semiconductor device, since the thermal buffer plate 8 is fixed and positioned,
Requires extra parts such as the heat buffer plate 7 and the elastic member 12,
The production is troublesome and the cost is high. Further, since the cathode electrode on the outer peripheral side of the thermal buffer plate 8 is not pressure-contacted,
The current distribution during element operation becomes non-uniform, which is not preferable in terms of characteristics. Further, the pressure contact stress is concentrated on the edge of the outer peripheral portion of the thermal buffer plate 8, and the outermost peripheral cathode electrode to which this edge is pressure contacted is extended, which may cause a short circuit with the outer peripheral structure.
It was unreliable.
【0005】本発明は上述の問題点を解決したもので、
安価にして高性能で高信頼性の圧接型半導体素子を提供
することを目的とする。The present invention solves the above problems,
An object of the present invention is to provide an inexpensive, high-performance and highly reliable pressure contact type semiconductor element.
【0006】[0006]
【課題を解決するための手段】本発明は、上記目的を達
成するために、半導体基体の両主表面にそれぞれ主電極
が設けられ、一方の主電極は制御電極に取り囲まれ該主
表面上に分散配置され、両主電極は熱緩衝板を介して前
記半導体基体に圧接により外部電極へ接続されてなる半
導体素子において、前記一方の主電極に圧接される熱緩
衝板の外径を該一方の主電極の領域よりも大きくして構
成したことを特徴とする。In order to achieve the above-mentioned object, the present invention is provided with main electrodes on both main surfaces of a semiconductor substrate, and one main electrode is surrounded by a control electrode and is provided on the main surface. In a semiconductor device in which both main electrodes are dispersed and are connected to an external electrode by pressure contact with the semiconductor substrate via a heat buffer plate, the outer diameter of the heat buffer plate pressed against the one main electrode is set to It is characterized in that it is made larger than the area of the main electrode.
【0007】[0007]
【作用】熱緩衝板は、その外径が一方の主電極の領域よ
りも大きく、半導体基体の一方の主表面に圧接される。
これにより、主電極への圧接応力が均一になり、素子の
電流分布が均一になり特性の向上が図れる。The heat buffer plate has an outer diameter larger than that of one main electrode region and is pressed against one main surface of the semiconductor substrate.
As a result, the pressure contact stress to the main electrode becomes uniform, the current distribution of the element becomes uniform, and the characteristics can be improved.
【0008】[0008]
【実施例】以下に本発明の実施例を図1〜図3を参照し
ながら説明する。Embodiments of the present invention will be described below with reference to FIGS.
【0009】図1は本発明の実施例による圧接型半導体
素子を示すもので、図4のものと同一又は相当部分には
同一符号が付されている。半導体基体であるウエハ3の
主表面にそれぞれ主電極を有し、一方の主電極であるカ
ソード電極6は制御電極であるゲート電極に取り囲まれ
主表面上に分散配置されている。このカソード電極6と
他方の主電極であるアノード電極2はシリコンと熱膨張
係数がほぼ等しい材料であるモリブデンもしくはタング
ステン等の熱緩衝板を介して圧接により外部電極へ接続
されている。ゲート電極5は素子中心付近に圧接された
ゲートリード11により外部電極に接続される。FIG. 1 shows a pressure contact type semiconductor device according to an embodiment of the present invention, in which the same or corresponding parts as those in FIG. 4 are designated by the same reference numerals. The main surface of the wafer 3 which is a semiconductor substrate has a main electrode, and the cathode electrode 6 which is one main electrode is surrounded by the gate electrode which is a control electrode and is dispersedly arranged on the main surface. The cathode electrode 6 and the other main electrode, the anode electrode 2, are connected to the external electrode by pressure welding through a thermal buffer plate such as molybdenum or tungsten, which is a material having a thermal expansion coefficient substantially equal to that of silicon. The gate electrode 5 is connected to an external electrode by a gate lead 11 which is pressed against the center of the device.
【0010】本実施例の特徴とするところは、カソード
電極6に圧接される熱緩衝板8は、その外径をカソード
電極6の領域よりも大きくしてあり、かつ外周部で非流
動性ゴム13を介してカソード側主表面上に位置決めさ
れていることである。また、両主電極に熱緩衝板等を介
して圧接されるカソード銅ブロック9およびアノード銅
ブロック9の外径は等しくかつカソード電極6の領域よ
りも小さくしてある。The feature of this embodiment is that the heat buffer plate 8 pressed against the cathode electrode 6 has an outer diameter larger than that of the cathode electrode 6 and has a non-fluid rubber at the outer peripheral portion. That is, it is positioned on the main surface of the cathode side through 13. Further, the outer diameters of the cathode copper block 9 and the anode copper block 9 which are pressed against both main electrodes via a heat buffer plate or the like are equal and smaller than the area of the cathode electrode 6.
【0011】上記実施例によれば、熱緩衝板8を固定す
るための熱緩衝薄板や弾性部材の如き余分な部品を省略
できるので、コストが安くなる。また、カソード電極6
は熱緩衝板8で全て圧接されるため、素子の動作時の電
流分布が均一になり、特性が向上する。さらに、カソー
ド銅ブロック9の外径よりも熱緩衝板8の外径が大きい
ことと、熱緩衝板8の外周部のエッジがカソード電極6
に圧接されていないことから、従来のように最外周のカ
ソード電極が伸ばされて外周の構造物と短絡することが
ない。According to the above-described embodiment, since the extra parts such as the heat buffer thin plate and the elastic member for fixing the heat buffer plate 8 can be omitted, the cost is reduced. In addition, the cathode electrode 6
Are all pressed against each other by the thermal buffer plate 8, so that the current distribution during the operation of the device becomes uniform and the characteristics are improved. Further, the outer diameter of the heat buffer plate 8 is larger than the outer diameter of the cathode copper block 9, and the edge of the outer peripheral portion of the heat buffer plate 8 has the cathode electrode 6.
Since it is not pressure-welded to the outer periphery, the cathode electrode on the outermost periphery is not stretched and short-circuited with the structure on the outer periphery unlike the conventional case.
【0012】図2は本発明の他の実施例である圧接型半
導体素子としての圧接型ゲートターンオフサイリスタを
示すもので、図1のものと同一又は相当部分には同一符
号が付されている。本実施例においては、図2に示すよ
うに、熱緩衝板8の圧接をより均一にするために、熱緩
衝板8と銅ブロック9との間に金属箔である銀箔14を
介設し、銀箔14も熱緩衝板8とともに固定したもので
ある。FIG. 2 shows a pressure contact type gate turn-off thyristor as a pressure contact type semiconductor element according to another embodiment of the present invention. The same or corresponding parts as those in FIG. 1 are designated by the same reference numerals. In this embodiment, as shown in FIG. 2, in order to make the pressure contact of the heat buffer plate 8 more uniform, a silver foil 14 which is a metal foil is provided between the heat buffer plate 8 and the copper block 9, The silver foil 14 is also fixed together with the heat buffer plate 8.
【0013】また、両主電極に熱緩衝板等を介して圧接
されるカソード銅ブロック9およびアノード銅ブロック
9の外径は等しくかつカソード電極6の領域よりも小さ
くしてある。Further, the outer diameters of the cathode copper block 9 and the anode copper block 9 pressed against the two main electrodes via a heat buffer plate and the like are equal and smaller than the area of the cathode electrode 6.
【0014】図2の実施例によれば、熱緩衝板8の圧接
をより均一にするために、熱緩衝板8と銅ブロック9と
の間に銀箔14を挿入した場合でも、新たな部品や構造
を用いることなく熱緩衝板8と同時に固定し位置決めす
るだけで良いとともに、図1のものと同様な作用,効果
が得られる。According to the embodiment of FIG. 2, even if the silver foil 14 is inserted between the heat buffer plate 8 and the copper block 9 in order to make the pressure contact of the heat buffer plate 8 more uniform, a new component or It is only necessary to fix and position the heat buffer plate 8 at the same time without using a structure, and the same action and effect as those of FIG. 1 can be obtained.
【0015】図3は、アノードアノード電極に熱緩衝板
をロー付けしない、いわゆるアロイフロー構造のゲート
ターンオフサイリスタに本発明を実施した例である。図
3において、15はアノード電極で、アルミ蒸着層から
なり、シリコンウエハ3の一方の主表面に形成されてい
る。16は熱緩衝板で、シリコンと熱膨張係数がほぼ等
しい材料からなる円板状のものである。17はテフロン
リングであって、シリコンウエハ3の外周部を保護する
ためのものである。FIG. 3 shows an example in which the present invention is applied to a gate turn-off thyristor having a so-called alloy flow structure in which a thermal buffer plate is not brazed to the anode electrode. In FIG. 3, reference numeral 15 is an anode electrode, which is made of an aluminum vapor deposition layer and is formed on one main surface of the silicon wafer 3. Reference numeral 16 denotes a heat buffer plate, which is a disc-shaped member made of a material having a thermal expansion coefficient substantially equal to that of silicon. A teflon ring 17 protects the outer peripheral portion of the silicon wafer 3.
【0016】図3の実施例によるものは、ゲートターン
オフサイリスタと同様に圧接により外部電極に接続され
る半導体素子であるダイオード,サイリスタ,静電誘導
サイリスタ,IGBT(絶縁ゲート形バイポーラトラン
ジスタおよび絶縁ゲート付きサイリスタにも適用可能で
ある。The embodiment of FIG. 3 is a semiconductor device such as a diode, a thyristor, an electrostatic induction thyristor, an IGBT (insulated gate type bipolar transistor and an insulated gate) which is connected to an external electrode by pressure contact like the gate turn-off thyristor. It is also applicable to thyristors.
【0017】[0017]
【発明の効果】本発明は、以上の如くであって、半導体
基体の両主表面に、それぞれ主電極を有し、一方の主電
極であるカソード電極であるカソード電極はゲート電極
に取り囲まれ主表面上に分散配置され、両主電極はシリ
コンと熱膨張係数がほぼ等しい材料であるモリブデンも
しくはタングステン等の熱緩衝板を介して圧接により外
部電極へ接続され、ゲート電極は素子中心付近に圧接さ
れたゲートリードにより外部電極に接続されるゲートタ
ーンオフサイリスタ等において、カソード電極に圧接さ
れる熱緩衝板は、外径をカソード電極の領域より大きく
し、かつさ外周部で非流動性ゴムを介してカソード側主
面上に固定し位置決めするものであるから、高性能にし
て高信頼性の圧接型半導体素子を得ることができる。As described above, the present invention has the main electrodes on both main surfaces of the semiconductor substrate, and the cathode electrode, which is the cathode electrode which is one of the main electrodes, is surrounded by the gate electrode. Dispersed on the surface, both main electrodes are connected to the external electrodes by pressure welding through a thermal buffer plate such as molybdenum or tungsten, which is a material having a thermal expansion coefficient almost equal to that of silicon, and the gate electrode is pressure-welded near the center of the device. In a gate turn-off thyristor connected to an external electrode by a gate lead, the thermal buffer plate pressed against the cathode electrode has an outer diameter larger than that of the cathode electrode, and a non-fluid rubber is used at the outer peripheral portion. Since it is fixed and positioned on the cathode-side main surface, a high performance and highly reliable pressure contact type semiconductor element can be obtained.
【図1】本発明の実施例による圧接型半導体素子の正断
面図。FIG. 1 is a front sectional view of a pressure contact type semiconductor device according to an embodiment of the present invention.
【図2】本発明の他の実施例による圧接型半導体素子の
正断面図。FIG. 2 is a front sectional view of a pressure contact type semiconductor device according to another embodiment of the present invention.
【図3】本発明のさらに他の実施例による圧接型半導体
素子の正断面図。FIG. 3 is a front sectional view of a pressure contact type semiconductor device according to still another embodiment of the present invention.
【図4】従来の圧接型半導体素子の正断面図。FIG. 4 is a front sectional view of a conventional pressure contact type semiconductor device.
1…銅ブロック、2…アノード電極、3…半導体基体、
4…ファッシベーションゴム、5…ゲート電極、6…カ
ソード電極、9…銅ブロック、11…ゲートリード、1
3…シリコンゴム、14…銀箔、15…アノード電極、
16…熱緩衝板。1 ... Copper block, 2 ... Anode electrode, 3 ... Semiconductor substrate,
4 ... Fashion rubber, 5 ... Gate electrode, 6 ... Cathode electrode, 9 ... Copper block, 11 ... Gate lead, 1
3 ... Silicon rubber, 14 ... Silver foil, 15 ... Anode electrode,
16 ... Thermal buffer plate.
Claims (3)
が設けられ、一方の主電極は制御電極に取り囲まれ該主
表面上に分散配置され、両主電極は熱緩衝板を介して前
記半導体基体に圧接により外部電極へ接続されてなる半
導体素子において、前記一方の主電極に圧接される熱緩
衝板の外径を該一方の主電極の領域よりも大きくして構
成したことを特徴とする圧接型半導体素子。1. A main electrode is provided on each of the two main surfaces of a semiconductor substrate, one main electrode is surrounded by a control electrode and is dispersedly arranged on the main surface, and both main electrodes are provided with the semiconductor via a thermal buffer plate. In a semiconductor element which is connected to an external electrode by pressure contact with a substrate, the outer diameter of a heat buffer plate pressure-contacted to the one main electrode is larger than the area of the one main electrode. Pressure contact type semiconductor device.
て、前記半導体基体の一方の主表面に設けられた一方の
主電極に圧接される熱緩衝板と金属ブロックとの間に介
設される金属箔、もしくは前記一方の電極と前記熱緩衝
板との間に挿入される箔を前記熱緩衝板と重ねて前記一
方の主表面上に固定位置決めして構成したことを特徴と
する圧接型半導体素子。2. The pressure-contact type semiconductor device according to claim 1, wherein the heat-contact plate and the metal block, which are in pressure-contact with one main electrode provided on one main surface of the semiconductor substrate, are interposed. A pressure contact type semiconductor characterized in that a metal foil or a foil inserted between the one electrode and the heat buffer plate is superposed on the heat buffer plate and fixedly positioned on the one main surface. element.
において、前記両主電極に圧接される各金属ブロックの
外径を、等しくするとともに、前記一方の主電極の領域
よりも小さくして構成したことを特徴とする圧接型半導
体素子。3. The pressure contact type semiconductor device according to claim 1 or 2, wherein the outer diameters of the metal blocks pressed against the both main electrodes are made equal and smaller than the area of the one main electrode. A pressure contact type semiconductor device characterized by being configured.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1158492A JPH05206448A (en) | 1992-01-27 | 1992-01-27 | Press contact type semiconductor element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1158492A JPH05206448A (en) | 1992-01-27 | 1992-01-27 | Press contact type semiconductor element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH05206448A true JPH05206448A (en) | 1993-08-13 |
Family
ID=11781958
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1158492A Pending JPH05206448A (en) | 1992-01-27 | 1992-01-27 | Press contact type semiconductor element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH05206448A (en) |
-
1992
- 1992-01-27 JP JP1158492A patent/JPH05206448A/en active Pending
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