JPH05206120A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To increase SM resistance without lessening the EM resistance of wiring by providing a gap between each wiring side and an insulating film. CONSTITUTION:Al is deposited as wiring material on a base insulating film 1. Next an SiO2 film or SiN2 film is deposited by CVD as a film whose etching rate to isotropic etching is slower than that of an Al wiring film 2. Next after anisotropic etching of the film 3 of a slower etching rate is performed, anisotropic etching of the Al film 2 is performed. Next an insulating film 4 of SiO2, etc., is deposited by the use of a depositing method of strong anisotropy, a cluster ion beam method for example. On this occasion, a gap is formed between each side of the wiring 2 and the insulating film 4. Consequently, it becomes possible to make the SM resistance higher.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and in particular, it has stress migration resistance,
The present invention relates to a semiconductor device and a manufacturing method thereof.

[0002]

2. Description of the Related Art As semiconductor devices become finer, reliability of wiring (especially Al alloy wiring) due to electromigration (hereinafter abbreviated as "EM"), stress migration (hereinafter abbreviated as "SM"), etc. The decline becomes a big problem.

As a conventional EM countermeasure, Al is mixed with other metal impurities (eg, Cu, Ti, Pd, etc.) or the crystal grain size is increased to form a so-called bamboo knot (bamboo) structure. Is considered. Further, as SM countermeasures, of course, the stress of the insulating film covering the wirings is reduced, and as countermeasures on the wiring material side, like the EM countermeasures, mixing of metal impurities and control of crystal grain size are considered. Further, a method is conceivable in which a laminated oxide film of an Al alloy and a refractory metal, or an Al film is taken out of the apparatus during film formation, a thin oxide film is attached to the surface, and Al is further deposited thereon.

[0004]

However, the Al alloy mixed with impurities has a problem that the mechanical strength becomes weak due to the influence of corrosion and non-uniform precipitation. In the bamboo knot structure used as an EM countermeasure, SM is used. There is a problem that the resistance deteriorates.

An object of the present invention is to provide means for improving SM resistance without deteriorating EM resistance of wiring.

[0006]

According to another aspect of the present invention, there is provided a semiconductor device having a wiring covered with an insulating film, wherein a gap is provided between the side surface of the wiring and the insulating film. It is a feature.

The method of manufacturing a semiconductor device according to a second aspect of the present invention is the method of manufacturing a semiconductor device according to the first aspect, wherein after the wiring material is deposited, a film having an etching rate slower than that of the wiring material is deposited. Then, after patterning, and anisotropic etching and isotropic etching are sequentially performed, the insulating film is deposited by a deposition method having a strong anisotropy.

[0008]

As described above, by providing the gap between the side surface of the wiring and the insulating film, the stress due to the volume expansion of the wiring with respect to the insulating film, which is received by the heat treatment during manufacturing or the Joule heat during use, is relaxed. It will be.

[0009]

The present invention will be described in detail below based on an example.

FIG. 1 shows an embodiment of the present invention described in claim 1, and FIG. 2 shows a manufacturing process of the present invention described in claim 2.
In FIG. 1, 1 is a base insulating film, 2 is wiring, and 3 is wiring 2.
A film having a slower etching rate than isotropic etching, 4 is an insulating film, and 5 is a gap.

The present invention is characterized in that a gap 5 is provided between the side surface of the wiring 2 and the insulating film 4.

Next, the manufacturing process will be described with reference to FIG.
First, Al is deposited as a wiring material on the base insulating film 1 (eg, SiO ₂ ) by sputtering. Next, A
As the film 3 having a slower etching rate than the 1 wiring film 2 with respect to isotropic etching, a SiO ₂ film or a SiN ₂ film is deposited by the CVD method (FIG. 2A).

Next, CF ₄ , CHF ₃ or CF ₄ and CH
Etching gas mixed with ₃ and pressure of 0.05
~ 0.2 Torr, RF plasma output 1.0 ~ 4.0W
/ Cm ² after an anisotropic etch of the slow film 3 etching rate, BCl _3, Cl ₂ or BCl ₃ and Cl
Etching gas mixed with ₂ and pressure of 0.05
~ 0.2 Torr, RF plasma output 1.0 ~ 4.0W
The anisotropic etching of the Al film 2 is performed under the condition of / cm ² (FIG. 2B).

Next, with Cl ₂ as an etching gas, the pressure is 0.1 to 0.5 Torr and the RF plasma output is 0.8 to.
Isotropic etching is performed under the condition of 2.0 W / cm ² (FIG. 2C).

Next, an insulating film 4 of SiO ₂ or the like is deposited by using a highly anisotropic deposition method, for example, a cluster ion beam method (FIG. 2 (d)). At this time, a gap 5 is formed between the side surface of the wiring 2 and the insulating film 4.

[0016]

As described above in detail, according to the present invention, by providing a gap between the side surface of the wiring and the insulating film, the stress due to the difference in the thermal expansion coefficient between the wiring and the insulating film is reduced. As a result, the resistance to SM is improved, and a wiring having high reliability can be obtained.

[Brief description of drawings]

FIG. 1 is a structural sectional view of an embodiment of the present invention.

FIG. 2 is a manufacturing process diagram of an example of the present invention.

[Explanation of symbols]

1 Base insulating film 2 Al wiring 3 Film with a slower etching rate of isotropic etching than Al 4 Insulating film 5 Gap

Claims (2)

[Claims] 1. A semiconductor device in which wiring is covered with an insulating film, wherein a gap is provided between the side surface of the wiring and the insulating film. 2. A method of manufacturing a semiconductor device in which wiring is covered with an insulating film, after depositing a wiring material, depositing a film having an etching rate slower than that of the wiring material, then patterning, anisotropic etching and 2. The method of manufacturing a semiconductor device according to claim 1, wherein the insulating film is deposited by a highly anisotropic deposition method after sequentially performing isotropic etching.