JPH05191752A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To improve the vertical resolution of a still picture. CONSTITUTION:A discrimination circuit 12 discriminates whether or not a picture of a current field is a complete still picture. A discrimination signal (b) of the result of discrimination is fed to a control circuit 13. In the case of the complete still picture, the discrimination signal (b) reaches a high level, and a start signal (c) from the control circuit 13 goes to a high level for a prescribed period in an odd number field and a start signal (d) from the control circuit 13 goes to a high level for a prescribed period in an even number field. The 1st gate driver 14 is in operation in the odd number field and a video signal (f) of the odd number field is displayed on odd number signal lines L1, L3.... The 2nd gate driver 15 is in operation in the even number field and the video signal (f) of the even number field is displayed on even number signal lines L2, L4.... Thus, the video image of two fields are displayed simultaneously and the vertical resolution is improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a conventional liquid crystal display device for receiving high-definition television broadcasting, and more particularly to a liquid crystal display device capable of improving the image quality of still images.

[0002]

2. Description of the Related Art In recent years, many personal computers, word processors, and liquid crystal television receivers have become popular as display devices using liquid crystals. Liquid crystal display modules used in liquid crystal television receivers have been developed with high definition and high image quality, and are expected to be used in television receivers that receive high-definition television broadcasts.

In high-definition television broadcasting, how to band-compress an original signal having a huge amount of information has been a problem. The MUSE system was developed for the purpose of solving this problem, and is "a new transmission system for high-definition television-MUS.
E- "(NHK Giken monthly report, written by Ninomiya, Vol. 27, No. 7, Showa 5)
9 years).

In the MUSE method, pixels are decimated by shifting positions between frames on the transmission side, the original image is divided into four fields and transmitted, and on the receiving side, in the case of a still image with a small temporal change of the image. One screen is composed of four fields, and one field is composed of two fields in the case of a moving image having a large temporal change in image. In this case, the horizontal resolution of the moving image is lower than that of the still image, but the resolution of the moving image is not felt because the resolution of the moving image of the human eye is lower than that of the moving image.

A conventional liquid crystal television receiver for receiving such a high-definition television broadcast will be described below.

Since the liquid crystal has a holding ability, when an interlaced scan of a moving image is performed, an image of the n-th field and an image of the (n + 1) th line are displayed at the same time. It gives the user an unnatural feeling. In response to this, double-speed scanning or simultaneous two-line scanning is adopted, but normally the source driver is made up of a medium-voltage CMOS integrated circuit and its frequency characteristics are not high. Since the characteristics are required to be double that of interlace, two-line simultaneous scanning is generally adopted in many cases. In the two-line simultaneous scanning, the same signal is simultaneously written in two adjacent lines in one horizontal scanning period, so that the vertical resolution is naturally half that in the interlaced scanning. Therefore, in order to increase the resolution as much as possible, there is a method of writing the same signal in the m line and the (m + 1) line in the odd field and writing the same signal in the (m + 1) line and the (m + 2) line in the even field. However, even with this method, the vertical resolution is about 3/4 that of interlace.

As described above, in the liquid crystal display device for receiving high-definition television broadcasting, the resolution of human eyes is lower in moving images between still images and moving images, so that still images are more horizontal than moving images. Although the resolution is high, the vertical resolution is 3/4 of that of interlaced scanning for both moving images and still images because the two-line simultaneous scanning for moving images and still images described above is performed. It gave the user the impression that the vertical resolution of still images was low.

[0008]

In the above-mentioned conventional liquid crystal display device, the horizontal resolution of the still image is higher than that of the moving image. However, since the moving image and the still image are simultaneously scanned by the two lines described above. , The vertical resolution is 3/4 of that of interlaced scanning for moving images and still images even if the driving method is improved.
It gave the user the impression that the vertical resolution of still images was low.

An object of the present invention is to provide a liquid crystal display device which can eliminate the above problems and improve the vertical resolution of a still image.

[0010]

A liquid crystal display device of the present invention includes a liquid crystal display panel having a plurality of signal lines in the vertical direction and a plurality of pixel electrodes in the horizontal direction of these signal lines, and one horizontal scanning period. Source signals for generating pixel signals by sampling the minute video signals to supply the pixel signals to the plurality of signal lines, and an ON signal sequentially to odd-numbered signal lines of the plurality of signal lines. By supplying the ON signal to the first gate driver for displaying the pixel signal on the odd-numbered signal line and the even-numbered signal line among the plurality of signal lines, A second gate driver that displays a pixel signal on a signal line, a determination circuit that determines whether the video signal is a still image or a moving image, and a determination result of this determination circuit In the case of a still image, the first gate driver is operated only in the odd field and the second gate driver is operated in the even field only. When the discrimination result of the discriminating circuit is the moving image, the first gate driver is operated in the odd number and the even number. Means for operating the second gate driver at both odd and even fields while operating at both fields.

[0011]

With this structure, in the case of a still image,
The first gate driver operates only on odd fields, and the second gate driver operates only on even fields, so that pixel signals of odd fields are displayed on odd-numbered signal lines and pixel signals of even fields are even-numbered. Since it is displayed on the signal line of, the vertical resolution of the still image can be improved.

[0012]

The present invention will be described in detail below with reference to the embodiments shown in the drawings.

FIG. 1 shows a liquid crystal display device according to the present invention as an MU.
It is a block diagram showing a liquid crystal module when applied to an SE type liquid crystal television receiver.

In FIG. 1, reference numeral 11 is an input terminal to which the control signal a demodulated by the MUSE decoder is introduced. The control signal a contains information about how much the next field is moving. The control signal a guided to the input terminal 11 is supplied to the discrimination circuit 12. The determination circuit 12 determines whether or not the current field is a complete still image by using, for example, a comparator that compares the motion information value of the control signal a, and supplies the determination circuit b of the determination result to the control circuit 13. ing. The determination signal b has a high level when the determination result is a completely still image, and has a low level when the determination result is a moving image. The control circuit 13 is supplied with the composite synchronizing signal and the power supply voltage in addition to the discrimination signal b.
Generates start signals c and d based on the discrimination signal b and the composite synchronizing signal to generate the first and second gate drivers 1
The start signal e is generated and supplied to the source driver 16 while being supplied to the source drivers 16. Also, the first and second
The gate-on voltage VON from the input terminal 17 and the clock signal CK from the input terminal 18 are supplied to the gate drivers 14 and 15. The first gate driver 14 is
The gate-on voltage VON is sequentially supplied to the odd-numbered signal lines L1, L3, ... Of the liquid crystal display panel 19 based on the start signal c and the clock signal CK. The second gate driver 14 sequentially supplies the gate-on voltage VON to the even-numbered signal lines L2, L4 ... Of the liquid crystal display panel 19 based on the start signal d and the clock signal CK. The source driver 16 has a video signal f demodulated by the MUSE decoder.
Are supplied from the input terminal 21. The source driver 16 creates a pixel signal by sampling the video signal f based on the start signal e and outputs the pixel signal from the data wirings D1, D2 ... ..

FIG. 2 is a block diagram illustrating the gate driver 14 of FIG. 1 in more detail.

In FIG. 2, in the gate driver 14, the shift register 31 has a start signal c and a clock signal CK.
The switch group 32 is ON / OFF controlled based on the above.

In more detail, the shift register 3
1, the start signal c from the input terminal 33 and the clock signal CK from the input terminal 18 are supplied, and the rising edge of the start signal c is detected and the switch-on signals g1, g3 ... Synchronized with the clock signal CK. Switch group 32
Are sequentially supplied to the control signal input terminals of the switches SW1, SW3 ,. Switch SW1, S
W3 ... is the input terminal 1 of the gate-on voltage VON at the input terminal
7 are connected, and the liquid crystal display panel 19 is connected to each output terminal.
Are connected to the odd-numbered signal lines L1, L3, ... And the gate-on voltage VON is supplied to the signal lines L1, L3 by supplying the switch-on signals g1, g3 ,.

The gate driver 15 has the same configuration as the gate driver 14 except that the start signal c is changed to the start signal d and the signal lines L1 and L3 are changed to the signal lines L2 and L4. There is.

The operation of such an embodiment will be described below.

The muse signal to be transmitted has a 32-bit control signal portion, and this control signal portion includes the control signal a, which contains information on how much the next field is moving. There is. This motion signal is the motion information of the control signal a,
It is transmitted by 3 bits of bit numbers 16 to 18 of the control signal. Table 1 shows the control contents of bit numbers 16 to 18.

[0021]

[Table 1] The discrimination circuit 12 uses the bit numbers 16 to 16 of the control signal a.
When the control content indicated by 18 is 1: complete still image, the discrimination signal b is set to the high level, and in other cases, the discrimination signal b is set to the low level.

FIG. 3 is a waveform diagram showing the operation of the embodiment of FIG. 1, FIG. 3 (a) shows a video signal f, and FIG. 3 (b) shows a start signal c in the case of a completely still image, FIG. 3C shows the start signal d in the case of a completely still image, and FIG.
3 shows the start signal c in the case of a moving image, FIG. 3 (e) shows the start signal d in the case of a moving image, FIG. 3 (f) shows the start signal c in the case of a moving image with improved resolution, and FIG.
(G) is a start signal d in the case of a moving image with improved resolution
Is shown.

In the case of a complete still image, the video signal f shown in FIG. 3 (a) has the horizontal resolution increased by synthesizing the video signal of the current field with the field of one frame before. The discrimination signal b from the discrimination circuit 12 becomes high level, and the start signal c supplied from the control circuit 13 to the first gate driver 14 becomes high level for a predetermined period in an odd field as shown in FIG. 3B. The start signal d supplied from the control circuit 13 to the second gate driver 15 has a high level for a predetermined period with an even field as shown in FIG. As a result, the first gate driver 14 operates in the odd field, and the video signal f in the odd field receives the odd signal lines L1, L3 ...
Displayed in. The second gate driver 15 operates in the even field, and thus the video signal f in the even field is generated.
Are displayed on even-numbered signal lines L2, L4 ...
In this way, the display becomes equivalent to the interlaced scanning in which the scanning lines between the scanning lines scanned in the previous field in the current field are scanned, and two fields of images are displayed simultaneously, and the vertical resolution is improved.

In the case of a moving image (including forward still images), FIG.
In the video signal f shown in (a), the video signal of the current field is not combined with the field of one frame before, and the horizontal resolution remains low. The discriminating signal b from the discriminating circuit 12 becomes a low level, and the start signals c and d supplied from the control circuit 13 to the first and second gate drivers 14 and 15 are shown in FIG. Three
As shown in (e), it goes high every predetermined field for a predetermined period. As a result, the pixel signal from the source traverser 16 is divided into two lines on the odd-numbered signal lines and the even-numbered signal lines.
The lines are displayed simultaneously. As a result, the same display as in the past can be displayed in the moving image.

When the resolution of the moving image is increased as much as possible, the start signal c supplied from the control circuit 13 to the first gate driver 14 is the same as that shown in FIG. 3 (d) as shown in FIG. 3 (e). In the same manner, the period in which the start signal d supplied from the control circuit 13 to the second gate driver 15 is at the high level in the even field is 1
It may be delayed by the horizontal scanning. As a result, in the pixel signal from the source traverser 16, the same signal is written in the m line and the (m + 1) line in the odd field, and the same signal is written in the (m + 1) line and the (m + 2) line in the even field.

According to such an embodiment, in the case of a complete still image, a display equivalent to interlaced scanning is obtained, and two field images are displayed at the same time, and the vertical resolution is improved.
As a result, a high quality image can be provided to the user.

In the embodiment of FIG. 1, the display equivalent to the interlaced scanning is performed as a still image only in the case of a complete still image, but in the case of a complete still image and a quasi still image, the discrimination circuit 12 The determination signal b may be set to the high level, and in other cases, the determination signal b may be set to the low level to display a complete still image and a quasi-still image as a still image and display the same as the interlaced scanning. Also,
The gate drivers 14 and 15 may be operated by the discrimination signal b of the discrimination circuit 12 without the control circuit 13.

[0028]

According to the present invention, since the vertical resolution of a still image can be improved, a high quality image can be provided to the user.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a liquid crystal display device according to the present invention.

FIG. 2 is a block diagram illustrating the gate driver of FIG. 1 in more detail.

FIG. 3 is a waveform chart showing the operation of the embodiment of FIG.

[Explanation of symbols]

 12 Discrimination Circuit 13 Control Circuit 14 and 15 Gate Driver 16 Source Driver 19 Liquid Crystal Display Panel

Claims (1)

[Claims] 1. A liquid crystal display panel having a plurality of signal lines in the vertical direction and a plurality of pixel electrodes in the horizontal direction of these signal lines, and a pixel signal by sampling a video signal for one horizontal scanning period. A source driver that supplies a pixel signal to the plurality of signal lines and sequentially supplies an ON signal to the odd-numbered signal lines of the plurality of signal lines, thereby providing pixels to the odd-numbered signal lines. A first gate driver for displaying signals, and a second gate for displaying pixel signals on even-numbered signal lines by sequentially supplying ON signals to even-numbered signal lines of the plurality of signal lines A driver, a determination circuit for determining whether the video signal is a still image or a moving image, and a first gate driver when the determination result of the determination circuit is a still image Together with the operation monkey only in odd-numbered field second
The gate driver is operated only in the even field, and the first gate driver is operated in both the odd field and the even field and the second gate driver is operated in both the odd field and the even field when the discrimination result of the discrimination circuit is a moving image. A liquid crystal display device comprising: