JPH05190691A - Method of forming air bridge in compound semiconductor device - Google Patents

Abstract

PURPOSE:To facilitate the miniaturization of an air bridge by burying back the openings of an underside resist layer by metal plating processing provided for forming the posts of the air bridge, and flattening the surface of the resists layer. CONSTITUTION:Openings 5a for forming the posts P of an air bridge B are provided, by applying resist on a plating conductive layer 4 and forming an underside resist layer 5, and performing the patterning of this underside resist layer 5 after that. Following this, the openings 5a are buried by performing metal plating processing using Au, etc., by an amount corresponding to the thickness of the lowerside resist layer 5 and the surface of this lowerside resist layer 5 is flattened. Furthermore, a second plated conductive layer 7 which covers the underside resist layer 5 and the plated metal 6 wholly is deposited. Next the upperside resist layer 8 is formed on this plated conductive layer 7, and the patterning of the upperside resist film 8 is performed after that. Consequently, openings 8a corresponding to the air bridge are formed in the upperside resist layer 8.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming an air bridge in a compound semiconductor device.

[0002]

2. Description of the Related Art Conventionally, Ga which is a compound semiconductor device has been used.
As analog IC (MMIC), GaAsFET,
Transmission line, Schottky barrier diode, resistance, capacitance,
Circuit elements such as inductors are integrated on a semi-insulating GaAs substrate, and when it is necessary to reduce the parasitic capacitance between wirings in each circuit element, an air bridge that uses air as an interlayer insulator is used. It is used. That is, this air bridge is used when connecting adjacent island-shaped electrodes and at the crossover portion of the wiring, and can lower the parasitic capacitance between the wirings as compared with the case where the interlayer insulator is a dielectric. Therefore, the structure is effective for increasing the frequency.

The air bridge is generally formed according to the procedure shown in the process sectional views of FIGS.

First, as shown in FIG. 5A, a GaAs substrate 12 having a predetermined pattern of lower layer wiring 11 formed on the surface thereof is prepared. After forming the lower resist layer 13 of about 3 μm, the lower resist layer 13 is patterned as shown in FIG. 5B. In other words, by patterning the lower resist layer 13, openings 13a for forming columns of so-called posts P (see FIG. 7C), which will be described later, are provided. Note that reference numeral 14 in these figures denotes a nitride film as an insulating film that has been deposited covering the lower layer wiring 11 from the beginning, and the film thickness of the lower resist layer 13 formed at this time is equal to that of the air bridge B.
This corresponds to the height of the air gap G at.

Next, as shown in FIG. 6A, after depositing a plating conductive layer 15 on the lower resist layer 13,
As shown in FIG. 6B, an upper resist layer 16 is formed by applying a resist on the plating conductive layer 15. The upper resist layer 16 is made thicker than the metal plating layer formed in a later step.

Subsequently, as shown in FIG. 6B, the upper resist layer 16 is exposed by using an exposure mask M.
7A, the opening 16a having a shape corresponding to the air bridge B is formed by performing the patterning of. Further, as shown in FIG. 7B, after the opening 16a formed in the upper resist layer 16 is completely filled by a metal plating process using Au or the like, the lower resist layer 13 and the unnecessary resist layer 13 are removed. Conductive layer 15
When the upper resist layer 16 is removed, the air bridge B as shown in FIG. 7C is formed.

[0007]

The air bridge B must be miniaturized in order to reduce the area occupied by various circuit elements in the MMIC and achieve high integration.
However, in the conventional air bridge forming method, in the intermediate step, as shown in FIG. 6B, the film thickness of the upper resist layer 16 covering the opening 13a of the lower resist layer 13 is changed to the opening. It is formed to be thicker than the film thickness of the upper resist layer 16 on other portions except 13a. Therefore, when patterning the upper resist layer 16, if the exposure is performed according to the film thickness of the upper resist layer 16 formed on the other part of the lower resist layer 13 excluding the opening 13a, it is possible to reduce the size. Thus, the upper resist layer 16 covering the narrowed opening 13a is not sufficiently exposed.

In order to avoid such an inconvenience, the exposure is performed according to the film thickness of the upper resist layer 16 covering the opening 13a. As a result, overexposure of 16 occurs, and as shown in FIG. 7A, the periphery of the patterned opening 16a becomes a taper shape and greatly expands outward. Then, when this is done, as shown in FIG.
The side surface of the air bridge B formed by utilizing a is largely projected outward, and the miniaturization cannot be realized. Further, although not shown, it is possible to facilitate exposure and patterning of the upper resist layer 16 by setting the film thickness of the lower resist layer 13 thin in advance. However, since it becomes impossible to secure the height of the air gap, the effect of reducing the parasitic capacitance by the air bridge becomes insufficient.

The present invention was devised in view of such inconvenience, and provides an air bridge forming method capable of improving the exposure conditions in the upper resist layer and easily realizing the miniaturization of the air bridge. It is intended to be provided.

[0010]

In order to achieve such an object, an air bridge forming method according to the present invention comprises a step of forming an opening for forming an air bridge post in a resist layer, and the opening. A step of burying a portion with a metal plating process to flatten the surface of the resist layer.

[0011]

Embodiments of the method of the present invention will be described below with reference to the drawings.

1 to 4 are sectional views showing the steps of the method for forming an air bridge according to this embodiment,
1 to 4 are process cross-sectional views each of which constitutes each of the first to fourth process groups.

First, as shown in FIG. 1A, a GaAs substrate 2 having a lower wiring 1 having a predetermined pattern formed on the surface thereof.
And depositing an insulating film for the MIM capacitor covering the lower layer wiring 1, for example, a nitride film 3 over the entire surface, and forming a window in which the surface of the lower layer wiring 1 is exposed at each predetermined position of the nitride film 3. To do. Then, after such window opening is performed, as shown in FIG. 1B, the first conductive layer 4 for plating is deposited on the entire surface of the nitride film 3. The conductive layer 4 is made of Ti / Au, Cr / Au, or the like, and the thickness thereof is 100 Å for Ti and 40 for Au.
It is as thin as 0Å. The conductive layer 4 also serves as a layer in contact with the insulating film in the upper electrode of the MIM capacitor.

Next, a resist is applied on the plating conductive layer 4 to form a lower resist layer 5 having a film thickness of about 2 to 3 μm, and then, as shown in FIG. By patterning the resist layer 5, an opening 5a for forming the post P (see FIG. 4C) of the air bridge B is provided. Incidentally, the film thickness of the lower resist layer 5 corresponds to the height of the air gap G in the air bridge B, as in the conventional example. Continue to A
By performing a metal plating process using u or the like for the thickness of the lower resist layer 5, the opening 5a formed in the lower resist layer 5 is embedded as shown in FIG. The surface of the resist layer 5 is flattened. Reference numeral 6 in the figure denotes a plated metal that fills the inside of the opening 5a formed in the lower resist layer 5.

Further, as shown in FIG. 3A, a second conductive layer 7 for plating is deposited so as to entirely cover the lower resist layer 5 and the plating metal 6. The conductive layer 7 is made of Ti
/ Au, Cr / Au, Au, etc., and its thickness is similar to that of the conductive layer 4. Next, as shown in FIG. 3B, after forming the upper resist layer 8 on the conductive layer 7 for plating, the upper resist layer 8 is patterned after exposure using the exposure mask M. Then, as shown in FIG. 4A, an opening 8a having a shape corresponding to the air bridge is formed in the upper resist layer 8.
At this time, since the upper resist layer 8 is formed on the lower resist layer 5 whose surface is flattened via the second conductive layer 7 for plating, a substantially uniform film is formed over the entire area. As a result of having the thickness, local overexposure does not occur, and the periphery of the patterned opening 8a cannot spread outward greatly.

After that, as shown in FIG. 4B, the opening 8a formed in the upper resist layer 8 is completely filled by a metal plating process using Au or the like, and then the lower resist layer 5, When unnecessary portions of the conductive layers 4 and 7 for plating and the upper resist layer 8 are removed, the air bridge B as shown in FIG. 4C is formed. The post P of the air bridge B is composed of the plated metal 6 in which the opening 5a of the lower resist layer 5 is backfilled.

At this time, acetone is used for the upper resist layer 8 and unnecessary portions of the second conductive layer 7 for plating are removed by ion etching or wet etching, and the lower resist layer 3 is acetone or ashing. As described above, the unnecessary portion of the first electroconductive layer 4 for plating is removed by wet etching. The thickness of Au forming the first electroconductive layer 4 for plating is 4
On the other hand, since each part of the air bridge B made of Au has a thickness of about 2 μm while the thickness is 00Å, the thickness hardly changes even by wet etching. In addition, the thickness of the conductive layer 4 for plating 10
A low concentration of hydrofluoric nitric acid is used for etching Ti which is set to 0 Å. However, when the underlying insulating film is the nitride film 3 (SiNx), the etching rate of Ti is larger, so The nitride film 3 is less likely to be affected by the etching.

[0018]

As described above, according to the air bridge forming method of the present invention, the opening of the lower resist layer provided for forming the posts of the air bridge is backfilled with metal plating treatment. Since the surface of the resist layer is flattened, the upper resist layer formed on the lower resist layer has a substantially uniform film thickness over the entire area, and the exposure conditions are greatly improved. ing. Therefore, even if the upper resist layer is exposed, local overexposure does not occur in the thin film portion, and the periphery of the patterned opening is tapered and spreads outward greatly. It cannot happen. As a result, it is possible to effectively prevent the side surface of the air bridge from protruding outward as in the conventional example.
The effect that the miniaturization of the air bridge can be easily realized is obtained.

[Brief description of drawings]

FIG. 1 is a process sectional view showing a first process group of an air bridge forming method according to an embodiment.

FIG. 2 is a process sectional view showing a second process group of the air bridge forming method according to the embodiment.

FIG. 3 is a process sectional view showing a third process group of the air bridge forming method according to the present embodiment.

FIG. 4 is a process sectional view showing a fourth process group of the air bridge forming method according to the embodiment.

FIG. 5 is a process sectional view showing a first process group of an air bridge forming method according to a conventional example.

FIG. 6 is a process sectional view showing a second process group of an air bridge forming method according to a conventional example.

FIG. 7 is a process sectional view showing a third process group of an air bridge forming method according to a conventional example.

[Explanation of symbols]

 5 Lower resist layer 5a Opening B Air bridge P Post

Claims (1)

[Claims] 1. An air bridge (B) on the resist layer (5).
Forming an opening (5a) for forming the post (P), and filling the opening (5a) with a metal plating process to flatten the surface of the resist layer (5). A method for forming an air bridge in a compound semiconductor device, comprising: