JPH05175114A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH05175114A
JPH05175114A JP34268291A JP34268291A JPH05175114A JP H05175114 A JPH05175114 A JP H05175114A JP 34268291 A JP34268291 A JP 34268291A JP 34268291 A JP34268291 A JP 34268291A JP H05175114 A JPH05175114 A JP H05175114A
Authority
JP
Japan
Prior art keywords
film
pattern
coating film
substrate
high temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP34268291A
Other languages
Japanese (ja)
Inventor
Yoshio Tate
良男 舘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Original Assignee
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Semiconductor Manufacturing Co Ltd, Kansai Nippon Electric Co Ltd filed Critical Renesas Semiconductor Manufacturing Co Ltd
Priority to JP34268291A priority Critical patent/JPH05175114A/en
Publication of JPH05175114A publication Critical patent/JPH05175114A/en
Pending legal-status Critical Current

Links

Landscapes

  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To prevent skirting of a coating film and to suppress an irregularity in a size of a pattern in a lithographic step of forming the pattern by using a photosensitive coating film. CONSTITUTION:After the steps of (A) coating, (B) exposing and (C) developing a positive photosensitive film are conducted as prior art, only a substrate is wafer-cooled in a high temperature atmosphere thereby to set a temperature difference in a thickness direction of the film 3 (D). As a result, a high temperature region of the film is cured by irradiating with a UV to be solidified, a skirted part of the substrate is further exposed to be easily dissolved by developing. Thus, a photosensitive film pattern having no skirt can be formed (E).

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、感光塗布膜を用いてパ
ターンを形成する際に、その寸法精度を向上することが
可能な半導体装置の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device capable of improving dimensional accuracy when forming a pattern using a photosensitive coating film.

【0002】[0002]

【従来の技術】従来、パターンを形成するには、感光性
の塗布膜を用いて紫外光照射部分と未照射部分での性質
差を利用するリソグラフィ技術が用いられていた。
2. Description of the Related Art Hitherto, in order to form a pattern, a lithographic technique has been used in which a photosensitive coating film is used to make use of a difference in properties between a portion irradiated with ultraviolet light and a portion not irradiated with ultraviolet light.

【0003】例えば、図2に各工程の断面図として示す
ように基板1上に形成した被エッチング膜2上にポジ感
光塗布膜3を塗布し(A)、パターンを形成したマスク
4を介して紫外光を照射すると、マスク開口部に対応し
て紫外光が照射された部分の塗布膜3の性質が変化する
(B)。そこで、現像処理を行うと未露光の部分3Dが
残る。
For example, as shown in FIG. 2 as a cross-sectional view of each step, a positive photosensitive coating film 3 is coated on a film 2 to be etched formed on a substrate 1 (A), and a mask 4 having a pattern is formed therebetween. When the ultraviolet light is irradiated, the property of the coating film 3 in the portion irradiated with the ultraviolet light changes corresponding to the mask opening (B). Therefore, when the developing process is performed, the unexposed portion 3D remains.

【0004】[0004]

【発明が解決しようとする課題】ところで、上述のリソ
グラフィ技術においては、未露光,露光部分の境界にお
いて、感光良否があいまいになる領域があり、一般的に
塗布膜が図2(C)のように、すそ3Eを引いた形にな
ることで、所望の寸法と若干異なった値が得られる。こ
の部分は微妙な環境の変化や場所によりすその引き方が
異なるため、寸法ばらつきの原因となっていた。
By the way, in the above-mentioned lithographic technique, there is a region where the pass / fail of the photosensitivity is vague at the boundary between the unexposed and exposed portions. Generally, the coating film is as shown in FIG. In addition, a value slightly different from the desired dimension can be obtained by the shape obtained by subtracting the skirt 3E. This part causes dimensional variations because the method of pulling the soot differs depending on the subtle changes in the environment and the location.

【0005】[0005]

【課題を解決するための手段】本発明は、ポジ感光塗布
膜を用いるリソグラフィ技術において、一旦形成された
パターンを再度適当な雰囲気温度中で基板を冷却して再
度全面露光し、現像する方法である。
The present invention relates to a lithographic technique using a positive photosensitive coating film, in which a pattern once formed is cooled again in an appropriate ambient temperature and the entire surface is exposed again and developed. is there.

【0006】[0006]

【作用】上記の方法によると、基板付近の塗布膜は低温
で二度の露光を行うことで十分に除去しやすくなり、す
そ引きをなくすことができる。逆に上部の塗布膜は、高
温中でUV照射し、引き締められて硬化するため、二度
目の現像でも減少しない。
According to the above method, the coating film in the vicinity of the substrate can be sufficiently removed by performing two exposures at a low temperature, and the tailing can be eliminated. On the contrary, the coating film on the upper side is irradiated with UV at a high temperature and is tightened and hardened, so that it does not decrease even in the second development.

【0007】[0007]

【実施例】以下、本発明について図面を参照して説明す
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings.

【0008】図1はこの発明の工程フローチャートであ
る。従来と同じ部分には同一符号を付して説明を略す。
通常どおり塗布された塗布膜3を露光した後、基板が露
出し始めるまで現像を行う(A〜C)。この後ウェーハ
を冷却できるプレート5に載せ、雰囲気を170〜18
0℃まで上昇させる。この状態で再度全面にUV照射を
行うと、高温部分3Cは硬化して現像で溶けなくなると
ともに、基板側3Bは強制冷却して常温に維持すること
でオーバー露光を行う(D)。これを再度現像すること
により、塗布膜のすそ引きのないパターン形成が可能で
ある(E)。
FIG. 1 is a process flow chart of the present invention. The same parts as the conventional ones are designated by the same reference numerals and the description thereof is omitted.
After exposing the coating film 3 applied as usual, development is performed until the substrate starts to be exposed (AC). After that, the wafer is placed on a plate 5 that can be cooled and the atmosphere is changed to 170 to 18
Raise to 0 ° C. When UV irradiation is performed again on the entire surface in this state, the high temperature portion 3C is hardened and becomes insoluble during development, and the substrate side 3B is forcibly cooled and kept at room temperature to perform overexposure (D). By developing this again, it is possible to form a pattern without trailing of the coating film (E).

【0009】[0009]

【発明の効果】以上説明したように、本発明は現像後高
温雰囲気と基板冷却を適当に実施して再度全面露光を行
うことにより、塗布膜のすそ引きをなくし寸法精度を向
上することができる。
As described above, according to the present invention, the tailing of the coating film can be eliminated and the dimensional accuracy can be improved by appropriately performing the high temperature atmosphere and the substrate cooling after the development and performing the whole surface exposure again. .

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明のパターン形成方法の各工程の断面図FIG. 1 is a sectional view of each step of a pattern forming method of the present invention.

【図2】 従来の方法の各工程の断面図FIG. 2 is a sectional view of each step of a conventional method.

【符号の説明】[Explanation of symbols]

1 シリコン基板 2 シリコン酸化膜(被エッチング膜) 3 ポジ感光塗布膜 3B 基板側塗布膜 3C キュアされた塗布膜(高温部分) 3D すそ引きのある塗布膜 5 ウェーハ冷却テーブル 1 Silicon substrate 2 Silicon oxide film (film to be etched) 3 Positive photosensitive coating film 3B Substrate side coating film 3C Cured coating film (high temperature part) 3D Coating film with tail 5 Wafer cooling table

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】ポジ感光塗布膜を用いてパターンを形成す
る際に、一旦パターンを形成した後、高温雰囲気中で基
板を冷却してポジ感光膜に温度傾斜をもたせ再度全面露
光し、現像することを特徴とする半導体装置の製造方
法。
1. When forming a pattern using a positive photosensitive coating film, after the pattern is once formed, the substrate is cooled in a high temperature atmosphere, the positive photosensitive film is given a temperature gradient, and the whole surface is exposed again and developed. A method of manufacturing a semiconductor device, comprising:
【請求項2】前記高温雰囲気は170〜180℃であ
り、冷却された基板の温度が常温である請求項1記載の
半導体装置の製造方法。
2. The method of manufacturing a semiconductor device according to claim 1, wherein the high temperature atmosphere is 170 to 180 ° C., and the temperature of the cooled substrate is room temperature.
JP34268291A 1991-12-25 1991-12-25 Manufacture of semiconductor device Pending JPH05175114A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP34268291A JPH05175114A (en) 1991-12-25 1991-12-25 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34268291A JPH05175114A (en) 1991-12-25 1991-12-25 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH05175114A true JPH05175114A (en) 1993-07-13

Family

ID=18355683

Family Applications (1)

Application Number Title Priority Date Filing Date
JP34268291A Pending JPH05175114A (en) 1991-12-25 1991-12-25 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH05175114A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018194608A (en) * 2017-05-15 2018-12-06 東京エレクトロン株式会社 Substrate treatment system, substrate treatment method, program and information storage medium

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018194608A (en) * 2017-05-15 2018-12-06 東京エレクトロン株式会社 Substrate treatment system, substrate treatment method, program and information storage medium
JP2021152685A (en) * 2017-05-15 2021-09-30 東京エレクトロン株式会社 Substrate processing system, substrate processing method, program and information storage medium

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