JPH0425114A - Resist pattern forming method - Google Patents
Resist pattern forming methodInfo
- Publication number
- JPH0425114A JPH0425114A JP13068090A JP13068090A JPH0425114A JP H0425114 A JPH0425114 A JP H0425114A JP 13068090 A JP13068090 A JP 13068090A JP 13068090 A JP13068090 A JP 13068090A JP H0425114 A JPH0425114 A JP H0425114A
- Authority
- JP
- Japan
- Prior art keywords
- resist
- pattern
- film
- resist pattern
- ultraviolet rays
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 23
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 11
- 239000004065 semiconductor Substances 0.000 claims abstract description 11
- 230000001678 irradiating effect Effects 0.000 claims description 5
- 238000010438 heat treatment Methods 0.000 claims description 2
- 239000003504 photosensitizing agent Substances 0.000 abstract description 5
- 238000005886 esterification reaction Methods 0.000 abstract description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract 2
- 229910052760 oxygen Inorganic materials 0.000 abstract 2
- 239000001301 oxygen Substances 0.000 abstract 2
- 230000007423 decrease Effects 0.000 abstract 1
- 239000010408 film Substances 0.000 description 20
- QVEIBLDXZNGPHR-UHFFFAOYSA-N naphthalene-1,4-dione;diazide Chemical compound [N-]=[N+]=[N-].[N-]=[N+]=[N-].C1=CC=C2C(=O)C=CC(=O)C2=C1 QVEIBLDXZNGPHR-UHFFFAOYSA-N 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- YRAJNWYBUCUFBD-UHFFFAOYSA-N 2,2,6,6-tetramethylheptane-3,5-dione Chemical compound CC(C)(C)C(=O)CC(=O)C(C)(C)C YRAJNWYBUCUFBD-UHFFFAOYSA-N 0.000 description 1
- 150000001732 carboxylic acid derivatives Chemical class 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229920003986 novolac Polymers 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Landscapes
- Photosensitive Polymer And Photoresist Processing (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、レジストパターン形成方法に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a resist pattern forming method.
従来の技術
従来のレジストパターン形成方法を第３図に示す。第３
図（ａ）において、シリコンウェハー等の半導体基板１
の表面に、ノボラック樹脂と感光剤（オルソキノンジア
ジド）の混合物であるボン型レジストを塗布、加熱（９
０８Ｃ〜１００°Ｃ）してレジスト膜２を形成する。次
に、第３図（ｂ）のように半導体基板１上のレンス１−
膜２に、縮小投影露光装置を用い、マスク３を介し、紫
外光４を照射する。次に、第３図ＦＣ＋のように現像を
行うことにより、半導体基板］」二のレジスト膜２の紫
外光４が照射されている部分だけ除去され、未露光部が
残りレジストパターン５が形成されるというものであっ
た。この方法においては、露光量の深さ方向に沿った勾
配と、未露光部側壁の現像液に対する膜減り量の深さ方
向に沿った勾配が重なるため、現像後得られたレンスト
プロファイルは台形状のものになる。第２図に台形状に
なったレジストパターンを示す。そのレジストパターン
７の半導体基板１に対する傾きは、８０〜８５°の角度
θを持つ。BACKGROUND OF THE INVENTION A conventional resist pattern forming method is shown in FIG. Third
In figure (a), a semiconductor substrate 1 such as a silicon wafer
On the surface of
08C to 100C) to form a resist film 2. Next, as shown in FIG. 3(b), the lens 1-
The film 2 is irradiated with ultraviolet light 4 through a mask 3 using a reduction projection exposure device. Next, by performing development as shown in FIG. 3FC+, only the portion of the resist film 2 of the semiconductor substrate 2 that is irradiated with the ultraviolet light 4 is removed, leaving an unexposed portion and forming a resist pattern 5. It was said that In this method, the slope of the exposure amount along the depth direction overlaps with the slope of the film loss amount along the depth direction of the side wall of the unexposed area due to the developer, so the length profile obtained after development is trapezoidal. become the property of FIG. 2 shows a trapezoidal resist pattern. The inclination of the resist pattern 7 with respect to the semiconductor substrate 1 has an angle θ of 80 to 85 degrees.
なお、単層レジスト法にかわる高解像度プロセスとして
多層レジスト法や ＣＥ Ｌ （ＣｏｎｔｒａｓｔＥ
ｎｈａｎｃｅｄ Ｌ ｉｔｈｏｇｕｒａｐｈｙ）法が
検討されている。In addition, multilayer resist method and CE L (ContrastE
Enhanced Lithography) methods are being considered.
発明か解決しようとする課題
Ｌ Ｓ Ｉの製造プロセスは、ンリコン基板上における
薄膜の形成およびそれらのエツチング等からなり、プロ
セスが進むにつれて、基板表面はパターンの刻まれた段
差のある形状になる。段差のある基板面上でレジストの
塗布、露光、現像を行い、レジストパターンを形成する
と、プロファイルは、段差の上下で変化する。また、高
反射基板にパターニングする場合、ハレーションを押さ
えるために染料入りのレジストを使用するが、この場合
のレジストプロファイルは、第２図に示す角度θの値が
低くなる。つまり、良好な微細レジストパターンを形成
することができなかった。また、多層レジスト法やＣＥ
Ｌ法では、工程が複雑化するばかりでなく、安定性にも
乏しく、量産化を図る面で解決すべき問題が残されてい
た。PROBLEM TO BE SOLVED BY THE INVENTION The manufacturing process of an LSI consists of forming thin films on a silicon substrate and etching them, and as the process progresses, the surface of the substrate becomes patterned and stepped. When a resist pattern is formed by coating, exposing, and developing a resist on a substrate surface with a step, the profile changes above and below the step. Further, when patterning a highly reflective substrate, a dye-containing resist is used to suppress halation, but the resist profile in this case has a low value of the angle θ shown in FIG. In other words, it was not possible to form a good fine resist pattern. In addition, multilayer resist method and CE
The L method not only complicates the process but also lacks stability, leaving problems to be solved in terms of mass production.
本発明は、このような問題点を解決するためのもので、
良好な形状を有し、段差の」−下でパターン寸法の変化
が小さいＩ／ンストパターンの形成方法を提供するもの
である。The present invention is intended to solve these problems,
The present invention provides a method for forming an I/inst pattern that has a good shape and has a small change in pattern dimension under a step.
課題を解決するための手段
本発明のレジストパターン形成方法は、半導体基板の面
」二にホトレジスト膜を塗布する工程と、ホトレジスト
膜上にマスク上のパターンに従い紫外光を選択的に照射
する工程と、レジスト膜の紫外露光されている部分とさ
れていない部分とを同時に赤外光で、１００〜１３０℃
になるまで表面加熱後、全面に紫外光（波長−２５０ｎ
ｍ〜４．５０ｎｍ）を照射する工程と、レジスト膜の紫
外露光されている部分を除去する工程を備えたものであ
る。Means for Solving the Problems The resist pattern forming method of the present invention comprises a step of applying a photoresist film to the surface of a semiconductor substrate, and a step of selectively irradiating the photoresist film with ultraviolet light according to a pattern on a mask. , UV-exposed and unexposed parts of the resist film are simultaneously exposed to infrared light at 100 to 130°C.
After heating the surface until
The method includes the steps of irradiating the resist film with ultraviolet light (m to 4.50 nm) and removing the portion of the resist film that has been exposed to ultraviolet light.
作用
紫外露光した後、酸素のない雰囲気中でホトレジスト表
面を赤外光で加熱しながら、紫外光を照射すると次のよ
うな減少が起こる。After UV exposure, the photoresist surface is irradiated with UV light while being heated with infrared light in an oxygen-free atmosphere, resulting in the following reduction.
レジスト膜内で温度分布が起こり、また紫外光を照射す
ることで、レジストの樹脂と感光剤（ナフトキノンジア
ジド）との間でエステル化反応が起こる。その結果、現
象液に対する溶液速度はレジストの上層部はど小さくな
り、現象後のパタンの側壁と基盤とになす角度θは９０
°に近くなる。このため、レジストパターンが段差を横
切る場合の線幅変動は、通常の単層レジスト法に比べて
小さくなる。Temperature distribution occurs within the resist film and irradiation with ultraviolet light causes an esterification reaction between the resist resin and the photosensitizer (naphthoquinone diazide). As a result, the solution velocity with respect to the phenomenon liquid becomes smaller in the upper layer of the resist, and the angle θ between the side wall of the pattern and the substrate after the phenomenon is 90°.
Close to °. Therefore, line width fluctuations when the resist pattern crosses a step are smaller than in a normal single-layer resist method.
実施例 本発明の一実施例を第１図を用いて説明する。Example An embodiment of the present invention will be described with reference to FIG.
第１図は、本発明のレジストパターン形成方法の工程図
である。FIG. 1 is a process diagram of the resist pattern forming method of the present invention.
第１図（ａ）は、シリコンウェハー等の半導体基板１の
表面に、ノボラック樹脂と感光剤（ナフトキノンジアジ
ド）の混合物であるポジ型レジストを塗布、加熱（９０
〜１００℃）してレジスト膜２を形成する。第１図（ｂ
ｌは、半導体基板１上のレジスト膜２に、縮小投影露光
装置を用い、マスク３を介して紫外光４を照射する。第
１図（Ｃ１は、ここで１ノジスト２ａは露光部分であり
、２ｂは未露光部分である。レジスト膜の露光部２ａの
レジスト膜の感光剤（ナフトキノンジアジド）がカルボ
ン酸に変化している。一方、レジスト膜の未露光部２
ｂではこのような変化は生じない。次に、酸素のない雰
囲気下で赤外光７を照射する。赤外光７でレジスト表面
温度を１００〜１３０℃の範囲に加熱し紫外光６を照射
する。このときの紫外光の波長は、２５０ｎｍ〜４．５
０ ｎ ｍの範囲の波長である。この時、レジスト膜内
で温度変化が生じ、紫外光６によりレジスト表面近傍で
レジストの樹脂と感光剤（ナフトキノンジアジド）の間
でエステル化反応が起こる。第１図（ｄｉは現像を行っ
てレジストパターンを形成したところである。現像液に
対する溶解度がレジストの深さ方向にある勾配をもって
起こる。現像液は、」１記ホトレジストに対して効果的
な現像液（例えば、ＴＭＨＤ２．３８％）を使用する。In FIG. 1(a), a positive resist, which is a mixture of a novolac resin and a photosensitizer (naphthoquinone diazide), is coated on the surface of a semiconductor substrate 1 such as a silicon wafer, and heated (90°C).
~100°C) to form a resist film 2. Figure 1 (b
1 irradiates a resist film 2 on a semiconductor substrate 1 with ultraviolet light 4 through a mask 3 using a reduction projection exposure apparatus. FIG. 1 (C1 is 1 Nodist 2a is the exposed part and 2b is the unexposed part. The photosensitizer (naphthoquinonediazide) of the resist film in the exposed part 2a of the resist film has changed to carboxylic acid. On the other hand, the unexposed part 2 of the resist film
No such change occurs in case b. Next, infrared light 7 is irradiated in an oxygen-free atmosphere. The resist surface temperature is heated to a range of 100 to 130° C. with infrared light 7 and ultraviolet light 6 is irradiated. The wavelength of the ultraviolet light at this time is 250 nm to 4.5 nm.
The wavelength is in the range of 0 nm. At this time, a temperature change occurs within the resist film, and an esterification reaction occurs between the resist resin and the photosensitizer (naphthoquinone diazide) near the resist surface due to the ultraviolet light 6. Figure 1 (di is the point where a resist pattern has been formed by development. The solubility in the developer occurs with a certain gradient in the depth direction of the resist. The developer is a developer effective for the photoresist described in 1. (for example, TMHD 2.38%).
半導体基板１上のレジスト膜２の紫外光４が照射されて
いる部分だけが除去され、未露光部分だけか残される。Only the portion of the resist film 2 on the semiconductor substrate 1 that is irradiated with the ultraviolet light 4 is removed, leaving only the unexposed portion.
上記実施例では、現像後のパターンの側壁と基板とがな
す角度θは９０°になる。In the above embodiment, the angle θ between the side wall of the pattern after development and the substrate is 90°.
発明の効果
本発明によれば、高コントラストのレジストパターンを
形成することが可能であり、半導体装置の量産技術とし
て、工業的価値が高い。Effects of the Invention According to the present invention, it is possible to form a resist pattern with high contrast, and it has high industrial value as a technology for mass production of semiconductor devices.
第１図は本発明の一実施例におけるレジストパターン形
成方法の工程図、第２図は基板に対するレジストパター
ンの断面図、第３図は従来のレジストパターン形成方法
の工程図である。
１・・・・・・半導体基板、２・・・・・・レジスト膜
、２ａ・・・・・・レジスト膜の露光部、２ｂ・・・・
・・ホトレジスト膜の未露光部、３・・・・・・マスク
、４・・・・・・紫外光、５・・・・・赤外光、６・・
・・・・紫外光、７・・・・・・レジストパターン。
代理人の氏名 弁理士 粟野重孝 ほか１名区
１服
さ
ｈ ＮｃＰ）＋ さ
区
Ｏつ
ｍ８
塚FIG. 1 is a process diagram of a resist pattern forming method according to an embodiment of the present invention, FIG. 2 is a sectional view of a resist pattern on a substrate, and FIG. 3 is a process diagram of a conventional resist pattern forming method. DESCRIPTION OF SYMBOLS 1...Semiconductor substrate, 2...Resist film, 2a...Exposed portion of resist film, 2b...
...Unexposed area of photoresist film, 3...Mask, 4...Ultraviolet light, 5...Infrared light, 6...
...Ultraviolet light, 7...Resist pattern. Name of agent: Patent attorney Shigetaka Awano and 1 other person
Claims (2)
前記ホトレジスト上に近紫外光を選択的に照射する工程
と、前記ホトレジストの表面を１００℃〜１３０℃に赤
外光で加熱しながら紫外光を照射する工程と、前記ホト
レジストの前記近紫外光が照射されている領域を除去す
る工程を備えたことを特徴とするレジストパターン形成
方法。(1) A step of applying photoresist on the semiconductor substrate,
selectively irradiating near-ultraviolet light onto the photoresist; irradiating the surface of the photoresist with ultraviolet light while heating it to 100°C to 130°C with infrared light; and irradiating the photoresist with near-ultraviolet light. A method for forming a resist pattern, comprising a step of removing an irradiated area.
２５０ｎｍ〜４５０ｎｍであることを特徴とするレジス
トパターン形成方法。(2) A method for forming a resist pattern, characterized in that the wavelength of the ultraviolet light described in claim 1 is from 250 nm to 450 nm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13068090A JPH0425114A (en) | 1990-05-21 | 1990-05-21 | Resist pattern forming method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13068090A JPH0425114A (en) | 1990-05-21 | 1990-05-21 | Resist pattern forming method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0425114A true JPH0425114A (en) | 1992-01-28 |
Family
ID=15040048
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13068090A Pending JPH0425114A (en) | 1990-05-21 | 1990-05-21 | Resist pattern forming method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0425114A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6852653B2 (en) * | 2000-10-16 | 2005-02-08 | Seiko Epson Corporation | Method of manufacturing semiconductor substrate, semiconductor substrate, electro-optical apparatus and electronic equipment |
| JP2008094066A (en) * | 2006-10-16 | 2008-04-24 | Hokkaido Univ | Ferrite containing ceramic object and its manufacturing process |
-
1990
- 1990-05-21 JP JP13068090A patent/JPH0425114A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6852653B2 (en) * | 2000-10-16 | 2005-02-08 | Seiko Epson Corporation | Method of manufacturing semiconductor substrate, semiconductor substrate, electro-optical apparatus and electronic equipment |
| JP2008094066A (en) * | 2006-10-16 | 2008-04-24 | Hokkaido Univ | Ferrite containing ceramic object and its manufacturing process |
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