JPH05173755A - Image output device - Google Patents

Abstract

PURPOSE:To output images according to dot sequential image data by outputting the images according to respective color signals stored in the respective storage regions of a memory means. CONSTITUTION:A demultiplexer 12 decodes a code transmitted from the ternary counter of a buffer number setting part 11 and outputs a write enable signal WE or a read enable signal OE to an image buffer corresponding to the code. In this case, an image buffer 12 is functioned as a 0th plane, for example, and stores color data in red (R) transmitted through a data bus. On the other hand, an image buffer 14 is functioned as the 1st plane, for example, and stores color data in green (G) transmitted through the data bus. Further, an image buffer 15 is functioned as the 2nd plane and stores color data in blue (B). Next, D/A converters 16, 17 and 18 convert the respective color data to analog signals and output them to an image display part.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image output device such as a display device capable of displaying a color image or a color printer device capable of printing.

[0002]

2. Description of the Related Art Conventionally, in a display device for displaying an image, the image to be displayed is arranged in color signals for each screen (frame sequential image data), that is, R, G, B color data is written for each plane. It had to be something that This is because the display controller reads R, G, and B color data at the same time, and therefore an image buffer is prepared for each color data in advance.

Similarly, in a color printer device,
An image buffer is prepared for each of Y, M, and C in order to print with a line or plane for each color data of Y, M, and C.

However, in the case of the above-mentioned image output device, although frame sequential image data can be written, for example, R, G, B, R, G, B (or Y, M, C,
The image data (dot-sequential image data) of the pixel-based color signals arranged in the order of Y, M, C) cannot be directly written in each image buffer. In this case, it is necessary to once convert the dot-sequential image data into field-sequential image data.

As described above, a large amount of dot-sequential image data is handled for image processing, and despite the increasing demand for display by dot-sequential image data, display by dot-sequential image data is not possible. The work for conversion into frame sequential image data was required. For this reason, there are drawbacks such as requiring a lot of processing time and requiring a large memory for work.

[0006]

As described above, in the prior art, since display by dot-sequential image data requires conversion to frame-sequential image data, a lot of processing time is required and a work-use image is displayed. There were drawbacks such as requiring a large memory.

Therefore, an object of the present invention is to provide an image output device capable of writing dot-sequential image data in each image buffer as it is and capable of outputting an image by the dot-sequential image data.

[0008]

In order to achieve the above object, in the image output apparatus of the present invention, the color signals are switched for each screen and stored in each storage area of the memory means, and this memory is also used. In the one for outputting an image by each color signal stored in each storage area of the means, there is provided control means for automatically distributing the color signal of each pixel unit of the image data to each storage area of the memory means. It is configured to be provided.

Further, in the image output device of the present invention, a memory means for storing image data for each color signal in screen units, and an output means for outputting an image by each color signal stored in the memory means. , First control means for sequentially switching the storage area in the memory means by color signals in screen units, and second control means for sequentially switching the storage area in the memory means in accordance with color signals in pixel units. ing.

Further, in the image output device of the present invention, three image buffers for storing image data for each color signal of each screen and a selection number of this image buffer can be loaded, and the image buffer can be loaded once into the image buffer. A ternary counter for enabling the count of the pulse for one clock generated by the access of the above, and a setting means for setting the ternary counter to the count state or the register state holding the loaded selection number, When the image data to be stored in the image buffer is frame sequential data, the setting means sets the ternary counter in a register state, and the image buffer selected by the output of the ternary counter is displayed in screen units. The color signal is written, and in the case of dot-sequential data, the ternary counter is set to the counting state, While distributing the advance counter color signals in units of pixels for each image buffer which is switched in the order by the output of which is a write useless configuration.

[0011]

According to the present invention, the color data of the dot-sequential image data can be automatically distributed to the image buffers by the above-mentioned means, so that the trouble of conversion to the frame-sequential image data can be eliminated. It is a thing.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a schematic configuration of a display device according to the present invention.

That is, this display device has a buffer number setting unit 11, a demultiplexer 12, and image buffers (VRAM) 13, 14, 1 as planes.
5, D / A converters 16, 17, 18 and a data bus (DATA BUS). The buffer number setting unit 11 is composed of a register 11a and a ternary counter 11b, as shown in FIG. 2, for example.

The register 11a is a data bus (DATA
Image data mode (MODE) sent from a CPU (not shown) via the BUS), that is, 1/0 signal indicating whether it is frame sequential image data or dot sequential image data, and the image buffer 13 , 14 and 15 for selecting one of the image buffer numbers.

The ternary counter 11b functions as a counter or a register depending on the mode. That is, if the mode is "1", both LD and ENP of the inputs become "1", and the ternary counter 11
b operates as a counter. In this case, that is, in the counter mode, the counting operation is executed only when the signal CNTEN is input.
Then, for each counting operation, for example, "00",
Codes of "01" and "10" are VRAMNUM0,
It is generated from 1. Note that the signal CNTE
N is a pulse generated by reading / writing to the image buffer.

On the other hand, if the mode is "0", the ternary counter 11b operates as a register by loading the image buffer number set in the register 11a every clock (CLK). In this case,
The code corresponding to the above image buffer number is VRA
It will be generated from MNUM0,1.

The demultiplexer 12 decodes the code sent from the ternary counter 11b of the buffer number setting section 11 and outputs the write enable signal WE or the read enable signal OE to the image buffer corresponding to the code. It is output. The image buffer 13
For example, it functions as a 0th plane and stores red (R) color data sent via the data bus. The image buffer 14 functions as, for example, the first plane, and receives the green (G) data sent via the data bus.
The color data of is stored. Image buffer 15
Functions as a second plane, for example, and stores blue (B) color data sent via the data bus.

The D / A converters 16, 17 and 18 convert the color data stored in the image buffers 13, 14 and 15 into analog signals and output them to an image display unit (not shown).

The data bus is connected to each of the image buffers 13 and 1.
The data to be stored at 4, 15 or the data read from the image buffers 13, 14, 15 are transferred. Next, the operation of the above configuration will be described. FIG. 3 shows the write operation in the mode “1”, that is, the counter mode.

For example, it is now assumed that the counter mode is designated according to the operator or the program.
Then, the register 11a in the buffer number setting unit 11
The mode "1" and the code number of the image buffer 13 for selecting the 0th plane are set in the.

In this case, the code of VRAMNUM0,1 of the ternary counter 11b is "0" by the mode "1".
It becomes "0". As a result, the WE signal (R-
WE) is output. As a result, R is stored in the image buffer 13.
Color data is written.

Thereafter, the signal CNTEN is supplied for one clock in response to the rising edges of the signals RAS and CAS. Then, by incrementing the value of the ternary counter 11b by 1, the code given to VRAMNUM0, 1 of the ternary counter 11b becomes "01". As a result, the demultiplexer 12 outputs the WE signal (G-WE) that permits writing to the first plane. As a result, this time, G is added to the image buffer 14.
Color data is written.

When the writing of the B color data to the second plane is completed in this way, the code is returned to "00" in the next count up. Then, writing of data is repeated again from the 0th plane.

In this way, each image buffer 13, 14,
By allocating the data to be written to 15 in the order of R, G, B, for example, only the R color data for the 0th plane, only the G color data for the first plane, and the second Only the B color data can be selectively written on the plane. That is, R, G,
Each of the image buffers 13, 14, 15 of dot-sequential image data read for each pixel like B, R, G, B ,.
Can be directly written to. FIG. 4 shows the write operation in the mode “0”, that is, the register mode.

For example, it is now assumed that the register mode is designated according to an operator or a program.
Then, the register 11a in the buffer number setting unit 11
The mode "0" and the code number of the image buffer for selecting a predetermined plane are set in the.

In this case, the mode "0" causes the LD input to the ternary counter 11b to be "0". As a result, the code number of the image buffer set in the register 11a is loaded into the ternary counter 11b every time a clock is input.

From the ternary counter 11b, the code number of the loaded image buffer is directly stored in the VRAM.
It is output as a code to NUM0,1. For example,
Assuming that the code number “01” of the image buffer 14 that selects the first plane is set, the demultiplexer 12 outputs the WE signal (G-WE) that permits writing to the first plane. As a result, all of the G color data is continuously written in the image buffer 14.

In this way, by writing in units of color data to each plane, writing of frame sequential image data in each of the image buffers 13, 14 and 15 can be performed as in the conventional case. As described above, each color data of the dot-sequential image data can be automatically distributed to each image buffer.

That is, in the case of frame sequential image data,
By loading the number of the specified image buffer into the counter and holding it in the counter, it is possible to continuously write data to the specified image buffer, and
In the case of dot-sequential image data, the counter is incremented each time data is written, and the data is written while sequentially switching the image buffer.
As a result, even when the dot-sequential image data is written, it is possible to directly write the data without converting it into the surface-sequential image data. Therefore, it is possible to reduce the burden on the CPU by converting the image data into frame sequential image data and to eliminate the need for a memory for work. Is.

In the above embodiment, the case of writing data in the image buffer has been described. However, the present invention is not limited to this, and the present invention can be applied to the case of reading out dot sequential image data stored in the image buffer. Further, the invention is not limited to a display device that displays a color image, but can be applied to various image output devices such as a color printer device. Of course, various modifications can be made without departing from the spirit of the invention.

[0031]

As described above in detail, according to the present invention, it is possible to provide the image output device capable of writing the dot-sequential image data as it is into each image buffer and outputting the image by the dot-sequential image data. ..

[Brief description of drawings]

FIG. 1 is a block diagram showing a main part of a display device according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a schematic configuration of a register unit.

FIG. 3 is a timing chart for explaining the operation of writing dot-sequential image data.

FIG. 4 is a timing chart for explaining an operation related to writing frame sequential image data.

[Explanation of symbols]

11 ... Buffer number setting unit, 11a ... Register, 11b
... ternary counter, 12 ... demultiplexer, 13, 1
4, 15 ... Image buffer, 16, 17, 18 ... D / A converter.

Continuation of front page (51) Int.Cl. ⁵ Identification code Office reference number FI Technical display area G09G 5/36 9177-5G

Claims (2)

[Claims] 1. A memory means for storing image data for each color signal, an output means for outputting an image by each color signal stored in the memory means, and a storage area in the memory means for displaying color signals in screen units. An image output device comprising: a first control unit for switching and a second control unit for sequentially switching a storage area in the memory unit according to a color signal of a pixel unit to be stored. 2. Image data is stored for each color signal 3
One image buffer, a ternary counter that is loaded with the selection number of this image buffer, and that counts one revolution during one clock period generated by one access to the image buffer, and this ternary counter is in a counting state. Or setting means for setting the loaded selection number in a register state for holding the selected number, and when the image data to be stored in the image buffer is data arranged in color signals for each screen, the setting means The ternary counter is set to a register state, color signals are written in screen units to the image buffer selected by the output of the ternary counter, and in the case of data arranged in color signals in pixel units, The ternary counter is set to the count state, and the data is output to each image buffer that is sequentially switched by the output of the ternary counter. An image output apparatus being characterized in that to be written while distributing the.