JPH05172908A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a semiconductor device which is mounted on a semiconductor integrated circuit, can easily recognize the working hour of the circuit, and can remarkably reduce the time required for analyzing the fault of the circuit. CONSTITUTION:A nonvolatile pulse counting means 1 which inputs clock pulses and counts the clock pulses in corresponding to the operating hour of a semiconductor integrated circuit 7, nonvolatile storing means 2 in which the information about the number of clock pulses counted by the means 1, and writing pulse generating means 3 which outputs writing pulses to the means 3 are mounted on one chip 8 together with the semiconductor integrated circuit 7.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to improvement of a semiconductor device in which a semiconductor integrated circuit is mounted on a chip. In particular, the semiconductor integrated circuit-equipped semiconductor device capable of easily knowing the operating time of the semiconductor integrated circuit, which is extremely important for failure analysis of the semiconductor integrated circuit, and can significantly reduce the time required for failure analysis of the semiconductor integrated circuit. Related to improvements intended to provide.

[0002]

2. Description of the Related Art In recent years, semiconductor integrated circuits have become increasingly sophisticated and the failure modes of semiconductor integrated circuits have become complicated.
Failure analysis is becoming more difficult.

For failure analysis, it is extremely important to know the operating time of a failed semiconductor integrated circuit. However, the conventional semiconductor device does not have means for ascertaining the operating time, and the information presented by the user side is not included. We had no choice but to estimate the operating time.

Therefore, in the prior art, for failure analysis of the semiconductor integrated circuit, reproduction experiments, simulations, investigation of the history of the semiconductor device on which the semiconductor integrated circuit is mounted, etc. are carried out, and the cause of the failure is the semiconductor integrated circuit. I had no choice but to consider whether it was in the circuit itself or in the operating environment.

[0005]

However, the information presented by the user is often insufficient to clearly indicate the operating time of the semiconductor integrated circuit. Therefore, it is difficult to grasp the operating time of the failed semiconductor integrated circuit in the conventional technique, and the above-mentioned reproduction experiment, simulation,
There is a drawback in that it takes a lot of time to conduct a failure analysis by conducting a history investigation of a semiconductor device.

An object of the present invention is to eliminate this drawback, the operating time of the semiconductor integrated circuit can be easily known, and the time required for failure analysis of the semiconductor integrated circuit can be greatly shortened. It is to provide a semiconductor device having an integrated circuit.

[0007]

SUMMARY OF THE INVENTION In the semiconductor device in which the semiconductor integrated circuit (7) is mounted in the chip (8), a clock pulse (12) is input and the above integrated circuit (7) is provided. Non-volatile pulse counting means (1) for counting the clock pulse (12) corresponding to the operating time of
A non-volatile storage means (2) in which the information (13) on the number of clock pulses counted by the pulse counting means (1) is written, and a write timing signal (14) output by the pulse counting means (1). In response to the above, a semiconductor device having a write pulse generating means (3) for outputting a write pulse (15) to the storage means (2).

In the above structure, when the integrated circuit (7) has a clock pulse generating means, the clock pulse (12) is the clock pulse generating means (4) in the integrated circuit (7). A clock pulse formed by can be used. Also, if desired, the clock pulse (12) can be formed based on the output of the self-oscillating means (5) provided in the chip (8). At this time, if desired, if the output of the self-oscillating means (5) is used after waveform shaping, the reliability is further improved.

[0009]

In the semiconductor device according to the present invention, in synchronization with the operation start of the semiconductor integrated circuit, the non-volatile pulse counting means mounted in the same chip starts counting the input clock pulses, and The pulse counting means stops counting the input clock pulses in synchronization with the stop of the operation of the circuit, and the information of the number of clock pulses counted by the pulse counting means indicates that the semiconductor integrated circuit stops operating. During the period, the information of the number of clock pulses which is transferred to the non-volatile storage means and counted is held. Since the cycle of the clock pulse is predetermined, the operating time of the semiconductor integrated circuit can be known from the counted number of clock pulses.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor device according to a second embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of the first embodiment (corresponding to claim 3). In FIG. 1, reference numeral 7 is a semiconductor integrated circuit mounted in a chip 8. Reference numeral 1 denotes a non-volatile pulse counting means which is mounted in the same chip 8 as the semiconductor integrated circuit 7 and counts the input clock pulse 12. Reference numeral 2 is a non-volatile storage means for storing the information 13 on the number of clock pulses counted by the pulse counting means 1. Reference numeral 3 is a write pulse generating means for outputting a write pulse to the storage means 2. Reference numeral 5 is a self-oscillating means (for example, a crystal oscillator) provided on the same chip 8 as the pulse counting means 1. Reference numeral 6 is a waveform shaping means for shaping the output of the self-oscillating means 5 to form a clock pulse 12. Reference numeral 11 is a control signal that causes the pulse counting means 1 to start or stop counting in synchronization with the start or stop of operation of the semiconductor integrated circuit 7. Reference numeral 14 is a write timing signal for instructing the timing of writing the clock pulse number information 13 into the storage means 2, and reference numeral 15 is a write pulse output from the write pulse generation means 3 in response to the write timing signal. ..

Next, the operation of this embodiment will be described.
When the power is turned on, the clock pulse number information stored in the non-volatile storage means 2 is transferred to the non-volatile pulse counting means 1. When the semiconductor integrated circuit 7 starts its operation, the control signal 11 synchronized with this is input to the pulse counting means 1, and the pulse counting means 1 takes in the clock pulse 12 and starts counting. At this time, the pulse counting means 1 starts from the number of clock pulses according to the information transferred from the storage means 2 when the power is turned on. When the semiconductor integrated circuit 7 stops its operation, the control signal 11 synchronized with this is input to the pulse counting means 1, and the pulse counting means 1 stops capturing the clock pulse 12 and stops counting. Next, the write timing signal 14 is output from the pulse counting means 1, and the write pulse generating means 3 outputs the write pulse 15 to the storage means 2 in response to this signal. By this write pulse 15, the information 13 on the number of clock pulses counted by the pulse counting means 1 is written in the storage means 2. After that, the above operation is repeated, and the number of clock pulses corresponding to the total operating time is stored in the storage means 2.

The information stored in the storage means 2 is not output from the terminal, and after the case enclosing the chip 8 is opened when the integrated circuit 7 fails, the stored information can be read only by probing. By doing so, the information stored in the storage means 2 can be used only for failure analysis by the manufacturer.

FIG. 2 is a block diagram of the second embodiment (corresponding to claim 2). In FIG. 2, reference numeral 4 is a clock pulse generating means in the semiconductor integrated circuit 7. The description of the other reference numerals is the same as that of the first embodiment and will not be repeated. The operation of the second embodiment is the same as that of the first embodiment except that the clock pulse 12 input to the nonvolatile pulse counting means 1 is supplied from the clock pulse generating means 4 described above.

[0015]

As described above, in the semiconductor device according to the present invention, the semiconductor integrated circuit is provided in the same chip,
A non-volatile pulse counting means for receiving a clock pulse and counting the clock pulse corresponding to the operating time of the integrated circuit, and a non-volatile storage means for writing information on the number of clock pulses counted by the pulse counting means The memory means is provided with a write pulse generating means for outputting a write pulse, and the clock pulse is supplied from, for example, the clock pulse generating means in the integrated circuit, or is provided on the same chip. Since it is supplied from the oscillating means, the operating time of the integrated circuit can be automatically measured and the measurement result can be held.

Therefore, the present invention provides a semiconductor device equipped with a semiconductor integrated circuit in which the operating time of the semiconductor integrated circuit can be easily known and the time required for failure analysis of the semiconductor integrated circuit can be greatly shortened. You can

[Brief description of drawings]

FIG. 1 is a configuration diagram of a semiconductor device according to a first exemplary embodiment of the present invention.

FIG. 2 is a configuration diagram of a semiconductor device according to a second embodiment of the invention.

[Explanation of symbols]

 1 Nonvolatile pulse counting means 2 Nonvolatile storage means 3 Writing pulse generating means 4 Clock pulse generating means 5 Self-oscillating means 6 Waveform shaping means 7 Semiconductor integrated circuit 8 Chip 11 Control signal 12 Clock pulse 13 Information on the number of clock pulses 14 Write timing signal 15 Write pulse

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Claims (4)

[Claims] 1. A semiconductor device in which a semiconductor integrated circuit (7) is mounted in a chip (8), wherein a clock pulse (12) is input to the integrated circuit (7).
A non-volatile pulse counting means (1) for counting the clock pulses (12) corresponding to the operating time of the non-volatile writing information (13) of the number of clock pulses counted by the pulse counting means (1) Storage means (2)
And write pulse generating means (3) for outputting a write pulse (15) to the storage means (2) in response to a write timing signal (14) output by the pulse counting means (1). A semiconductor device characterized by. 2. The semiconductor device according to claim 1, wherein the clock pulse (12) is generated by a clock pulse generating means (4) in the integrated circuit (7). 3. A semiconductor device according to claim 1, wherein the clock pulse (12) is formed based on an output of a self-oscillating means (5) provided in the chip (8). 4. The signal output from the self-oscillating means (5) is input to the pulse counting means (1) before being input to the pulse counting means (1).
The semiconductor device according to claim 2, wherein the waveform is shaped by a waveform shaping means (6).