JPH05167837A - False halftone processor - Google Patents

Abstract

PURPOSE:To generate a binary image signal in which blur of a line at a character part and the blurring of an edge can be reduced for an image in which the binary images of a continuous gradation image like a photography and a character, etc., are mixed with simple device constitution. CONSTITUTION:An addition value 11 of the weighted sum 17 of a binary error and an input image signal 10 in a peripheral picture element is limited by a limiter 4 to a value between a high level and a low level in a conventional error diffusion system. Furthermore, after the value is binarized and is set as an output binary image signal 13, binary output is multivalued to the high level or the low level based on a binarizing result, and an error 15 between limiter output and multivalue output is fed back. By performing such processing, the binary image signal goes to white when the density value of the input image signal is less than the low level, and it goes to black when it exceeds the high level, therefore, binarization can be performed without generating blur of the line and the blurring of the edge at the character part.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pseudo halftone processing device for binarizing a binary image such as an image having a continuous tone such as a photograph or a character.

[0002]

2. Description of the Related Art An error diffusion method (Error Diffu) is used as a means for pseudo-representing an image containing continuous gradation.
sion is M. Shrodda (MR Sh)
Roeder), this method is "Images from Computers, IEE
E-Spectrum, Vol. 6, 1969 "(" Imag
es from Computers ", IEEE S
spectrum, vol. 6, 1969). This method saves the error when binarizing the pixels around the pixel of interest, reflects the error when binarizing the pixel of interest, and matches the average density levels between the input and output images. It is intended to represent a pseudo halftone image.

[0003]

However, although the error diffusion method gives a good binarization result to an image having continuous tone like a photograph, it is originally composed of binary like a character. With respect to the existing image, there is a defect that part of the character line is cut or the edge is blurred due to the influence of the error of surrounding pixels.

The present invention has been made in order to solve the above-mentioned drawbacks inherent in the prior art. Therefore, the object of the present invention is not to break a line even if a binary image such as a character is inputted.
It is an object of the present invention to provide a new pseudo halftone processing device in which edges are not blurred.

[0005]

In order to achieve the above object, a pseudo halftone processing device according to the present invention converts an image signal into two.
A pseudo-halftone processing device for binarizing, comprising: means for taking a weighted sum of the following errors in a plurality of already binarized surrounding pixels; and means for adding the error weighted sum and a target pixel value of an input image signal. Means for limiting the added value between two levels of a preset upper level and a lower level, means for binarizing the limited added value and outputting a binary image signal, and the binary value Means for multileveling the image signal into the upper level and the lower level, means for calculating an error between the multilevel signal value and the limited addition value, and a weighted sum of the calculated error. And means for returning to the means for taking.

[0006]

In contrast to the conventional error diffusion method, a limiter is applied to the added value of the binarized error in the surrounding pixels and the input image signal to limit the value between the upper level and the lower level. Further, this value is binarized to be an output binary image signal, and the binarized output is multivalued to an upper level or a lower level according to the binarization result, and an error between the limiter output and the multivalued output is fed back. .. By this processing, when the density value of the input image signal is lower than the lower level, the output binary image signal becomes white, and when it is higher than the upper level, it becomes black, so that the density of the character portion is higher than the upper level. , If the density of the background part of the character is lower than the lower level, the character part is binarized to black and the background part is binarized to white, so there is no deterioration in image quality such as faint lines or blurred edges. it can. On the other hand, with respect to the continuous tone image, the density change of the output pseudo-halftone image becomes a little steep, but a sufficiently high quality pseudo-halftone image can be output.

[0007]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described below in detail with reference to the accompanying drawings, which is a preferred embodiment thereof.

FIG. 1 is a block diagram showing an embodiment of the present invention.

Referring to FIG. 1, the input image signal 10 is added to the weighted sum 17 of the errors generated in the peripheral pixels of the pixel of interest in the adder circuit 3 to obtain the added value 11. The added value 11 is input to the limiter circuit 4, and when the added value 11 is equal to or higher than a preset upper level, the upper level is output as the limited added value 12, and when the added value 11 is equal to or lower than the lower level, the lower level is output. If it is between the lower level and the upper level, the same value as the input is output.

FIG. 2 shows the relationship between the input and output of the limiter circuit 4. For example, when the input image signal is 6 bits and has a density level of 0 to 63, as an example, the upper level is 5
4 and lower level can be set to 9.

The limited addition value 12 is input to the binarization circuit 5, binarized using a preset threshold value, and a binary image signal 13 is output. Binary image signal 1
As for 3, the black signal is output when the limited addition value is equal to or more than the threshold value, and the white signal is output when the addition value is less than the threshold value. When the input image signal has a value of 0 to 63 as in the above example, for example, 32 can be set as the threshold value. The multi-valued circuit 6 inputs the binary image signal 13, converts it to a higher level value when it is a black signal, and converts it to a lower level value when it is a white signal and converts it to a multi-valued signal value 14. Output as. The difference circuit 7 subtracts the multilevel signal value from the limited addition value 12 and outputs this difference as the error 15 of the pixel of interest. The error 15 thus calculated is stored in the error storage memory 1, and the weighted sum 17 of the errors in the peripheral pixels of the pixel of interest is calculated in the weighted sum circuit 2 and used for the subsequent binarization of the input image signal 10. Be done.

FIG. 3 shows the relationship between the density of the input image signal and the average density of the output image signal when the above processing is executed with a constant density value as the input image signal. As the average density of the output image signal, a value obtained by dividing the number of pixels output as a black signal by the total number of pixels was used. It should be noted that FIG. 3 also shows the input / output relationship when the conventional error diffusion method is used.

FIG. 4 is a block diagram showing an embodiment of the error storage memory 1.

Referring to FIG. 4, the error 15 in the pixel of interest calculated by the difference circuit 7 is supplied from the terminal 301, and as shown in the figure, the delay elements 32A and 32B and the 1-pixel delay element each having two pixels less than one line. Delayed by the memory consisting of 31A-31J, terminals 302-31
3 is output. The error output to these terminals is shown in Fig. 5.
Around the pixel of interest indicated by the hatched lines, the positional relationship shown in the figure is given with terminal numbers.

FIG. 6 is a block diagram showing an embodiment of the weighted sum circuit 2 shown in FIG.

Referring to FIG. 6, the error in the surrounding pixels output from the error storage memory 1 is determined by the terminals 302 to 313.
Be entered via. Coefficient s corresponding to each position
1 to s12 are multiplied by the multipliers 41A to 41L, the totals are added by the adders 42A to 42K, and the sum is output to the terminal 401. The coefficients used here include, for example, s1 = 0.10,
s2 = 0.15, s3 = 0.06, s4 = 0.10, s
5 = 0.15, s6 = 0.10, s7 = 0.06, s8
= 0.03, s9 = 0.06, s10 = 0.10, s1
1 = 0.06, s12 = 0.03, etc. are used. In addition,
These coefficients are empirically determined.

[0017]

As described above, according to the pseudo halftone processing device of the present invention, both or both of a continuous tone image such as a photograph and a binary image such as a character are mixed with a simple device configuration. It is possible to binarize the formed image without impairing the image quality.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a diagram showing a relationship between an input and an output of a limiter circuit.

FIG. 3 is a diagram showing the relationship between the density of an input image signal and the average density of an output image signal when processing is executed with a fixed density value as an input image signal.

FIG. 4 is a block diagram showing an embodiment of an error storage memory in FIG.

5 is a diagram showing a positional relationship between a target pixel and peripheral pixels obtained by the error storage memory of FIG.

FIG. 6 is a block diagram showing an embodiment of a weighted sum circuit in FIG.

[Explanation of symbols]

 1 ... Error storage memory 2 ... Weighted sum circuit 3 ... Addition circuit 4 ... Limiter circuit 5 ... Binarization circuit 6 ... Multivalued circuit 7 ... Difference circuit 10 ... Input image signal 11 ... Addition value 12 ... Limited addition value 13 ... Binary image signal 14 ... Multi-valued signal value 15 ... Error 31A to 31J ... 1 pixel delay element 32A, 32B ... Delay element 2 pixels less than 1 line 41A to 41L ... Multiplier 42A to 42K ... Adder

Claims (3)

[Claims] 1. A pseudo-halftone processing device for binarizing an image signal, means for taking a weighted sum of the following errors in a plurality of already binarized surrounding pixels, and attention of the error weighted sum and the input image signal. Means for adding pixel values, means for limiting the added value between preset two levels of an upper level and a lower level, and binarization of the limited added value to output a binary image signal. Calculating means, means for converting the binary image signal into multiple levels of the upper level and the lower level, means for calculating an error between the multi-valued signal value and the limited added value, and Means for returning the error to the means for obtaining the weighted sum, and a pseudo halftone processing device. 2. The feedback means includes a delay element having two pixels less than one line for delaying by inputting an error in the pixel of interest calculated by the error calculation means, and a plurality of one-pixel delay elements. The pseudo halftone processing device according to claim 1, further comprising a memory having the following structure. 3. A means for obtaining the weighted sum, a plurality of multipliers for multiplying each error in the surrounding pixels output from the feedback means by a coefficient corresponding to each position, and a sum of outputs of the multipliers. 3. The pseudo halftone processing apparatus according to claim 2, further comprising a plurality of adders that take