JPH04299668A - Pseudo half-tone picture processing device - Google Patents

Abstract

PURPOSE:To generate a binary picture without degrading picture qualities of both of a pseudo half-tone picture or a continuous gradation picture and a binary picture of characters or the like by coping with both of these pictures. CONSTITUTION:A threshold generated by a dither matrix is given from a terminal 104, and a fixed threshold is given from a terminal 105, and one of them is selected by a parameter given from a terminal 103 by a user to perform threshold correction. An input picture signal is subjected to such correction that it is added to the weighted sum of error generated in peripheral picture elements of a noticed picture element by an adder 16, and this input picture signal is given to a binarizing circuit 14 and is compared with the correction threshold, and the result is outputted from a terminal 102. The difference between the corrected input picture signal and the signal obtained by converting an output binary picture signal to a level corresponding to the input picture signal is stored in a memory 11 as error of the noticed picture element by an error calculating circuit 15, and the weighted sum of error in peripheral picture elements of the noticed picture element is calculated by a weighted sum circuit 12 and is used for binarization of the next input picture signal.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pseudo-halftone image processing apparatus for binarizing an image signal containing a mixture of photographs, halftone photographs, and line images such as characters.

0002

2. Description of the Related Art In a conventional pseudo-halftone image processing device, an error diffusion method is used as a means for pseudo-expressing an image containing continuous gradations.
M.R. Shroed
This method was proposed by ``Images from Computers, IE Spectrum, Volume 6, 1969'' (``Images
from Computers”, IEEE Su
pectrum, vol. 6, 1969). This method saves the error when binarizing the surrounding pixels of the pixel of interest, reflects that error when binarizing the pixel of interest, and matches the average brightness level between the input and output images. The idea is to express a pseudo-halftone image.

[0003] The error diffusion method outputs an excellent pseudo-halftone image that does not cause moiré even when inputting a halftone photograph, and does not generate false contours as is the case with ordinary dithering methods. can do. However, since the generated patterns are almost random, data compression methods used in standard facsimile systems have the disadvantage that efficient data compression cannot be achieved.

[0004] To deal with this drawback, in the normal error diffusion method, the threshold for binarization is fixed, but a threshold that has spatial periodicity, for example, a threshold that fluctuates at a period of 4×4 pixels, that is, a dither threshold, is used. A method may also be considered that applies the threshold used in the method. Here, this method will be referred to as a periodic error diffusion method. This periodic error diffusion method reduces the occurrence of moiré, which is a characteristic of error diffusion methods, and has excellent gradation expression characteristics, while also being able to obtain pseudo-halftone images with 4-pixel periodicity. By using methods such as predictive conversion and convolutional conversion, data compression can be easily performed using the run-length encoding method used in normal facsimile.

[0005]

[Problems to be Solved by the Invention] In the above-mentioned conventional pseudo-halftone image processing device, the periodic error diffusion method generates an image signal with properties intermediate between the error diffusion method and the dither method, so In the text area, the deterioration in resolution, which is a drawback of the dither method, was noticeable, and the text had the disadvantage that some of the lines of the text were cut off and the edges were blurred.

SUMMARY OF THE INVENTION An object of the present invention is to provide a pseudo-halftone image processing apparatus in which lines are not broken and edges are not blurred even when a binary image such as a character is input.

[0007]

[Means for Solving the Problems] The pseudo halftone processing device of the present invention is a pseudo halftone image processing device that binarizes a multivalued image signal and outputs it as a binary image signal. means for calculating a weighted sum of errors based on the difference between an input pixel value in surrounding pixels and a binary output pixel value corresponding to the input pixel value; and a means for calculating a pixel value of interest of the image signal using the weighted sum of the errors. means for modifying a periodic threshold given from the outside; means for binarizing the modified target pixel value using the modified threshold and outputting the binary image signal; The image forming apparatus includes means for calculating an error between the pixel value of interest and the binary image signal, and means for feeding back the calculated error to the means for calculating the weighted sum.

[0008]

[Operation] In the periodic error diffusion method of the conventional pseudo-halftone image processing apparatus, binarization is performed using a threshold given as a dither matrix. Therefore, when inputting binary images such as characters, lines may be cut off or
Inconveniences such as edges becoming blurred were observed. Therefore, if we fix the periodically fluctuating threshold given by the dither matrix for the character part of the input image,
The above inconvenience will not occur.

The first aspect of the present invention includes means for calculating a weighted sum of errors based on the difference between an input pixel value of a plurality of surrounding pixels that have already been binarized and a binary output pixel value corresponding to this input pixel value. , means for modifying the pixel value of interest of the input image signal using the error weighted sum; means for modifying a periodic threshold given from the outside; and means for binarizing the pixel value of interest modified by the modified threshold. The apparatus includes means for outputting a binary image signal, means for calculating an error between the output binary image signal and the input pixel value of interest, and means for feeding back the calculated error to the means for calculating a weighted sum.

[0010] In the second aspect of the present invention, the user sets whether to reproduce characters or halftones for each input image, and when reproducing characters, multiplies the dither matrix by 0,
The threshold is substantially fixed, and binarization is performed without cutting or blurring. When reproducing halftones, the dither matrix is multiplied by 1 and the conventional error diffusion method is used to reproduce the 2
Perform valorization.

[0011] In the third aspect of the present invention, before inputting an image, the user specifies a character area in the input image, and in the specified character area, the dither matrix is multiplied by 0 to substantially fix the threshold. to perform binarization without cutting or blurring. In areas other than character areas, the dither matrix is multiplied by 1 to perform binarization using the conventional error diffusion method.

The fourth aspect of the present invention utilizes the fact that the brightness level changes greatly at the edges of binary images such as characters, and automatically controls the amplitude of an externally applied dither matrix to prevent the occurrence of notches. Perform binarization without In other words, the change in brightness level of the pixel of interest and its surrounding pixels is measured, and if the change in brightness level is larger than a preset value, it is determined that it is an edge part of a character, etc., and the dither matrix is multiplied by 0. The dither matrix is multiplied by 1 and the conventional periodic error diffusion method is used to perform binarization with a virtually fixed threshold to reduce line breakage and edge blurring. Perform binarization.

The fifth aspect of the present invention utilizes the fact that in binary images such as characters, the brightness level changes greatly at the edge portions, and automatically controls the amplitude of the externally applied dither matrix, thereby preventing the occurrence of notches. Perform binarization. That is, the change in brightness level of the pixel of interest and its surrounding pixels is measured, the reciprocal of the change in brightness level is normalized from 0 to 1, and the error dither matrix is multiplied by the normalized value. By doing this, places with large changes in brightness level,
In other words, the dither matrix is multiplied by a value close to 0 in edge portions of characters, etc., and binarization is performed with less line breakage and edge blurring. Furthermore, in areas where the luminance level changes are small, that is, parts of continuous tone images such as photographs, the dither matrix is multiplied by a value close to 1, and binarization is performed using the conventional periodic error diffusion method.

The sixth aspect of the present invention is that in halftone photographs, from white to black,
Taking advantage of the large number of inversions from black to white, the amplitude of the externally applied dither matrix is automatically controlled to perform binarization without the occurrence of notches. That is, a region containing the pixel of interest is set, the number of times the output binary image is inverted in black and white within that region is measured, and if the number of inversions is greater than a preset value, it is determined that it is a halftone photographic region. death,
The dither matrix is multiplied by 1 to perform binarization using the conventional periodic error diffusion method. If not, it is determined that it is an edge part of a character, etc., and the dither matrix is set to 0.
is multiplied so as to perform binarization with a substantially fixed threshold, thereby performing binarization with fewer line breaks and less blurred edges.

The seventh aspect of the present invention is that in halftone photographs, from white to black,
Taking advantage of the large number of inversions from black to white, the amplitude of the externally applied dither matrix is automatically controlled to perform binarization without the occurrence of notches. In other words, a region containing the pixel of interest is set, the number of black and white inversions of the output binary image within that region is measured, the number of inversions is normalized from 0 to 1, and this normalized value is applied to the dither matrix. Multiply. By doing this, the dither matrix is multiplied by a value close to 1 in areas where the number of inversions is large, that is, in halftone photographic areas, and binarization is performed using the conventional periodic error diffusion method. Further, in areas where the number of inversions is small, that is, edge portions of characters, etc., the dither matrix is multiplied by a value close to 0, and binarization is performed with less line breakage and edge blurring.

[0016] In the eighth aspect of the present invention, in halftone photographs, from white to black,
Taking advantage of the large number of inversions from black to white in both the main and sub-scanning directions, the amplitude of the externally applied dither matrix is automatically controlled, resulting in binarization without line breaks or edge blurring. Do the following. In other words, a region including the pixel of interest is set, and the number of black and white inversions of the output binary image within that region is measured in the main scanning direction and the sub-scanning direction, and the product of both is greater than a preset value. Sometimes, it is determined that it is a halftone photograph, the dither matrix is multiplied by 1, and binarization is performed using the conventional periodic error diffusion method. If this is not the case, it is determined that it is a line drawing part such as a character, and the dither matrix is multiplied by 0 so that the dither matrix is essentially binarized using a fixed threshold, resulting in binarization with fewer line breaks and edge blurring. Let's do it.

The ninth aspect of the present invention is that in halftone photographs, from white to black,
Taking advantage of the large number of inversions from black to white in both the main and sub-scanning directions, the amplitude of the externally applied dither matrix is automatically controlled, resulting in binarization without line breaks or edge blurring. Do the following. That is, a region including the pixel of interest is set, the number of black and white inversions of the output binary image within that region is measured in the main scanning direction and the sub-scanning direction, and the product of both is normalized from 0 to 1. Multiply the dither matrix by the normalized value. By doing this, the dither matrix is multiplied by a value close to 1 in areas where the number of inversions is large, that is, in halftone photographic areas, and binarization is performed using the conventional periodic error diffusion method. Further, in areas where the number of inversions is small, that is, in line drawings such as characters, the dither matrix is multiplied by a value close to 0, and binarization is performed with fewer line breaks and less blurred edges.

[0018]

Embodiments Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing a first embodiment of the present invention, in which an input image signal is input from a terminal 101. In FIG. The input image signal is corrected in an adder 16 by adding it to a weighted sum of errors occurring in surrounding pixels of the pixel of interest, and then supplied to the binarization circuit 14 . A threshold for generating a dither matrix is given from a terminal 104, a fixed threshold is given from a terminal 105 to a threshold modification circuit 13, and the threshold is modified according to a parameter given by the user from a terminal 103. The sum of the corrected pixel value of interest obtained in the adder 16 and the corrected threshold are added to the binarization circuit 1.
4, and the resulting binary image signal is output from the terminal 102. If the image signal input from the terminal 101 is multivalued, for example 8 bits,
It can take values from 0 to 255. Since the binary image signal outputted from the terminal 102 is binary, it usually takes a value of 0 or 1. However, since this value of 0 or 1 represents white and black when converted into an input image signal, it is considered that it corresponds to 255 and 0. Therefore, in the error calculation circuit 15, the difference between the corrected input image signal and the output binarized image signal converted to a level corresponding to the input image signal is calculated as the error of the pixel of interest. Output. The error calculated by the error calculation circuit 15 is stored in the error storage memory 11, and a weighted sum of errors in surrounding pixels of the pixel of interest is calculated in the weighted sum circuit 12 and used for binarizing the subsequent input image signal. be exposed.

FIG. 2 is a block diagram of a second embodiment of the threshold correction circuit of the present invention, with terminal 204 shown in FIG.
Parameters set by the user are inputted from the terminal 103 of the computer and stored in the register 21. This parameter is assumed to be 0 when a binary image such as a character is input, and 1 when a halftone photograph or the like is input. FIG. 13 shows an example of a threshold supplied to the terminal 201 via the terminal 104 as a dither matrix. This is a centralized dither matrix with a period of 4×4 pixels. Here, the input image signal is 8 bits, that is, 0 to 255 bits.
, the range is divided into 16 equal parts, and thresholds shifted so that 0 is the center are generated. In addition to this, a Bayer type dither matrix can also be considered. This threshold is multiplied by a coefficient set by the user in the multiplier 22. Here, if the user sets the image to be a binary image such as a character, the coefficient is 0, so the output of the multiplier 22 is always 0. Also, in the case of halftone photographs, etc., the coefficient is 1, so
The multiplier 22 outputs the threshold of the dither matrix supplied to the terminal 201 as is. Adder 2
3, the fixed threshold supplied from the terminal 105 in FIG. Here, the fixed threshold is set to 128, and the modified threshold, which is the output from terminal 202, is set to range from 0 to 255.

FIG. 3 is a block diagram of a third embodiment of the threshold correction circuit of the present invention, with terminal 208 shown in FIG.
An address representing an area set by the user is input from the terminal 103 of the controller 20 and stored in the register 24. A clock is supplied from a clock generator (not shown) via a terminal 209, and the address counter 27 counts the address of the pixel of interest. The comparator 28 compares the address of the pixel of interest with the address specified by the user and outputs a coefficient. This coefficient is set to 0 in areas of binary images such as characters, and 1 in areas such as halftone photographs. Also, although only one comparator 28 is drawn here for simplicity,
It is easy to provide multiple registers and comparators to generate the above coefficients for multiple areas. Furthermore, it is also possible to easily set the main scanning direction and the sub-scanning direction independently to set a two-dimensional area. Figure 13
Terminal 2 via terminal 104 by the dither matrix shown in
05 is multiplied by a coefficient set by the user in a multiplier 25. Here, since the coefficient is 0 in a binary image area such as a character, the output of the multiplier 25 is always 0. Further, in the case of a halftone photograph, etc., the coefficient is 1, so the multiplier 25 outputs the threshold of the dither matrix supplied to the terminal 205 as is. In the adder 26, the fixed threshold supplied from the terminal 105 in FIG.

FIG. 4 is a block diagram of a fourth embodiment of the present invention. In FIG. 4(a), the input image signal is at terminal 1.
It is input from 01. The input image signal is corrected in an adder 16 by adding it to a weighted sum of errors occurring in surrounding pixels of the pixel of interest, and then supplied to the binarization circuit 14 . The input image signal is sent to the threshold correction circuit 13a.
is also given, and the threshold is modified based on the level difference between the pixel of interest and its surrounding pixels. The sum of the corrected pixel value of interest obtained in the adder 16 and the corrected threshold are compared in the binarization circuit 14,
The resulting binary image signal is output from terminal 102. The image signal input from the terminal 101 is multivalued,
For example, if it is 8 bits, it can take values from 0 to 255. Since the binary image signal outputted from the terminal 102 is binary, it usually takes a value of 0 or 1. However, since this value of 0 or 1 represents white and black when converted into an input image signal, it is considered that it corresponds to 255 and 0. Therefore,
The error calculation circuit 15 calculates the difference between the corrected input image signal and the output binary image signal converted to a level corresponding to the input image signal, and outputs the difference as an error of the pixel of interest. . The error calculated by the error calculation circuit 15 is stored in the error storage memory 11, and a weighted sum of errors in surrounding pixels of the pixel of interest is calculated in the weighted sum circuit 12 and used for binarizing the subsequent input image signal. be exposed.

FIG. 4(b) is a block diagram of a fourth embodiment of the threshold correction circuit of the present invention, in which an image signal is input to a terminal 203. A subtracter 26a calculates the difference between the luminance level value of the pixel that has passed through the one-pixel delay element 24a and the luminance level value of the current pixel of interest. This subtracter 26a outputs the absolute value of the difference. In addition, the 1-line delay element 25
The subtractor 27a also calculates the difference between the brightness level value of the pixel that has passed through a and the brightness level value of the current pixel of interest. This subtracter 27a also outputs the absolute value of the difference similarly to the subtractor 26a. The outputs of subtracters 26a and 27a are added by adder 28a. By determining the level difference between the current pixel of interest and surrounding pixels, it can be determined whether the current pixel of interest is an edge portion of a binary image such as a character. The output of adder 28a is compared with a threshold supplied externally via terminal 204 in comparator 21a. If the output of the adder 28a takes a value larger than this threshold, it is assumed that the current pixel of interest is on the edge, and the comparator 21a outputs 0.
Output. Otherwise, comparator 21a outputs 1. A multiplier 22 multiplies the dither matrix supplied from the terminal 201 with the output of the comparator 21a. Here, if it is determined that it is an edge of a binary image such as a character based on the magnitude of the level difference between the surrounding pixels and the pixel of interest, the output of the comparator 21a is 0, so the multiplier 22
The output of a is always 0. Furthermore, if it is determined that the edge is not an edge of a binary image such as a character, the coefficient is 1, so the multiplier 22a outputs the dither matrix supplied from the terminal 201 as is. In the adder 23a, the product of the fixed threshold supplied from the outside via the terminal 205, the output of the comparator 21a, which is the output of the multiplier 22a, and the dither matrix is summed.
The signal is output from the digitizer and supplied to the binarization circuit 14 in FIG. 4(a).

An example of a threshold supplied to terminal 201 as a dither matrix is shown in FIG. This is 4
This is a centralized dither matrix with a period of ×4 pixels. Here, the input image signal is 8 bits, that is, 0
Assuming that we take a value of 255 from , divide the range into 16 equal parts,
A shifted threshold is generated so that 0 is the center. In addition to this, a Bayer type dither matrix can also be considered. This threshold is modified in multiplier 22a, and in adder 23a, terminal 2
The sum with the fixed threshold supplied from 05 is taken and output from terminal 202. Here, the fixed threshold is set to 128, and the threshold modified by the output from the terminal 202 is set to be in the range of 0 to 255.

FIG. 5 is a block diagram of a fifth embodiment of the threshold correction circuit of the present invention, in which the input image signal is supplied from terminal 209. A subtracter 216 calculates the difference between the brightness level value of the pixel that has passed through the one-pixel delay element 214 and the brightness level value of the current pixel of interest. This subtracter 216 outputs the absolute value of the difference. In addition, the 1-line delay element 21
The subtractor 217 also calculates the difference between the brightness level value of the pixel that has passed through the pixel 5 and the brightness level value of the current pixel of interest. This subtracter 217 also outputs the absolute value of the difference, similar to the subtracter 216. The outputs of subtracters 216 and 217 are added by adder 218. At the edges of binary images such as characters,
The level difference between the current pixel of interest and surrounding pixels increases. Therefore, based on this level difference, it can be determined to what extent the current pixel of interest is likely to be a binary image. The output of the adder 218 can take a value from 0 to 510, assuming that the input image signal is 8 bits. The normalization circuit 211 converts this value from 0 to 510 into a value in the range from 1 to 0 and outputs it. Various methods of conversion can be considered, such as taking the reciprocal and then shifting, or performing linear interpolation. In any case, it can be realized using ROM (read-only memory). A dither matrix, an example of which is shown in FIG.
12, the product with the output of the normalization circuit 211 is taken. In the adder 213, the fixed threshold supplied from the terminal 206 and the dither matrix modified by the multiplier 212 are summed, outputted from the terminal 207, and supplied to the binarization circuit 14 in FIG. 4(a). Ru.

FIG. 6 is a block diagram of a sixth embodiment of the threshold correction circuit of the present invention, in which a binary image signal is input to a terminal 205. The change point detector 24b detects a change in the binary image signal from white to black or from black to white. If the change has occurred, the register 29 is changed in the adder 27b.
Add 1 to the contents of b. If no change is detected, nothing is added. The range for counting change points is N pixels (N
is an integer greater than or equal to 1), the pixels delayed by the N pixel delay element 26b are input to the change point detector 25b. When a change is detected, the subtracter 28b subtracts 1 from the output of the adder 27b. If no change is detected, nothing is subtracted. The output of the subtracter 28b is input to the comparator 21b and simultaneously stored in the register 29b. Since the register 29b is reset to 0 at the beginning of the scanning line, the number of change points within the range of N pixels on the scanning line is stored in the register 29b. The comparator 21b compares this number of change points with a threshold input from the terminal 204. If the number of change points is greater than the threshold given from the outside, it is determined that the area is a halftone photographic area, so the comparator 21b outputs a value of 1. Also,
Otherwise, it outputs the value 0. The dither matrix supplied from the terminal 201 is multiplied by the output of the comparator 21b in the multiplier 22b. Here, if it is determined that the image is a binary image such as a character, the output of the comparator 21b is 0, so the output of the multiplier 22b is always 0. Furthermore, if it is determined that the area is a halftone photographic area, the coefficient is 1, so the multiplier 22b outputs the dither matrix supplied from the terminal 201 as is. Adder 23
At b, the product of the fixed threshold supplied from the terminal 203, the output of the comparator 21b, which is the output of the multiplier 22b, and the dither matrix is summed, and the product is output from the terminal 202. The signal is supplied to the value conversion circuit 14.

FIG. 6 shows an example of the threshold supplied to the terminal 201 from the dither matrix. This is 4×4
This is a centralized dither matrix with a period of pixels. Here, assuming that the input image signal is 8 bits, that is, takes values from 0 to 255, the range is divided into 16 equal parts, and thresholds shifted so that 0 is the center are generated. In addition to this, a Bayer type dither matrix can also be considered. This threshold is modified in multiplier 22b, and in adder 23b, terminal 203
is summed with a fixed threshold supplied from the terminal 202 and output from the terminal 202. Here, the fixed threshold is 128, and the modified threshold output from terminal 202 is in the range 0 to 255.

FIG. 7 is a block diagram of a seventh embodiment of the threshold correction circuit of the present invention, in which a binary image signal is input to a terminal 209. The change point detector 214b detects a change in the binary image signal from white to black or from black to white. If the value has changed, the adder 217b adds 1 to the contents of the register 219b. If no change is detected, nothing is added. Assuming that the range for counting change points is N pixels (N is an integer greater than or equal to 1), the N pixel delay element 216
The pixel delayed by b is input to the change point detector 215b. When a change is detected, 1 is subtracted from the output of adder 217b in subtracter 218b. If no change is detected, nothing is subtracted. The output of the subtracter 218b is input to the normalization circuit 211b, and at the same time, the output is input to the register 21.
Stored in 9b. Since the register 219b is reset to 0 at the beginning of the scanning line, the number of change points within the range of N pixels on the scanning line is stored in the register 219b. The normalization circuit 211b normalizes this number of change points from 0 to 1. Since the range for counting the number of change points is N,
The maximum number of change points is N-1 and the minimum is 0. Therefore, by dividing the number of change points by N-1, a value normalized from 0 to 1 can be obtained. Furthermore, it may have nonlinear characteristics. In any case, it can be realized using ROM (read-only memory). The dither matrix, an example of which is shown in FIG. 13, is supplied from the terminal 206 and multiplied by the output of the normalization circuit 211b in the multiplier 212b. Adder 2
13b, the fixed threshold supplied from the terminal 208 and the dither matrix modified by the multiplier 212b are summed and output from the terminal 207, as shown in FIG.
) is supplied to the binarization circuit 14.

FIG. 8 is a block diagram of an eighth embodiment of the threshold correction circuit of the present invention, in which a binary image signal is input to a terminal 204. The change point detector 214A detects a change in the binary image signal from white to black or from black to white. If the value has changed, adder 219A adds 1 to the contents of register 218A. If no change is detected, nothing is added. The range for counting change points is N
As a pixel (N is an integer greater than or equal to 1), one pixel delay element is
9A, 29B, . . . (N-1) are arranged, and the outputs delayed by N pixels are input to the change point detector 214N. When a change is detected by the change point detector 214N, a subtracter 220A subtracts 1 from the output of the adder 219A. If no change is detected, nothing is subtracted. Subtractor 220A
The output of register 2 is input to adder 25B at the same time.
It is stored in 18A. Since register 218A is reset to 0 at the beginning of a scan line, register 218A stores the number of change points within a range of N pixels on the scan line. The pixels delayed by N pixels are delayed by a total of one line by the delay element 211A, which is N pixels less than one line, and are input to the N pixel delay element 212. Similarly, the change point is detected by the change point detectors 215A and 215B, and the change point is detected by the register 218B, the adder 219B, and the subtracter 2.
20B, the number of change points within the range of N pixels one line before is stored in the register 218B. This is repeated for N lines. As a result, registers 218A to 218
N stores the number of change points for N lines. The sum of the respective change points is calculated in the adder 25B.

Similar calculations are also performed in the sub-scanning direction. Change point detectors 214A and 217A, register 28A, adder 27A, and subtracter 26A calculate the number of change points within a range of N lines in the sub-scanning direction including the pixel of interest in register 2.
It is stored at 8A. N including the pixel 1 pixel before the pixel of interest
The number of change points within the range of the line is stored in the register 28B, and similarly, the number of change points within the range of the line is stored in the register 28N.
1) The number of change points in the sub-scanning direction up to the previous pixel is stored. The sum of these change points is calculated by adder 25A.

A multiplier 23A calculates the product of the total number of change points in the sub-scanning direction and the total number of change points in the main scan direction. The output of the multiplier 23A is sent to the terminal 20 in the comparator 24A.
It is compared with the threshold given by 5. If the number of change points is greater than the threshold given from the outside, it is determined that the area is a halftone photographic area, and the comparator 24A outputs a value of 1. Also, if this is not the case, a value of 0 is output. The dither matrix supplied from terminal 201 is multiplied by the output of comparator 24A in multiplier 21A. Here, if it is determined that the image is a binary image such as a character, the output of the comparator 21A is 0, so the multiplier 21A
The output of is always 0. Furthermore, if it is determined that the area is a halftone photographic area, the coefficient is 1, so the multiplier 21A outputs the dither matrix supplied from the terminal 201 as is. In the adder 22A, the product of the fixed threshold supplied from the terminal 203, the output of the comparator 24A which is the output of the multiplier 21A, and the dither matrix is summed, and the sum is output from the terminal 202, as shown in FIG. 4(a). 2
The signal is supplied to the value conversion circuit 14.

FIG. 13 shows an example of the threshold supplied to the terminal 201 from the dither matrix. This is 4x
This is a centralized dither matrix with a period of 4 pixels. Here, assuming that the input image signal is 8 bits, that is, takes values from 0 to 255, the range is divided into 16 equal parts, and 0
A threshold is generated that is shifted so that it is centered. In addition to this, a Bayer type dither matrix can also be considered. This threshold is modified in multiplier 21A and in adder 22A at terminal 20.
is summed with a fixed threshold provided by 3,
It is output from the terminal 202. Here, the fixed threshold is set to 128, and the threshold modified by the output from the terminal 202 is set to be in the range of 0 to 255.

FIG. 9 is a block diagram of a ninth embodiment of the threshold correction circuit of the present invention, in which a binary image signal is input to a terminal 209. The change point detector 231A has output 2
Changes in the value image signal from white to black and from black to white are detected. If the value has changed, adder 238A adds 1 to the contents of register 237A. If no change is detected, nothing is added. Assuming that the range for counting change points is N pixels (N is an integer of 1 or more), (N-1) 1-pixel delay elements are arranged as 229A, 229B, etc., and the N-pixel delayed output is sent to the change point detector 231N. input. When a change is detected by the change point detector 231N, the subtracter 23
At 9A, 1 is subtracted from the output of adder 238A. If no change is detected, nothing is subtracted. The output of the subtracter 239A is input to the adder 225B and simultaneously stored in the register 237A. Since register 237A is reset to 0 at the beginning of the scan line, register 237A
The number of change points within the range of N pixels on the scanning line is stored in A. The pixels delayed by N pixels are delayed by a total of one line by delay elements 230 that are N pixels less than one line, and are input to an N pixel delay element 232 . Similarly, the change point is detected by change point detectors 234A and 234B, register 237B, adder 238B,
The number of change points within the range of N pixels one line before is stored in the register 237B by the subtracter 239B. This is N
Repeated for the line. As a result, the number of change points for N lines is stored in registers 237A to 237N. The sum of each number of change points is calculated by an adder 225B.

Similar calculations are also performed in the sub-scanning direction. Change point detectors 231A and 236A, register 228A,
The number of change points within a range of N lines in the sub-scanning direction including the pixel of interest is stored in a register 228A by an adder 227A and a subtracter 226A. The number of change points within the range of N lines including the pixel before the pixel of interest is stored in the register 228.
Similarly, the number of change points in the sub-scanning direction up to (N-1) pixels before the pixel of interest is stored in the register 228N. The sum of these change points is added to the adder 225A.
is calculated.

A multiplier 223 calculates the product of the total number of change points in the sub-scanning direction and the total number of change points in the main scan direction.

The normalization circuit 224 normalizes the product of the number of change points in the main scanning direction and the number of change points in the sub-scan direction from 0 to 1. Since the range for counting the number of change points is N×N, the maximum number of change points is 2N(N-1) and the minimum is 0. Therefore, by dividing the number of change points by 2N (N-1), a value normalized from 0 to 1 can be obtained. Furthermore, it may have nonlinear characteristics. In any case, it can be realized using ROM (read-only memory).

A dither matrix, an example of which is shown in FIG. 13, is supplied from a terminal 206 and multiplied by the output of a normalization circuit 224 in a multiplier 212. In the adder 222, the fixed threshold supplied from the terminal 208 and the dither matrix modified by the multiplier 221 are summed, outputted from the terminal 207, and supplied to the binarization circuit 14 in FIG. 4(a). Ru.

FIG. 10 is a detailed block diagram of the error storage memory 11. The error in the pixel of interest calculated by the error calculation circuit 15 is supplied from the terminal 301, and as shown in the figure, the error in the pixel of interest calculated by the error calculation circuit 15 is supplied to the delay elements 32A and 32, which are two pixels smaller than one line.
B and a memory including one-pixel delay elements 31A to 31J, and output to terminals 302 to 313. The errors output to these terminals have the positional relationship shown in FIG. 12 with terminal numbers attached around the diagonally shaded pixel of interest.

FIG. 11 is a detailed block diagram of the weighted sum circuit 12. Errors in surrounding pixels outputted from the error storage memory 11 are inputted via terminals 302 to 313. Counts s1 to s12 corresponding to each position are multiplied by multipliers 41A to 41L, and adders 42A to 4
A total sum of 2K is taken and outputted to the terminal 401. The coefficients used here include, for example, s1=0.10, s2=0.1
5, s3=0.06, s4=0.10, s5=0.15
, s6=0.10, s7=0.06, s8=0.03,
s9=0.06, s10=0.10, s11=0.06
, s12=0.03, etc. are used. Note that these coefficients are obtained empirically.

[0040]

As explained above, the present invention provides a means for outputting a binary image signal by binarizing a pixel value of interest whose input image signal is corrected by a threshold applied from the outside, and a means for outputting a binary image signal. By having a means for calculating the error of the pixel value of interest with the image signal, and a means for feeding back the calculated error to the means for calculating the weighted sum, it is possible to create a pseudo halftone image such as a halftone photograph or a photograph. It can handle both continuous tone images and binary images such as characters, and can generate binary image signals without impairing the image quality of both.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a first embodiment of the invention.

FIG. 2 is a block diagram of a threshold correction circuit according to a second embodiment of the present invention.

FIG. 3 is a block diagram of a threshold correction circuit according to a third embodiment of the present invention.

FIG. 4 is a block diagram of a fourth embodiment of the present invention.

FIG. 5 is a block diagram of a threshold correction circuit according to a fifth embodiment of the present invention.

FIG. 6 is a block diagram of a threshold correction circuit according to a sixth embodiment of the present invention.

FIG. 7 is a block diagram of a threshold correction circuit according to a seventh embodiment of the present invention.

FIG. 8 is a block diagram of a threshold correction circuit according to an eighth embodiment of the present invention.

FIG. 9 is a block diagram of a threshold correction circuit according to a ninth embodiment of the present invention.

FIG. 10 is a detailed block diagram of the error storage memory of this embodiment.

FIG. 11 is a detailed block diagram of the weighted sum circuit of this embodiment.

FIG. 12 is a diagram showing a pixel of interest and peripheral pixels in the error storage memory of this embodiment.

FIG. 13 is a diagram showing an example of a dither matrix.

[Explanation of symbols]

11 Error storage memory 12 Weighted sum circuit 13 Weighted sum correction circuit 14 Binarization circuit 15 Error calculation circuit

Claims (9)

[Claims] Claim: 1. A pseudo-halftone image processing device that binarizes a multivalued image signal and outputs it as a binary image signal, wherein the input pixel value corresponds to the input pixel value of a plurality of surrounding pixels that have already been binarized. means for calculating a weighted sum of errors based on a difference from a binary output pixel value, means for correcting a pixel value of interest of the image signal using the weighted sum of the errors, and correcting a periodic threshold given from the outside. means for binarizing the corrected pixel value of interest using the corrected threshold and outputting the binary image signal;
A pseudo halftone characterized by comprising means for calculating an error in the pixel value of interest between the image signal and the binary image signal, and means for feeding back the calculated error to the means for calculating the weighted sum. Image processing device. 2. In the means for modifying the threshold, for each input image, the threshold is zero for binary images such as characters, 1 for continuous tone images such as photographs, and 1 for pseudo halftone images such as halftone photographs. The user sets a coefficient that is 1,
Claim 1, wherein the threshold for binarization is modified by multiplying the set value by a periodic dither matrix value given from the outside and calculating the sum of the dither matrix value and a fixed threshold given from the outside.
The pseudo-halftone image processing device described above. 3. In the means for modifying the threshold, the threshold is zero in a binary image area such as a character, and is 1 in a continuous tone image area such as a photograph, depending on a position in the input image given by an operation input. In pseudo-halftone image areas such as halftone photographs, a periodic dither matrix value given from the outside is multiplied by a coefficient of 1, and the dither matrix value is summed with a fixed threshold given from the outside for binarization. 2. The pseudo-halftone image processing apparatus according to claim 1, wherein a threshold of the pseudo halftone image processing apparatus is modified. 4. The means for modifying the threshold calculates a difference value between the pixel value of interest and surrounding pixel values of the pixel of interest, and if the difference value is larger than a preset value, the difference value is zero; otherwise, the difference value is zero. 2. The binarization threshold is modified by multiplying a periodic dither matrix given from the outside by 1, and calculating the sum of the dither matrix value and a fixed threshold given from the outside. Pseudo halftone image processing device. 5. The means for correcting the threshold calculates a difference value between the pixel value of interest and peripheral pixel values of the pixel of interest, and normalizes the reciprocal of the difference value from 0 to 1, and calculates a value obtained by normalizing the reciprocal of the difference value from 0 to 1. 2. The pseudo halftone image according to claim 1, wherein the threshold for binarization is modified by multiplying a given periodic dither matrix value and calculating the sum of the dither matrix value and a fixed threshold given from the outside. Processing equipment. 6. In the means for correcting the threshold, the threshold is adjusted from white to black and from black to white in a preset region in the output binary image signal including the output pixel corresponding to the pixel of interest of the input image signal. Count the number of change points, and if the counted value is greater than a preset value, 1
, otherwise, the binarization threshold is modified by multiplying a periodic dither matrix given from the outside by 0, and calculating the sum of the dither matrix value and a fixed threshold given from the outside. A pseudo halftone image processing apparatus according to claim 1. 7. In the means for correcting the threshold, the threshold is adjusted from white to black and from black to white in a preset region in the output binary image signal including the output pixel corresponding to the pixel of interest of the input image signal. counting the number of change points to , normalizing the counted value from 0 to 1, multiplying it by a periodic dither matrix value given from the outside, and calculating the sum of the dither matrix value and a fixed threshold given from the outside. 2. The pseudo-halftone image processing apparatus according to claim 1, wherein the threshold for binarization is modified by:. 8. In the means for modifying the threshold, the number of change points from white to black and from black to white in a preset region in the output image signal including the output pixel corresponding to the pixel of interest of the input image signal. is counted independently in the main scanning direction and the sub-scanning direction, and the product of the number of change points in the main scanning direction and the number of change points in the sub-scanning direction is calculated, and if the product of the number of change points is larger than a preset value, then 1; If not, the threshold for binarization is modified by multiplying a periodic dither matrix given from the outside by 0 and calculating the sum of the dither matrix value and a fixed threshold given from the outside. The pseudo-halftone image processing device described above. 9. In the means for modifying the threshold, the number of change points from white to black and from black to white in a preset region in the output image signal including the output pixel corresponding to the pixel of interest of the input image signal. is counted independently in the main scanning direction and the sub-scanning direction, the product of the number of change points in the main scanning direction and the number of change points in the sub-scanning direction is calculated, and a value obtained by normalizing the product of the number of change points from 0 to 1 is given from the outside. 2. The pseudo-halftone image processing apparatus according to claim 1, wherein the threshold for binarization is corrected by multiplying the periodic dither matrix by a periodic dither matrix and calculating the sum of the dither matrix value and a fixed threshold given from the outside. .