JPS62242473A - Pseudo halftone image processor - Google Patents

Abstract

PURPOSE:To obtain a binary image signal reducing division even for a dot photograph and reducing notch on a character part by binarycoding an image based on an error diffusion system and then shaping the character part. CONSTITUTION:An image signal is inputted from a terminal 101. An error calculated at the time of binarization is multiplied by a factor and the sum of the multiplied errors is calculated by a summing circuit 11. The sum is added to an input image signal by an adder 1 and the added value is compared with a threshold by a comparator 13. A character shaping circuit 14 outputs a shaped image signal to a terminal 102. A multiplexer 15 selects the representative level of white or black applied from a terminal 104 or 105 in accordance with the output of the comparator 13. A subtractor 16 calculates the error of a remarkable picture element. The error is stored in an error storing memory 17 and the contents of the memory 17 are multiplied by a factor in the summing circuit 11 to find out the sum.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a pseudo-halftone image processing device that adaptively binarizes an image containing a mixture of halftone photographs and line drawings such as characters.

[Prior art and its problems]

Halftone processing is widely used as a means of pseudo-expressing images containing continuous gradations, but when a halftone photograph is input from a facsimile or the like, moiré may occur. This becomes noticeable when the halftone dot period of the input image and the sampling period of the image input device are close to each other or are integer multiples. Moiré appears as a striped pattern that does not exist in the input image, which confuses the user and can be a major nuisance in some cases. This moiré is caused by a mismatch in the average brightness level of the input and output images, and G.M. White (
Journal of Applied Photographic Engineering (J.L.White)
nal Of Applied Photography
icεngineering) Recent Advances In Thre published in the April 1980 issue.
Holding Techniques ForFa
csimile).

As one method to avoid this inconvenience, an error diffusion method is proposed by M.R. Schroeder (M, R, 5 Chroeder).
(“Images From Co.
mputers IEEE spectrum, v
OL, 6.1969) This saves the error between input and output when pixels surrounding the pixel of interest are binarized, and when the pixel of interest is binarized, the error is reflected and the difference between the input and output images is saved. The aim is to reduce moire by matching the average brightness levels of the images.

When there are characters in the input/output image, the sample window of the image input device has a certain degree of expansion, so that values between white and black may occur at the edges of the characters. On the other hand, when the error diffusion method is applied, intermediate values are expressed by density modulation of white pixels and black pixels, so notches appear at the edges, and these notches can actually interfere with line drawings such as characters. This was a factor that deteriorated the image quality.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a pseudo-halftone image processing device that eliminates the above-mentioned disadvantages and outputs a binary image with less moire even when halftone photographs are input, and with fewer notches in text areas. be.

[Structure of the invention]

The present invention is a pseudo-halftone image processing device that adaptively binarizes an image containing a mixture of halftone photographs and line drawings such as characters, and the present invention provides an input image and a binarized output at a plurality of surrounding pixels that have already been binarized. means for calculating a weighted sum of errors based on level differences with the image; means for binarizing the image signal of interest using this weighted sum and outputting a binary image signal; , means for feeding back the calculated error to the means for calculating the weighted sum, and means for shaping the line drawing portion by referring to peripheral pixels of the binary image signal. Features.

[Principle of the invention]

The present invention aims to binarize an image containing a mixture of halftone photographs and line drawings such as characters.

The operation of binarizing an image is to assign a level representing white or black depending on the level of an input pixel. The cause of moiré is that there is a difference in the average brightness level of the input and output images at this time. Therefore, by assigning a level representing white or black according to the input pixel level,
If you memorize how much error has occurred for that pixel, and when you binarize pixels around that pixel, add the previous error to the level of the pixel of interest and binarize it, the pixel of interest In the vicinity of , the average levels of the input and output images match, and moiré is suppressed. This is a method called an error diffusion method.

White or black pixels are often continuous in the periphery of a character, and notches that occur in vertical and horizontal straight sections in particular become a noticeable hindrance. Therefore, by looking at the pattern of the image signal that has been binarized using the error diffusion method, and performing an operation to remove or fill in the notches that occur in the straight line parts, the image quality in the character parts can be improved.

〔Example〕

The present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a pseudo halftone image processing apparatus of the present invention. This pseudo-halftone image processing device includes a weighted sum circuit 11 that calculates a weighted sum of errors based on level differences between an input image and a binary output image in a plurality of surrounding pixels that have already been binarized, and an adder 12 for binarizing the image signal of interest and outputting a binary image signal using
．． A comparator 13, a multiplexer 15, and a subtracter 1 for calculating the error between the binary output image signal and the image signal of interest.
6, an error storage memory 17 which feeds back calculated errors to the weighted sum circuit 11, and a character shaping circuit 14 which shapes a line drawing portion by referring to surrounding pixels of a binary image signal.

In such a pseudo-halftone image processing device, an image signal is input from the terminal 101. Errors calculated during binarization for surrounding pixels that have already been binarized are multiplied by coefficients corresponding to their respective positions, and the sum is calculated by the weighted sum circuit 11.
It is calculated by The weighted sum is summed with the input image signal in the adder 12, and then compared with the thread 7 Sjord given from the terminal 103 in the comparator 13, and a binary image signal is supplied to the character shaping circuit 14 and the multiplexer 15. be done. The character shaping circuit 14 refers to the surrounding pixels of the pixel of interest, removes the protrusion of unnecessary black pixels in the straight line portion, or fills in the dents to shape the character, and then outputs the shaped image signal to the terminal 102. .

The multiplexer 15 selects the white and black representative levels provided from the terminals 104 and 105 in accordance with the output of the comparator 13. The subtracter 16 calculates the difference between the sum of the human image signal calculated by the adder 12 and errors in surrounding pixels and the white or black representative level selected by the multiplexer 15;
That is, the error at the pixel of interest is calculated. Errors in the pixel of interest are stored in an error storage memo IJ 17, multiplied by a coefficient corresponding to each position in a weighted sum circuit 11, and summed.

FIG. 2 is a block diagram of the error storage memory 17. The error at the pixel of interest calculated by the subtracter 16 is sent to the terminal 201.
As shown in the figure, delay elements 22A and 22B with two pixels less than one line, and one pixel delay element 21A
to 21J, respectively, and are output to terminals 202 to 213. The errors output to these terminals have the positional relationship shown in FIG. 5, with terminal numbers attached around the diagonally shaded pixel of interest.

FIG. 3 is a block diagram of the weighted sum circuit 11.

Errors in surrounding pixels outputted from the error storage memory 17 are inputted via terminals 202 to 213. SI2 is calculated from the coefficient 31 corresponding to each position by the multiplier 31
A is multiplied by 31L, summed by adders 32A to 32, and output to terminal 301. The coefficients used here include, for example, 31 = 0. tOt 32 = o, t
s, 33 =O, Q634 =0. lo+35
=0.15+ Ss =0-1037 =0.06
1 38 =0.03. 59=0.06S+o=
0.1(Ls+t=0.06+312=
Use a value such as 0.03.

FIG. 4 is a block diagram of the character shaping circuit 14.

The binary image signal input from the terminal 401 is transmitted through l-line delay elements 41A to 41D and 1-pixel delay elements 42A to 42.
Binary image signals for a total of 25 frames, including the diagonally shaded pixel of interest shown in FIG.
is input.

The ROM 43 shapes the characters by removing unnecessary protrusions of black pixels around the characters or filling in dents, and outputs a shaped image signal from the terminal 402.

An example of this operation is shown in FIG. In the left side of FIG. 7(a), the pixel of interest is an unnecessary protrusion, so this pixel of interest is converted into a white pixel and converted into an output image as shown on the right side of the figure. Furthermore, on the left side of FIG. 7(b), the pixel of interest is depressed compared to the surrounding black pixels, so the pixel of interest is converted to black and output as shown on the right side of the figure.

〔Effect of the invention〕

As described above, the pseudo halftone image processing device according to the present invention binarizes the image using the error diffusion method, and then formats the character portion, so there is no moiré in the halftone photograph. It is possible to output a binary image signal with fewer notches in the text portion.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram of an error storage memory, FIG. 3 is a block diagram of a weighted sum circuit, FIG. 4 is a block diagram of a character formatting circuit, and FIG. Figure 6 shows the positional relationship between the pixel of interest and surrounding pixels in the error diffusion method, Figure 6 shows the positional relationship between the pixel of interest and surrounding pixels for shaping the text area, and Figure 7 shows the positional relationship between the pixel of interest and surrounding pixels for character shaping. It is a figure which shows the example of plastic surgery. 11...... Weighted sum circuit 12... Adder 13... Comparator 14...・Character shaping circuit 15...
......Multiplexer 16......Subtractor 17...Error storage memory 21A-21
J...1 pixel delay element 22A, 22B...
Delay element with 2 pixels less than l line

Claims (1)

[Claims] (1) In a pseudo-halftone image processing device that adaptively binarizes images containing a mixture of halftone photographs and line drawings such as characters, two
Means for calculating a weighted sum of errors based on level differences between an input image and a binarized output image in a plurality of surrounding pixels that have been converted into values, and a means for binarizing a target image signal using this weighted sum to obtain a binary image signal. means for outputting, means for calculating an error between the binary image signal and the image signal of interest, means for feeding back the calculated error to the means for calculating the weighted sum, and peripheral pixels of the binary image signal. 1. A pseudo-halftone image processing device comprising: means for referring to and shaping a line drawing portion.