JPH05167261A - Manufacture of multilayer wiring board provided with semi-through-hole - Google Patents

Manufacture of multilayer wiring board provided with semi-through-hole

Info

Publication number
JPH05167261A
JPH05167261A JP33676691A JP33676691A JPH05167261A JP H05167261 A JPH05167261 A JP H05167261A JP 33676691 A JP33676691 A JP 33676691A JP 33676691 A JP33676691 A JP 33676691A JP H05167261 A JPH05167261 A JP H05167261A
Authority
JP
Japan
Prior art keywords
hole
wiring board
multilayer wiring
layer
laminated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP33676691A
Other languages
Japanese (ja)
Inventor
Kazumi Kondo
和美 近藤
Moriomi Egawa
執臣 江川
Yoshiaki Sonoda
善章 園田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP33676691A priority Critical patent/JPH05167261A/en
Publication of JPH05167261A publication Critical patent/JPH05167261A/en
Withdrawn legal-status Critical Current

Links

Abstract

PURPOSE:To prevent a semi-through-hole which constitutes a terminal from being deformed and a conductive layer from separating by a method wherein a conductor foil layer is interposed between the laminated inner wiring base boards at a through-hole boring region. CONSTITUTION:An inner wiring base board 8 on the primary surface of which a required circuit pattern is formed, outer wiring boards 9, a prepreg 10, and a copper foil 11 are laminated. In the laminate concerned, the copper foil 11 is laminated on the through-hole boring predetermined region of the inner wiring board 8. In succession, the laminate is formed by thermocompression into a multilayer wiring main body 12. Thereafter, a through-hole 13 is bored in the formed multilayer wiring main body 12 at a prescribed point, a conductor layer is deposited in one piece on the inner wall of the through-hole 13 concerned to obtain a multilayer wiring board provided with a through-hole 13 whose inner wall is coated with a conductor layer. A press work is carried out so as to vertically cut the through-hole 13 into two. By this setup, a multilayer wiring board provided with a semi-through-hole excellent in dimensional accuracy can be obtained.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、端面に凹面化した半ス
ルホール付き(端子)の多層配線板の製造方法に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer wiring board having a semi-through hole (terminal) having a concave end surface.

【0002】[0002]

【従来の技術】周知のように配線板(回路基板)は、電
気回路のコンパクト化、あるいは着脱,交換可能な回路
部品として、各種の電子機器類において広く実用に供さ
れている。そして、この種の配線板においては、回路機
能の向上を目的として多層配線構造化する一方、配線板
主面の周辺部に回路パターンに対して外部接続の役割を
なすリード端子が一体的に形設されている。つまり、片
面もしくは両面に、所要の回路パターンを形成する際、
主面の周辺部に所要のリード端子を形設した構成を採っ
ている。
2. Description of the Related Art As is well known, wiring boards (circuit boards) have been widely put to practical use in various electronic equipments as circuit parts in which electric circuits are made compact, or which can be detached and replaced. In this type of wiring board, a multilayer wiring structure is formed for the purpose of improving the circuit function, while lead terminals, which play a role of external connection to the circuit pattern, are integrally formed in the peripheral portion of the main surface of the wiring board. It is set up. In other words, when forming the required circuit pattern on one side or both sides,
It has a structure in which required lead terminals are formed on the periphery of the main surface.

【0003】しかし、上記構成のリ―ド端子を備えた配
線板の場合には、実用上次のような問題がある。すなわ
ち、リード端子を配線板本体の主面に形成するため、そ
の分外層回路パターン形成領域や電子部品の搭載・実装
領域が低減されることになる。つまり、高密度配線ない
し高密度実装が阻害され、回路構成のコンパクト化に支
障がある。
However, in the case of a wiring board having a lead terminal of the above construction, there are the following practical problems. That is, since the lead terminals are formed on the main surface of the wiring board main body, the outer layer circuit pattern forming area and the mounting / mounting area of the electronic component are reduced accordingly. That is, high-density wiring or high-density mounting is hindered, which hinders downsizing of the circuit configuration.

【0004】また、リード端子を備えた配線板の場合に
は、リード端子と部品とを半田付けしたとき、半田付け
状態を容易に観察することはできないが、半スルホール
付き多層配線板の場合には半田付け状態を容易に観察す
ることが可能である。
Further, in the case of a wiring board having lead terminals, when the lead terminals and components are soldered, the soldering state cannot be easily observed. Can easily observe the soldering state.

【0005】こうした問題の解消策として、図4に斜視
的に示すように、多層配線板本体1の端面を凹面化し、
この凹面1aに導電層2を設け半スルホール(端子)3と
した構成の半スルホール付き多層配線板が開発されてい
る。
As a solution to such a problem, as shown in a perspective view in FIG. 4, the end face of the multilayer wiring board body 1 is made concave,
A multilayer wiring board with a half through hole has been developed in which a conductive layer 2 is provided on the concave surface 1a to form a half through hole (terminal) 3.

【0006】しかして、このような半スルホール付き多
層配線板は、図5〜図7に実施態様の要部を模式的に示
すような手段で製造されている。すなわち、所要の内層
配線素板および外層配線素板を積層し、加熱加圧成型し
て多層配線板本体1を先ず形成する。次いで、図5に斜
視的に示すように、多層配線板本体1の所定位置にスル
ホール4を穿設し、このスルホール4内壁面に導体層2
を形成した後、図6に斜視的に示すように、所定の金型
5によって前記内壁面に導体層2を形成したスルホール
4を縦切断することによって、図4に図示した構成の半
スルホール付き多層配線板を製造している。他の手段と
しては、図7に斜視的に示すごとく、内壁面に導体層2
を形成したスルホール4内に半田6を充填した後、ルー
タービット7を回転させながら矢印方向に走行させて、
前記半田6を充填したスルホール4を縦切断し、半田6
を除去することによって、図4に図示した構成の半スル
ホール付き多層配線板を製造している。
However, such a multi-layer wiring board with a half through hole is manufactured by a means schematically showing the main part of the embodiment in FIGS. That is, the required inner layer wiring base plate and outer layer wiring base plate are laminated and heat-pressed to form the multilayer wiring board body 1. Next, as shown in a perspective view in FIG. 5, a through hole 4 is formed at a predetermined position of the multilayer wiring board body 1, and the conductor layer 2 is formed on the inner wall surface of the through hole 4.
6 is formed, the through hole 4 having the conductor layer 2 formed on the inner wall surface is vertically cut by a predetermined die 5 as shown in a perspective view in FIG. Manufactures multilayer wiring boards. As another means, as shown in a perspective view in FIG. 7, the conductor layer 2 is formed on the inner wall surface.
After filling the through hole 4 formed with the solder 6 with the solder 6 and rotating the router bit 7 in the direction of the arrow,
The through hole 4 filled with the solder 6 is vertically cut to obtain the solder 6
Is removed to manufacture the multilayer wiring board with a half through hole having the configuration shown in FIG.

【0007】[0007]

【発明が解決しようとする課題】ところで、前記半スル
ホール付き多層配線板の製造方法には、次のような不都
合な問題がある。先ず金型(プレス)加工の場合は、ス
ルホール内壁面に導体層2を形成したスルホール4を縦
切断した際、前記スルホール4内壁面の導体層2などが
破損(破壊)し、所要の半スルホール形状を保持した半
スルホール付き多層配線板を得られない場合がしばしば
あり、歩留まりなど劣り量産に不向きであるという問題
がある。一方、ルーター加工の場合は、内壁面に導体層
2を形成したスルホール4内に半田6を充填する操作お
よびひのスルホール4を縦切断した後、充填してあった
半田6を除去する操作が必要で工程の繁雑化となるとと
もに、半田を使用することに伴うコストアップになると
いう問題がある。
By the way, the manufacturing method of the multilayer wiring board with a half through hole has the following inconvenient problems. First, in the case of die (press) processing, when the through hole 4 having the conductor layer 2 formed on the inner wall surface of the through hole is longitudinally cut, the conductor layer 2 and the like on the inner wall surface of the through hole 4 is damaged (destroyed), and a required half through hole is formed. In many cases, it is not possible to obtain a multilayer wiring board with a semi-through hole that retains its shape, and there is a problem in that the yield is poor and it is not suitable for mass production. On the other hand, in the case of router processing, the operation of filling the solder 6 in the through hole 4 having the conductor layer 2 formed on the inner wall surface and the operation of longitudinally cutting the through hole 4 and then removing the filled solder 6 are performed. There is a problem that the process becomes complicated because it is necessary and the cost increases due to the use of solder.

【0008】本発明は上記事情に対処してなされたもの
で、歩留まりよく製造できるばかりでなく、信頼性の高
い半スルホール(端子)を備えた多層配線板を容易に得
ることができる製造方法の提供を目的とする。
The present invention has been made in consideration of the above circumstances, and provides a manufacturing method which can not only be manufactured with a high yield but also can easily obtain a multilayer wiring board having a highly reliable half-hole (terminal). For the purpose of provision.

【0009】[0009]

【課題を解決するための手段】本発明に係る半スルホー
ル付き多層配線板の製造方法は、内層配線素板および外
層配線素板を積層し、加熱加圧成型して多層配線板本体
を形成する工程と、前記形成した多層配線板本体の所定
位置にスルホールを穿設し、このスルホール内壁面に導
体層を形成する工程と、前記内壁面に導体層を形成した
スルホールをプレス加工によって縦切断して半スルホー
ル化する工程とを具備する半スルホール付き多層配線板
の製造方法において、前記積層する内層配線素板のスル
ホール穿設領域面に導体箔層を介在させておくことを特
徴とする。
According to the method of manufacturing a multilayer wiring board with a half-through hole according to the present invention, an inner wiring board and an outer wiring board are laminated and heat-press molded to form a multilayer wiring board body. A step of forming a through hole at a predetermined position of the formed multilayer wiring board main body, forming a conductor layer on the inner wall surface of the through hole, and longitudinally cutting the through hole having a conductor layer formed on the inner wall surface by pressing. In the method for manufacturing a multilayer wiring board with a half through hole, the method comprises the step of forming a half through hole to form a half through hole.

【0010】そして、このような手段を採る本発明は、
内層配線素板および外層配線素板を積層する過程におい
て、内層配線素板の被スルホール穿設領域に、回路パタ
ーンを成す導体層があればそのまま、回路パターンを成
す導体層がないときはダミーの導体箔層を内層・介在さ
せておくと、内壁面に形成されている導体層などの破損
ないし損傷を招来せずに(所定の半スルホール形状を保
持)、プレス加工により縦切断し得るとの知見に基づく
ものである。
The present invention adopting such means is
In the process of stacking the inner wiring base plate and the outer wiring base plate, if there is a conductor layer forming a circuit pattern in the through hole drilled area of the inner wiring base plate, if there is no conductor layer forming the circuit pattern, a dummy If a conductor foil layer is provided as an inner layer, it can be longitudinally cut by pressing without causing damage or damage to the conductor layer formed on the inner wall surface (maintaining a predetermined half-through hole shape). It is based on knowledge.

【0011】[0011]

【作用】上記本発明に係る製造手段によれば、半スルホ
ール領域の基材端面の破壊ないし損傷が解消され、また
スルホール内壁面の導体層の剥離・損傷も全面的に解消
されて、信頼性の高い半スルホール付き多層配線板を繁
雑な工程など要せず容易に、かつ歩留まりよく製造し得
る。
According to the above-mentioned manufacturing means of the present invention, the destruction or damage of the end face of the base material in the half-through hole region is eliminated, and the peeling and damage of the conductor layer on the inner wall surface of the through hole is also eliminated completely, thereby improving reliability. A multi-layer wiring board with a high through-hole can be easily manufactured with high yield without requiring complicated steps.

【0012】[0012]

【実施例】以下図1〜図3を参照して本発明の実施例を
説明する。
Embodiments of the present invention will be described below with reference to FIGS.

【0013】図1〜図3は本発明に係る半スルホール付
き多層配線板の製造方法の実施態様例を模式的に示す斜
視図であって、たとえば次のように行われる。
1 to 3 are perspective views schematically showing an embodiment of the method for manufacturing a multilayer wiring board with half-through holes according to the present invention, which is carried out as follows, for example.

【0014】先ず、所要の回路パターンが主面に形成さ
れている内層配線素板8、外層配線素板9、プリプレグ
10、および銅箔片11を用意して、これらを図1に示すよ
うに積層する。この積層において、前記銅箔片11は内層
配線素板8の穿設されるスルホール穿設予定領域面に積
層される。次いで、前記積層体を常套の手段によって加
熱加圧成型して、図2に示すような多層配線板本体12を
形成する。
First, the inner layer wiring base plate 8, the outer layer wiring base plate 9 and the prepreg on which the required circuit patterns are formed on the main surface.
10 and the copper foil piece 11 are prepared, and these are laminated as shown in FIG. In this stacking, the copper foil piece 11 is stacked on the surface of the inner layer wiring base plate 8 where the through hole is to be drilled. Next, the laminate is heat-pressed and molded by a conventional means to form a multilayer wiring board body 12 as shown in FIG.

【0015】しかる後、前記形成した多層配線板本体12
の所定位置に、常套の手段によってスルホール13を穿設
し、このスルホール内壁面に、たとえば化学めっきおよ
び電気めっきによって所要の導体層(図示せず)を一体
的に被着・形成して、図3に示すようなスルホール13内
壁面に導体層を形成した多層配線板を得る。次に、上記
で得た多層配線板について、前記内壁面に所要の導体層
が被着・形成されたスルホール13を、ほぼ2分して縦切
断するようにプレス加工する。なお、このプレス加工自
体の実施態様は、前記図6に図示した場合と同様であ
る。上記プレス加工でスルホール13をほぼ2分して縦切
断することによって、半スルホール部(半スルホール
面)などに全く損傷が認められない(換言すると信頼性
の高い接続端子として機能する)半スルホール付き多層
配線板が容易に得られる。
Thereafter, the multilayer wiring board body 12 formed as described above
A through hole 13 is formed at a predetermined position of the through hole by a conventional means, and a required conductor layer (not shown) is integrally deposited and formed on the inner wall surface of the through hole by, for example, chemical plating and electroplating. A multilayer wiring board in which a conductor layer is formed on the inner wall surface of the through hole 13 as shown in 3 is obtained. Next, the multilayer wiring board obtained above is press-worked so that the through hole 13 in which a required conductor layer is adhered and formed on the inner wall surface is cut into two substantially vertically and cut. The embodiment of the press working itself is the same as that shown in FIG. By cutting the through hole 13 in half by the above press work and cutting it vertically, no damage is observed in the half through hole part (half through hole surface) (in other words, it functions as a highly reliable connection terminal) With a half through hole A multilayer wiring board can be easily obtained.

【0016】なお、上記においては、内層配線素板8お
よび外層配線素板9を積層する過程で、内層配線素板の
スルホール穿設領域面に導体箔片11を介在させたが、内
層配線素板のスルホール穿設領域面に、たとえば接続用
のランドなど形成されている場合、改めて導体箔片11を
介在させなくともよい。また、前記では外層配線素板9
を回路パターン化して積層一体化した場合を例示した
が、スルホール13内壁面に所要の導電層を形成した後、
外層配線素板9についての回路パターン化を行ってもよ
い。
In the above description, the conductor foil piece 11 is interposed on the surface of the through hole drilling region of the inner layer wiring base plate in the process of laminating the inner layer wiring base plate 8 and the outer layer wiring base plate 9. If a land for connection is formed on the surface of the through hole of the plate, it is not necessary to interpose the conductive foil piece 11 again. Further, in the above, the outer layer wiring base plate 9
Although the case of laminating and integrating the circuit pattern is illustrated, after forming a required conductive layer on the inner wall surface of the through hole 13,
The outer layer wiring base plate 9 may be patterned into a circuit.

【0017】[0017]

【発明の効果】上記説明したように、本発明に係る多層
配線板の製造方法によれば、端子を構成する半スルホー
ルの形状崩れや導電層の剥離など起こさずに、所要の半
スルホール付き多層配線板を、繁雑な操作なども要せず
に製造し得る。つまり、電気的に信頼性が高く、また寸
法精度(形状精度)の良好な半スルホール付き多層配線
板を、比較的低コストでかつ歩留まりよく製造し得る。
As described above, according to the method for manufacturing a multilayer wiring board according to the present invention, the required multi-layer with a half through hole can be formed without the shape of the half through hole forming the terminal being deformed or the conductive layer being peeled off. The wiring board can be manufactured without requiring complicated operations. That is, it is possible to manufacture a multilayer wiring board with a half through hole, which is electrically highly reliable and has good dimensional accuracy (shape accuracy), at relatively low cost and with good yield.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係る半スルホール付き多層配線板の製
造方法の実施態様例において内層配線素板および外層配
線素板の積層状態を示す斜視図。
FIG. 1 is a perspective view showing a laminated state of an inner layer wiring base plate and an outer layer wiring base plate in an embodiment example of a method for manufacturing a multilayer wiring board with half-holes according to the present invention.

【図2】本発明に係る半スルホール付き多層配線板の製
造方法の実施態様例において内層配線素板および外層配
線素板の積層一体化した状態を示す斜視図。
FIG. 2 is a perspective view showing a state in which an inner layer wiring base plate and an outer layer wiring base plate are laminated and integrated in an embodiment example of a method for manufacturing a multilayer wiring board with half-through holes according to the present invention.

【図3】本発明に係る半スルホール付き多層配線板の製
造方法の実施態様例において多層配線板本体の所定位置
に穿設したスルホール内壁面に導電層を形成した状態を
示す斜視図。
FIG. 3 is a perspective view showing a state in which a conductive layer is formed on an inner wall surface of a through hole formed at a predetermined position of a multilayer wiring board main body in an embodiment example of a method for manufacturing a multilayer wiring board with a half through hole according to the present invention.

【図4】半スルホール付き多層配線板の要部構成例を示
す斜視図。
FIG. 4 is a perspective view showing a configuration example of a main part of a multilayer wiring board with a half through hole.

【図5】従来の半スルホール付き多層配線板の製造方法
の実施態様において多層配線板本体の所定位置に穿設し
たスルホール内壁面に導電層を形成した状態を示す斜視
図。
FIG. 5 is a perspective view showing a state in which a conductive layer is formed on an inner wall surface of a through hole formed at a predetermined position of a multilayer wiring board main body in an embodiment of a conventional method for manufacturing a multilayer wiring board with a half through hole.

【図6】従来の半スルホール付き多層配線板の製造方法
の実施態様において内壁面に導電層を形成したスルホー
ルを金型で縦切断する状態を示す斜視図。
FIG. 6 is a perspective view showing a state in which a through hole having a conductive layer formed on an inner wall surface thereof is vertically cut by a mold in an embodiment of a conventional method for manufacturing a multilayer wiring board with a half through hole.

【図7】従来の半スルホール付き多層配線板の製造方法
の実施態様において内壁面に導電層を形成しさらに半だ
を充填したスルホールをルーターで縦切断する状態を示
す斜視図。
FIG. 7 is a perspective view showing a state in which a conductive layer is formed on an inner wall surface and a through hole filled with a half is vertically cut by a router in an embodiment of a conventional method for manufacturing a multilayer wiring board with a half through hole.

【符号の説明】[Explanation of symbols]

1、12…多層配線板本体 2…導電層 3…半スル
ホール(端子) 4、13…スルホール 5…金型
6…半だ 7…ルータービット 8…内層配線素板
9…外層配線素板 10…プリプレグ 11…銅箔片
1, 12 ... Multilayer wiring board main body 2 ... Conductive layer 3 ... Half through hole (terminal) 4, 13 ... Through hole 5 ... Mold
6 ... Half 7 ... Router bit 8 ... Inner wiring board
9 ... Outer layer wiring board 10 ... Prepreg 11 ... Copper foil piece

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 内層配線素板および外層配線素板を積層
し、加熱加圧成型して多層配線板本体を形成する工程
と、 前記形成した多層配線板本体の所定位置にスルホールを
穿設し、このスルホール内壁面に導体層を形成する工程
と、 前記内壁面に導体層を形成したスルホールをプレス加工
によって縦切断して半スルホール化する工程とを具備す
る半スルホール付き多層配線板の製造方法において、 前記積層する内層配線素板のスルホール穿設領域面に導
体箔層を介在させておくことを特徴とする半スルホール
付き多層配線板の製造方法。
1. A step of stacking an inner layer wiring base plate and an outer layer wiring base plate and forming the multilayer wiring board main body by heating and pressurizing, and forming a through hole at a predetermined position of the formed multilayer wiring board main body. A method for manufacturing a multilayer wiring board with a half-through hole, comprising: a step of forming a conductor layer on the inner wall surface of the through-hole; and a step of longitudinally cutting the through-hole having the conductor layer formed on the inner wall by press working to form a half-through hole. 2. The method for manufacturing a multilayer wiring board with a half through hole, wherein a conductor foil layer is interposed on the surface of the through hole punching region of the laminated inner wiring board.
JP33676691A 1991-12-19 1991-12-19 Manufacture of multilayer wiring board provided with semi-through-hole Withdrawn JPH05167261A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33676691A JPH05167261A (en) 1991-12-19 1991-12-19 Manufacture of multilayer wiring board provided with semi-through-hole

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33676691A JPH05167261A (en) 1991-12-19 1991-12-19 Manufacture of multilayer wiring board provided with semi-through-hole

Publications (1)

Publication Number Publication Date
JPH05167261A true JPH05167261A (en) 1993-07-02

Family

ID=18302503

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33676691A Withdrawn JPH05167261A (en) 1991-12-19 1991-12-19 Manufacture of multilayer wiring board provided with semi-through-hole

Country Status (1)

Country Link
JP (1) JPH05167261A (en)

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