JPH05165427A - Scanning line driving circuit - Google Patents

Abstract

PURPOSE:To eliminate overlap in which each scanning line control line of an image part is turned on simultaneously and to prevent power consumption from increasing and picture quality from being lowered in a two-dimensional image device by comprising a circuit so as to turn on the next output transistor after an output transistor at a preceding stage is completed turned off. CONSTITUTION:This circuit is comprised of the output transistors T1-Tn connected to the scanning line control lines S1-Sn of the image part 1, respectively, and a control circuit 3 which outputs control signals P1-Pn to turn on/off the output transistors T1-Tn sequentially and cyclically. In such a case, the control signals P1-Pn outputted from the control circuit 3 and the collector voltage of the output transistor at the preceding stage, i.e. the output transistor Tn for T1, the output transistor T1 for T2, or the output transistor Tn-1 for Tn are inputted to AND elements A1-An, respectively. Those AND signals are inputted to the bases of the output transistors T1-Tn, respectively.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a scanning line driving circuit for a two-dimensional image device such as a display panel or a printing device.

[0002]

2. Description of the Related Art FIG. 5 shows a conventional scanning line driving circuit.
It is a principal part circuit diagram of a three-dimensional image device. In FIG. 4, 1 is
S in the image section₁, S₂, S₃... S_nN scanning line control
Your line and D₁, D₂, D₃... D_mM days of
Control line and scan line control line and data
Each pixel S is located at the intersection of control lines._a・ D_b(However
Where a is the scan line control line number and b is the data control line
, The same applies hereinafter) are provided in total N × M.
It 2 is a scanning line drive circuit, which is a scanning line control line S ₁, S
₂, S₃... S_nThe collectors are connected to
Output emitters that are each grounded
T₁, T₂, T₃... T_nAnd these output transitions
Connect these output transistors to each base of the
Control signal P to turn on / off₁, P₂, P₃... P_nTo
It consists of a control circuit 3 that outputs cyclically in sequence.
It

Now, the control signal P from the control circuit 3₁Is output
Output transistor T₁Turns on and the scan line control line
S₁Turns on. This scanning line control line S₁Is on
During the period of, each data control from the data control circuit (not shown)
Your line D₁, D₂, D₃... D_mIn contrast, scan line control
Your line S₁Upper pixel S₁D₁, S₁D₂, S₁D₃・
..S₁D_mWhether to turn on (ON) for each of
(OFF) data signal Q₁, Q₂, Q₃... Q_mBut
Output, scanning line control line S₁ON and each data control
Line D₁, D₂, D₃... D_mRespectively entered in
Data signal Q ₁, Q₂, Q₃... Q_mOn with A
Pixels at necessary locations are turned on by the ND signal. Then control
Control signal P from circuit 3₁Is cut off P₂Is output
And the scan line control line S₁Is off S₂Turns on and runs
Line control line S₂ON and each data control line D₁,
D₂, D₃... D_mData signal input to each
Q ₁, Q₂, Q₃... Q_mDepending on the AND signal with ON
Pixels at the required locations are turned on. Sequentially S₃, S_Four・
..S_n, S₁, S₂... and the above-mentioned movement cyclically
The work is repeated to form a two-dimensional image.

[0004]

In the scanning line drive circuit described above, a control signal for cyclically turning on / off each output transistor is cyclically output from the control circuit. Capacitance between the scan line control line connected to the collector and the ground causes a delay in the rising of the collector voltage to extend the ON period, resulting in an overlap that turns ON at the same time as the output transistor that turns ON next. There's a problem.

FIG. 6 shows the operation waveforms. Now, focusing on the output transistor T _a (where a is the number of the output transistor and corresponds to the scanning line control line a, the same applies hereinafter), FIG. As shown in 2), the previous stage transistor T
control signal P _a-1 to _a-1 is switched from ON to OFF,
As shown in FIG. 6 (1), the collector voltage is delayed in rising and is turned on for a long time due to the capacitance between the connected scan line control line S _a-1 and the ground.
On the other hand, in the output transistor T _a , the control signal P _a is switched from OFF to ON as shown in FIG. 6 (4), and the collector voltage thereof is the same as that of the scanning line control line as shown in FIG. 6 (3). There is _a delay in the fall due to the capacitance between S _a and ground, but in this case, the turning on starts at the same time that the control signal P _a turns on. Therefore, the output transistor T of the preceding stage
_When the ON period of a is extended, an overlap occurs in which these output transistors T _a-1 and T _a are simultaneously turned on. When the overlap with the output transistor of the preceding stage occurs, power consumption increases and image quality deteriorates.

An object of the present invention is to solve the above-mentioned problems and to turn on the next output transistor (after the collector voltage thereof rises sufficiently) after the output transistor of the preceding stage is completely turned off. Another object of the present invention is to provide a scanning line driving circuit that prevents overlap between output transistors.

[0007]

In order to achieve the above-mentioned object, the present invention provides a plurality of scanning line control lines of the image portion of a two-dimensional image device, the collectors of which are respectively connected and the emitters of which are grounded. A scanning line drive circuit comprising an output transistor and a control circuit for sequentially and cyclically outputting a control signal for turning on / off the output transistor to the base of each of the output transistors, wherein the control circuit is provided at the base of each of the output transistors. The AND signal of the control signal output from the output terminal and the collector voltage of the output transistor of the previous stage is input. Alternatively, the control signal output from the control circuit to the base of each output transistor, and the collector voltage of the output transistor of the preceding stage divided by the voltage dividing resistor connected between the collector and the base of the output transistor of the preceding stage The AND signals of and are input respectively. Alternatively, the control signal output from the control circuit is added to the base of each output transistor and the collector voltage of the output transistor of the preceding stage delayed by the capacitor connected between the collector and the base of the output transistor of the preceding stage is ANDed. Allow each signal to be input.

[0008]

In the scanning line drive circuit of the present invention, the AND signal of the control signal output from the control circuit and the collector voltage of the output transistor of the preceding stage is input to the base of each output transistor. After the collector voltage of the output transistor of rises sufficiently, that is, after the output transistor of the previous stage is turned off, the control signal for turning on this output transistor comes to be input to the base of the next output transistor. Overlaps that turn on at the same time are prevented. In addition, a voltage dividing resistor is connected between the collector and the emitter of the output transistor of the preceding stage, and the AND signal of the collector voltage of the output transistor of the preceding stage divided by this voltage dividing resistor and the control signal output from the control circuit is Since the input is made to the output transistor, it can be applied even when the collector voltage of the output transistor is high. Furthermore, a capacitor is connected between the collector and the emitter of the output transistor of the previous stage, and the AND signal of the collector voltage of the previous stage delayed by this capacitor and the control signal output from the control circuit is input to each output transistor. Therefore, the delay of the collector voltage of the output transistor of the preceding stage causes the next output transistor to turn on later, and the overlap between these output transistors can be prevented more reliably.

[0009]

1 is a circuit diagram of a main part of a two-dimensional image device using an embodiment of a scanning line driving circuit according to the present invention. The scanning line driving circuit of the present invention shown in FIG. 1 differs from the conventional scanning line driving circuit shown in FIG. 5 in that each control signal P ₁ , P ₂ , P ₃ ... P _n output from the control circuit 3 is different. And the output transistor of the previous stage, that is, T for the output transistor T ₁ .
_n , T ₁ for the output transistor T ₂ , ... And the collector voltage of the output transistor of the preceding stage of T _a-1 for the output transistor T _a are AND elements A ₁ , A, respectively.
₂ , A ₃ ... A _n , and these AND signals are input to the respective bases of the output transistors T ₁ , T ₂ , T ₃ ... T _n. ..

FIG. 4 shows its operation waveform. Now, focusing on the output transistor T _a , as shown in FIG. 4B, the control signal P _a-1 of the output transistor T _{a-1 at} the preceding stage is turned on. However, as shown in FIG. 4 (1), the collector voltage of the collector line is delayed by the electrostatic capacitance between the connected scan line control line S _a-1 and the ground, and the on period is extended. To be done. On the other hand, the relevant output transistor T
_4a , the control signal P _a is switched from off to on as shown in FIG. 4 (4), but the collector voltage of the output transistor T _a-1 shown in FIG. 4 (1) is ANDed with this control signal P _a.
Signal is as shown in FIG. 4 (5), the collector voltage of the preceding stage transistor T _a-1 is sufficiently ramps up, i.e., the output transistor T _a-1 of the preceding stage from off of the output transistor T _a A control signal for turning on the output transistor is input to the base. Therefore, the overlap in which the output transistor T _{a-1 in the} preceding stage and the corresponding output transistor T _a are simultaneously turned on is prevented.

FIG. 2 shows another embodiment of the scanning line driving circuit of the present invention.
FIG. 2 is a circuit diagram showing an example, which is the scanning line driving of the present invention shown in FIG. 1.
Different from the dynamic circuit, each output transistor T₁，
T₂, T ₃... T_nBetween the collector and emitter of
Resistor R connected in series₁, R ₁, R₂, R₂,
R₃, R₃... R_n, R_nA voltage divider consisting of
Each output transistor T₁, T₂, T₃... T_nof
Instead of the collector voltage, the voltage
The AND voltage of each AND element A₂, A₃... A_n, A₁
There is a point to be input to. Therefore, the output transistor
It is applicable even when the voltage of the actuator is high.

FIG. 3 shows a further difference of the scanning line driving circuit of the present invention.
FIG. 2 is a circuit diagram showing an embodiment of the present invention, and the scanning of the present invention shown in FIG.
The difference from the line drive circuit is that each output transistor T₁，
T₂, T₃... T_nBetween the collector and emitter of
Capacitor C₁, C₂, C ₃... C_nIs connected,
Each output transistor T₁, T₂, T₃... T_nThis
Voltage is delayed by these capacitors and each AND element is delayed.
A₂, A₃... A_n, A₁There is a point to be input to. Servant
The output transistor T of the previous stage_a-1Of collector voltage
Due to the delay, the corresponding output transistor T_aIs later
These output transistors T_a-1, T
_aOverlap between them is more reliably prevented. These
C Densa C₁, C₂, C₃... C_nIn Figure 2
Main transistor T₁, T₂, T₃... T_nIs the partial pressure of
Of course, it has the same effect on the collector voltage.
In case of resistance r₁, R₂, R₃... r_nIn parallel with
These capacitors C₁, C₂, C₃... C_nThat
Connection.

The scanning line driving circuit of the present invention is a semiconductor I.
Often configured as C.

[0014]

As described above, according to the present invention, in a two-dimensional image device such as a display panel or a printing device, the overlap in which the scanning line control lines of the image section are simultaneously turned on is prevented, so that the power consumption is reduced and the image quality is improved. At present, in these two-dimensional image devices, there is a strong demand for low power consumption and high image quality, and the effect is great.

[Brief description of drawings]

FIG. 1 is a schematic diagram of a scanning line driving circuit according to an embodiment of the present invention;
Circuit diagram of main part of 3D imager

FIG. 2 is a circuit diagram showing another embodiment of the scanning line driving circuit of the present invention.

FIG. 3 is a circuit diagram showing still another embodiment of the scanning line driving circuit of the present invention.

FIG. 4 is a waveform diagram showing the operation of the scanning line drive circuit of the present invention shown in FIG.

FIG. 5 is a circuit diagram of a main part of a two-dimensional image device using a conventional scanning line drive circuit.

6 is a waveform chart showing the operation of the conventional scanning line drive circuit shown in FIG.

[Explanation of symbols]

1 image unit 2 scan line driving circuit 3 control circuit S _a scan-line control line (where a is an order number) P _a control signal (where a is an order number) T _a output transistor (where a represents the order No.) a _a the aND element (provided that a is a number indicating the order) R _a divider resistors (provided that a is a number indicating the order) r _a divider resistors (provided that a is a number indicating the order) C _a capacitor (where a is (Number indicating the order)

Claims (3)

[Claims] 1. A plurality of output transistors whose collectors are respectively connected to respective scanning line control lines of an image section of a two-dimensional image device and whose emitters are respectively grounded, and output these to respective bases of these output transistors. In a scanning line drive circuit including a control circuit that sequentially and cyclically outputs a control signal that turns on and off a transistor, a control signal output from the control circuit to the base of each output transistor, and a collector of the output transistor of the previous stage. A scanning line driving circuit, wherein an AND signal with a voltage is input respectively. 2. A plurality of output transistors whose collectors are respectively connected to respective scanning line control lines of an image section of a two-dimensional image device and whose emitters are respectively grounded, and output these to respective bases of these output transistors. In a scanning line drive circuit including a control circuit that sequentially and cyclically outputs a control signal that turns on and off a transistor, the control signal output from the control circuit and the output transistor of the preceding stage are provided on the bases of the output transistors. A scanning line driving circuit, wherein an AND signal with the collector voltage of the output transistor at the previous stage divided by a voltage dividing resistor connected between the collector and the base is input. 3. A plurality of output transistors whose collectors are respectively connected to respective scanning line control lines of an image section of a two-dimensional image device and whose emitters are respectively grounded, and output these to respective bases of these output transistors. In a scanning line drive circuit including a control circuit that sequentially and cyclically outputs a control signal that turns on and off a transistor, the control signal output from the control circuit and the output transistor of the preceding stage are provided on the bases of the output transistors. A scanning line drive circuit, wherein AND signals with the collector voltage of the output transistor of the preceding stage delayed by a capacitor connected between the collector and the base are input, respectively.