JPH05145005A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH05145005A JPH05145005A JP30368191A JP30368191A JPH05145005A JP H05145005 A JPH05145005 A JP H05145005A JP 30368191 A JP30368191 A JP 30368191A JP 30368191 A JP30368191 A JP 30368191A JP H05145005 A JPH05145005 A JP H05145005A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- fuse
- excessive current
- semiconductor chip
- burn
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device.
【0002】[0002]
【従来の技術】半導体装置のバーイン実施時、バーイン
の条件や半導体装置の回路構成,製造プロセス,出来映
え等によっては、半導体装置にショートやラッチアップ
を誘発し、過大電流が流れてしまう場合がある。2. Description of the Related Art During the burn-in of a semiconductor device, depending on the burn-in conditions, the circuit configuration of the semiconductor device, the manufacturing process, the performance, etc., a short circuit or latch-up may be induced in the semiconductor device, causing an excessive current to flow. .
【0003】この過大電流は、半導体装置の破壊や半導
体装置リードメッキの変色,融解のみならず、バーイン
ボードのICソケットの焼損やバーイン装置からの供給
電源遮断を招く場合があり、問題である。This excessive current is a problem because it may cause not only destruction of the semiconductor device, discoloration and melting of the semiconductor device lead plating, but also burnout of the IC socket of the burn-in board and interruption of power supply from the burn-in device.
【0004】これらの問題に対処する為、従来技術は図
3に示すように、バーインボード9のICソケット8に
接続される信号配線11の間に抵抗10を挿入してい
る。この抵抗10により、バーイン時の半導体装置のシ
ョートやラッチアップによる過大電流を抑えようという
ものである。In order to deal with these problems, in the prior art, as shown in FIG. 3, a resistor 10 is inserted between the signal wiring 11 connected to the IC socket 8 of the burn-in board 9. The resistor 10 suppresses an excessive current due to a short-circuit or latch-up of the semiconductor device at the time of burn-in.
【0005】[0005]
【発明が解決しようとする課題】この従来技術では、電
気的信号は、抵抗を介して、半導体装置に印加されるこ
とになる為、実際に半導体装置に印加される電気的信号
は、抵抗分の電圧降下を伴ったり、信号が矩形波の場
合、波形になまりを生じたりし、正確なバーインが困難
であった。In this prior art, since the electric signal is applied to the semiconductor device via the resistor, the electric signal actually applied to the semiconductor device is the resistance component. However, if the signal is a rectangular wave, the waveform may be rounded, which makes accurate burn-in difficult.
【0006】又、抵抗の接続がしっかりしてないと、大
電流による加熱で抵抗が外れてしまい、半導体装置に電
気的信号が印加されなくなり、実質、バーインされなか
ったことになる。点検、補修も時間がかかり、複雑なも
のになっていた。If the resistors are not firmly connected, the resistors will be removed by heating with a large current, and no electrical signal will be applied to the semiconductor device, which means that the semiconductor device is not burned in. Inspections and repairs were also time-consuming and complicated.
【0007】さらには、装置基板に実装された半導体装
置が、実使用時に故障し、過大電流が流れるような場
合、その半導体装置接続又は、接触している部品や装置
そのものに悪影響を与えるという問題もある。Furthermore, when the semiconductor device mounted on the device substrate fails during actual use and an excessive current flows, the connection of the semiconductor device or the parts in contact or the device itself is adversely affected. There is also.
【0008】[0008]
【課題を解決するための手段】本発明の半導体装置は、
半導体チップと電気的に導通をとるリードの一部がヒュ
ーズとなっている。The semiconductor device of the present invention comprises:
A part of the lead electrically connected to the semiconductor chip is a fuse.
【0009】[0009]
【実施例】次に本発明について図面を参照して説明す
る。図1(a),(b)は、本発明の第1の実施例で図
1(a)は平面図、図1(b)は図1(a)のA−A箇
所の断面図である。The present invention will be described below with reference to the drawings. 1A and 1B show a first embodiment of the present invention, FIG. 1A is a plan view, and FIG. 1B is a sectional view taken along the line AA of FIG. 1A. .
【0010】図1(a),(b)に示すように、半導体
チップに電気的信号を伝えるリード2の間にヒューズ3
を有する。過大電流が半導体チップ1に流れるような場
合、ヒューズ3が溶断し、リード2を通じて半導体チッ
プ1に流れる電流を断つことができる。As shown in FIGS. 1A and 1B, a fuse 3 is provided between leads 2 for transmitting an electric signal to a semiconductor chip.
Have. When an excessive current flows into the semiconductor chip 1, the fuse 3 is blown and the current flowing through the lead 2 to the semiconductor chip 1 can be cut off.
【0011】図2は本発明の第2の実施例を示す要部断
面図である。図2に示すように、半導体チップのパッド
電極5と電気的信号を伝えるリード7の接続にヒューズ
6を用いたものである。過大電流が、半導体チップ1に
流れるような場合、ヒューズ6が溶断し、リード2を通
じて半導体チップ1に流れる電流を断つことができる。FIG. 2 is a sectional view of the essential parts showing a second embodiment of the present invention. As shown in FIG. 2, a fuse 6 is used to connect the pad electrode 5 of the semiconductor chip and the lead 7 for transmitting an electric signal. When an excessive current flows in the semiconductor chip 1, the fuse 6 is blown and the current flowing in the semiconductor chip 1 through the lead 2 can be cut off.
【0012】[0012]
【発明の効果】以上説明したように本発明は、半導体チ
ップと電気的に導通をとるリードの一部がヒューズとな
っているので、半導体チップに過大電流が流れるような
異常時には、ヒューズが溶断し、半導体チップに流れる
過大電流を断つ為、半導体装置に接続又は接触している
部品や装置に悪影響を及ぼさない。As described above, according to the present invention, since a part of the lead electrically connected to the semiconductor chip is a fuse, the fuse is blown in the case of an abnormality such as an excessive current flowing through the semiconductor chip. However, since the excessive current flowing through the semiconductor chip is cut off, it does not adversely affect the parts or devices connected to or in contact with the semiconductor device.
【0013】又、ヒューズの溶断により半導体装置その
ものを不良とする為、簡単な電気的特性チェックで、こ
のような異常な半導体装置を除去できる効果もある。Further, since the semiconductor device itself is defective due to the blow of the fuse, such an abnormal semiconductor device can be removed by a simple electrical characteristic check.
【図1】本発明の第1の実施例の平面図(a)および平
面図(a)のA−A箇所の断面図(b)である。FIG. 1 is a plan view (a) of the first embodiment of the present invention and a sectional view (b) taken along the line AA in the plan view (a).
【図2】本発明の第2の実施例の要部断面図である。FIG. 2 is a cross-sectional view of essential parts of a second embodiment of the present invention.
【図3】従来技術の半導体装置の要部平面図である。FIG. 3 is a plan view of a main part of a conventional semiconductor device.
1,4 半導体チップ 2,7 リード 3,6 ヒューズ 5 パッド電極 8 ICソケット 9 バーインボード 10 抵抗 11 信号配線 1,4 Semiconductor chip 2,7 Lead 3,6 Fuse 5 Pad electrode 8 IC socket 9 Burn-in board 10 Resistance 11 Signal wiring
Claims (1)
ドの一部がヒューズとなっていることを特徴とする半導
体装置。1. A semiconductor device, wherein a part of a lead electrically connected to a semiconductor chip is a fuse.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP30368191A JPH05145005A (en) | 1991-11-20 | 1991-11-20 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP30368191A JPH05145005A (en) | 1991-11-20 | 1991-11-20 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH05145005A true JPH05145005A (en) | 1993-06-11 |
Family
ID=17923960
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP30368191A Withdrawn JPH05145005A (en) | 1991-11-20 | 1991-11-20 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH05145005A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6507264B1 (en) | 2000-08-28 | 2003-01-14 | Littelfuse, Inc. | Integral fuse for use in semiconductor packages |
-
1991
- 1991-11-20 JP JP30368191A patent/JPH05145005A/en not_active Withdrawn
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6507264B1 (en) | 2000-08-28 | 2003-01-14 | Littelfuse, Inc. | Integral fuse for use in semiconductor packages |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 19990204 |