JPH05143691A - Automatic wiring system - Google Patents

Abstract

PURPOSE:To accelerate wiring processing by performing the detail wiring of plural pins and nets whose rough wiring routes are set independently with each other in parallel by plural computers when the automatic wiring processing of an integrated circuit and a printed board is performed. CONSTITUTION:When the automatic wiring processing is performed on the integrated circuit and the printed board, each computer takes the partial charge of the processing by dividing a wiring area classified by every layer into belt shape wiring areas along the wiring direction of the layer, then, the plural computers take the partial charge of the same belt shape wiring areas, and a pair of pins are allocated to a computer group to which no pair of pins in which the rough wiring routes 31-34 representing through which area of the wiring the wiring route of the pair of pins to be wired should pass are not intersected are allocated in the computer over which the rough wiring routes are spreading, and each computer group performs parallel processing by performing the detail wiring of the allocated pair of pins respectively in parallel in the rough wiring routes 31-34.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic wiring system for performing wiring processing on an integrated circuit or a printed circuit board by parallel processing of a plurality of computers.

[0002]

2. Description of the Related Art In the conventional automatic wiring system, the wiring area is treated as a grid, all the grids are secured in a storage area, and each grid is labeled from the grid corresponding to the terminal to be wired based on wavefront propagation. Then, when the wavefront reaches the target terminal, there is a "maze method" that reverses the label and completes the path, and the wiring area is shared by each processor constituting the parallel computer and the wavefront propagation is performed in parallel. The method is well known.

This conventional technique is described in detail in 1986, "Information Processing Society of Japan", "Prototype Research of Parallel Routing Processor".

Further, as an automatic wiring method using parallelism between rough wiring paths, each computer divides a wiring area and takes charge of each wiring area. Each computer takes charge of obstacles included in its own wiring area and Obstacles themselves exist in the adjacent area, but remember the attributes and positions of the obstacles where the influence of the obstacles on your area due to the design rules, remember the design rules from the corners of those obstacles. Generate a corner point at a distance that satisfies the condition, generate an escape line that avoids the obstacle based on that corner point, and obtain a rough wiring route that shows a rough wiring route in advance. In addition, the computer group that is in charge of the area including the rough wiring route of a certain net is designed to connect terminals from among the escape lines in the rough wiring area. Exploring the road, the computer group that computer do not overlap with each other for constituting the computer group while others that multiple groups simultaneously perform a detailed wiring "parallel line search method" (Japanese Patent Application No. 3-128497).

[0005]

In the method in which the "maze method" is parallelized, the object is to parallelize the wiring process for one set of pin pairs to speed up the process. However, since the degree of parallelism inherent in the wiring processing of one pair of pins is not so high, the effect of speeding up by parallel processing cannot be obtained so much.

In the "parallel line segment search method" using parallelism between rough wiring routes, one computer is allocated to each strip-shaped wiring area, so that the rough wiring of the net to be the detailed wiring spans. If the strip-shaped wiring regions are not independent, it is impossible to proceed with the wiring processing at the same time even if the schematic wiring paths themselves are independent.

[0007]

An automatic wiring system according to the present invention is an automatic wiring system in which wiring processing in a multilayer wiring area of an integrated circuit or a printed circuit board is processed in parallel by a plurality of computers connected by a connection network. , The wiring area is divided into layers into strip-shaped wiring areas along the wiring direction of each layer, and the respective computers share the same. At that time, the same strip-shaped wiring area is shared by a plurality of computers. Obstacles included in the strip-shaped wiring area in charge of and the obstacle itself exist in the adjacent area, but the attribute and position of the obstacle where the influence of the obstacle affects your own area by the design rule are set. The memorize and generate a corner point at a distance from the corners of the obstacles that satisfies the design rule, and avoid the obstacles based on the corner points. Generate-loop line, rough wiring path showing the rough wiring path is previously obtained in advance, then,
The computer group that is in charge of the area including the rough wiring of a net searches the escape line in the rough wiring route for a route for connecting terminals, and the computers that make up the computer group mutually The non-overlapping computer groups are characterized in that a plurality of groups perform detailed wiring simultaneously.

[0008]

According to the present invention, in the automatic wiring process of an integrated circuit or a printed circuit board, a rough wiring route indicating which part of the wiring region the wiring route of the pin pair to be wired should pass is determined, and then the rough wiring is performed. Pin pairs whose paths are independent of each other,
Assign to different computer groups according to the wiring area that each computer is in charge of. At this time, since there are a plurality of computers in charge of the same strip-shaped wiring area, they exist in the same strip-shaped wiring area, but the general wiring can process several pin pairs that are independent of each other at the same time. .. Then, each computer group performs the detailed wiring of the pin pairs assigned thereto in parallel within the rough wiring route, whereby high parallelism is obtained and the wiring processing is speeded up.

Further, since data of obstacles, terminals, existing wirings, etc. existing in the wiring area can be distributed and arranged by using all processors, a large-scale automatic wiring can be performed.

[0010]

EXAMPLES The automatic wiring system of the present invention will be described in detail with reference to examples. In the embodiment shown here, the number of computers is 64.

FIG. 1 shows the distribution of the wiring area by a plurality of computers in the embodiment.
The second layer is a layer for wiring in the X-axis direction, and the second layer is a layer for wiring in the Y-axis direction. There are 64 computers (PE) that perform parallel processing, PE0 and PE1 respectively.
... PE63. In this example, the number of computers that share the same strip-shaped wiring area is two, and the figure? ? As shown by, the computers such as PE0 and PE16 and PE1 and PE17 are in charge of the same strip-shaped wiring area.

FIG. 2 shows a state of pretreatment in the embodiment. Each computer generates a corner point 22 at a position distant from the corner of the obstacle 21 by the allowable range of the design rule based on the information on the obstacle 21. Then, each computer checks whether or not the generated corner point 22 is apart from the obstacle by a distance larger than the allowable range of the design rule, and removes the corner point 22 that does not comply with it. Next, each computer generates an escape line 23 from the corner point 22. This is generated by extending a distance from the corner point 22 along the wiring direction of the layer by a design rule allowable range from an obstacle that first hits.

Since the processing of generating the corner points 22 and the generation of the escape line 23 can be performed by each computer using only the information regarding the area in which it is in charge, communication between computers is not required at all. And
When the processing of all the computers is completed, all the computers are synchronized.

FIG. 3 shows a state in which a computer group in charge of wiring in the general wiring path is divided in this embodiment. In this case, the rough wiring route 31 and the rough wiring route 33
Spans the same strip-shaped wiring region in the Y-axis direction, but since the rough wiring routes themselves do not overlap, a computer group that performs detailed wiring in the rough wiring route 31,
By dividing the computer groups for performing the detailed wiring in the rough wiring route 33, it is possible to perform both the detailed wirings at the same time. In this example, since the number of computers in charge of the overlapping strip-shaped wiring area is two, two such overlappings are allowed. In the case of FIG. 3, the general route 31 is PE.
0, PE1, PE2, PE3, PE33, PE34, P
E35 and PE36 are in charge of detailed wiring, and the general route 33 is P
E9, PE10, PE11, PE12, PE49, PE
50, PE51, PE52, PE53 are in charge of detailed wiring, and the rough path 32 is PE4, PE5, PE6, PE7,
PE42, PE43, PE44, PE45, PE46 are in charge of detailed wiring, and the general wiring 34 is PE24, PE25,
PE26, PE27, PE28, PE29, PE58,
PE59, PE60, PE61 take charge of detailed wiring.

FIG. 4 shows the detailed wiring within each computer group in this embodiment. The escape line 23 generated in advance is trimmed to the escape line 44 in accordance with the outline of the general wiring area.
Next, the search line 43 is generated from the terminals S41 and D42. Search by extending a line from the point with the same coordinates on the layer where the terminal exists and the layer next to it (upper and lower) to the point separated from the obstacle by the allowable range of the design rule along the wiring direction of the layer. It is line 43. These processes are performed by the PE in charge of the wiring area. Then, the terminal S41
The process of searching for the escape line 44 that intersects the search line 43 generated from, and further searching for the escape line 44 that intersects the escape line 44 is repeated until it crosses the search line generated from the terminal D42.
Then, by tracing the escape line in the opposite direction from the direction of the terminal D42, the wiring route is determined.

Then, when the wiring processing of the plurality of computer groups is completed, the process proceeds to the next wiring step.

[0017]

According to the present invention, in the automatic wiring processing of an integrated circuit or a printed circuit board, a general wiring route indicating which part of the wiring region the wiring route of a pin pair to be wired should pass is determined, and then, High parallelism is obtained by assigning pin pairs whose rough wiring routes are independent of each other to different computer groups, and performing parallel processing on the detailed wiring of the pin pairs respectively assigned to the respective computer groups within the rough wiring route. This has the effect of speeding up the wiring process.

[Brief description of drawings]

FIG. 1 is a diagram showing a sharing state of a wiring area by a plurality of computers.

FIG. 2 is a diagram showing a state of preprocessing by a plurality of computers.

FIG. 3 is a diagram showing a state in which a computer group in charge of wiring within a schematic wiring is divided.

FIG. 4 is a diagram showing detailed wiring in each computer group.

[Explanation of symbols]

 21 Obstacle 22 Corner Point 23 Escape Line 31, 32, 33, 34 General Wiring Path 41 Terminal S 42 Terminal D 43 Search Line 44 Escape Line 45 General Path

Claims (1)

[Claims] 1. An automatic wiring system in which wiring processing in a multi-layer wiring area of an integrated circuit or a printed circuit board is processed in parallel by a plurality of computers connected by a connection network, and the wiring area is divided layer by layer along a wiring direction of the layer. Each computer is divided into separate strip-shaped wiring areas, and the same strip-shaped wiring area is shared by multiple computers.
Obstacles included in the strip-shaped wiring area that you are in charge of,
Obstacles themselves exist in the adjacent area, but remember the attributes and positions of obstacles where the influence of the obstacles on your area due to the design rules, and design rules from the corners of those obstacles. A corner point is generated at a distance that satisfies the condition, an escape line that avoids the obstacle is generated based on the corner point, and a rough wiring route showing a rough wiring route is obtained in advance. In addition, the computer group that is in charge of the area including the rough wiring of a certain net
An automatic wiring method that searches for a route to connect the terminals from the lines, and multiple computers perform detailed wiring at the same time for computer groups that do not overlap with each other.