JPH0514307A - Phase adjustment circuit - Google Patents

Abstract

PURPOSE:To adjust the phase shift of an active line while data are transmitted through the line by delaying a timing of a signal from an FF applied to a 2nd variable phase shifter whose phase shift quantity is changed in an opposite direction to a phase shift change of a 1st variable phase shifter and selecting the data more than a timing fed to the 1st variable phase shifter by prescribed bits. CONSTITUTION:A 1st variable phase shifter 3 generates n-phase active recovery data having different phase shifts from an input active recovery data and selects he active recovery data of, a phase shift corresponding to an applied selection signal while changing the phase shift sequentially. Then a 2nd variable phase shifter 4 selects any of the n-phase recovery data from an output of a changeover device 26 while changing the phase shift sequentially in an opposite direction to a phase shift change of the phase shifter 3. Then a timing of an FF 5 when an output of the FF 5 generating a selection signal synchronously with the active recovery data is fed to the phase shifter 4 is delayed more than the timing for the phase shifter 1 by n-bits.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase adjustment circuit used when switching between an active digital multiplex radio device and a backup digital multiplex radio device without interruption.

Generally, in a digital multiplex radio system,
Line switching is performed due to equipment failure or fading. In particular, if the line switching time during fading becomes long, the code error rate deteriorates during that time. To prevent this deterioration, line switching is performed while maintaining bit synchronization and frame synchronization between the working line and the protection line. Scheme (ie,
The non-instantaneous switching method is used, but the phase of this line (propagation delay time) while transmitting data on the working line
It is necessary to be able to adjust.

[0003]

2. Description of the Related Art FIG. 4 is a schematic explanatory view of a digital multiplex radio system, and FIG. 5 is a configuration diagram of a conventional example. The drawings will be described below. Since the operation of each series in FIG. 4 is the same, the operation is performed for the # 1 working line.

First, as shown in FIG. 4, one series of protection lines is provided for n series of working lines. Well, the transmitter
The TX ₁ converts the input digital modulation signal of a predetermined format into a transmission signal of a predetermined transmission frequency and a predetermined transmission power, and sends it to the receiving side.

The corresponding receiving unit RX ₁ converts the received modulated signal into a modulated signal in the intermediate frequency band of a predetermined level and applies it to the demodulating unit DEM ₁ . After demodulating, identifying, and synchronizing, the demodulator adds the reproduced data to the switch 11 via the variable phase shifter φ ₁ .

Here, the amount of phase shift of the variable phase shifter has a value such that it is in phase with the reproduction data obtained from the protection line, but this adjustment is performed before the start of operation. On the other hand, the transmitting side and the receiving side of the protection line also perform the same operation as above (no variable phase shifter is provided) and add the reproduced data to the switch.

The switch selects the reproduction data on the working line side when the status of the # 1 working line is normal, but when the status of the # 1 working line is not normal, it selects the reproduction data on the protection line. Select and send to the latter stage.

The line status is monitored by a monitor / control unit (not shown), and when it is detected that the working line is no longer normal, a switching command is sent to the switch. Next, FIG.
As shown in FIG. 5, the variable phase shifter is composed of, for example, a four-stage shift register including flip-flops (hereinafter abbreviated as FF) 21 to 24 and a selector 25.

Now, when the working reproduction data of the # 1 working line is inputted to the shift register, since the output is taken out from each stage, only 1 bit, 2 bits, 3 bits or 4 bits are transferred to the inputted working reproduction data. The 4 series of current reproduction data which are in phase with each other are taken out, and these are the terminals A, B, and B of the selector 25.
Applied to C and D.

When the selector 25 selects, for example, the reproduction data of the # 1 working line, which is phase-shifted by 2 bits, by the applied select signal (this phase shift makes it in phase with the reproduction data of the protection line). The reproduction data is applied to the switch 26, and the reproduction data of the protection line is also applied here.

If the condition of the # 1 working line is normal, the selector is on the selector side, so that the working reproduction data of the # 1 working line is sent to the subsequent stage, but if it is not normal, the switching device is reversed. Then, the spare reproduction data of the spare line is sent to the latter stage.

[0012] Here, in the digital multiplex radio system having the active system / the standby system, since the switching without interruption is performed, the phase of the active system and the phase of the standby system are adjusted before the operation is started.

However, when the working line is expanded later, for example, when the line length from the device to the antenna becomes long and the phase of the expanded working line cannot be adjusted to the best state, it is already adjusted and is in the operating state. There may be a case where the phase adjustment needs to be performed again for the existing working line.

In such a case, when the rising point of the select signal does not coincide with the change point of the data, the data at the rising point is lost. Therefore, the data to be transmitted on the working line is transmitted on the protection line and the working line is transmitted. The phase of the line was adjusted, and when the adjustment was completed, it was restored.

[0015]

As described above, when the working line has been added later and the working line in the operating state has to be re-adjusted,
There is a problem that it is difficult to adjust the phase of the working line unless the protection line is used.

It is an object of the present invention to enable the phase (propagation delay time) of this line to be adjusted while transmitting data on the working line.

[0017]

FIG. 1 is a block diagram showing the principle of the present invention. In the figure, 3 indicates the n-phase working reproduction data having different phase shift amounts from the input working reproduction data, and the phase-shifting amount of the phase-shifting working reproduction data corresponding to the applied selection signal A first variable phase shift means for changing and selecting is a switch 26.

Reference numeral 5 is a flip-flop for generating a selection signal in synchronization with the currently reproduced data, and 4 is n from the output of the switch.
The phase switching reproduction data is generated, and the switching reproduction data having the phase shift amount corresponding to the applied selection signal is sequentially changed in the direction opposite to the phase shift amount changing direction of the first variable phase shift means. Second variable phase shift means for changing and selecting, 6 is an n-bit delay means.

Then, the timing of the flip-flop applied to the second variable phase shift means is delayed by n bits from the timing applied to the first variable phase shift means.

[0020]

According to the present invention, the input selection signal is fetched into the flip-flop by using the clock extracted from the current reproduction data, and the selection signal synchronized with the current reproduction data is generated. By using this selection signal, when selecting the currently reproduced data of the phase shift amount corresponding to the selection signal to be applied from the generated n-phase currently reproduced data, the influence on these currently reproduced data is affected. It can be removed.

Further, n-phase switching reproduction data is generated from the output of the switching device at a subsequent stage of the switching device, and the switching reproduction data of the phase shift amount corresponding to the applied selection signal is supplied to the first variable phase shifter. By providing the second variable phase shift means for sequentially changing and selecting the phase shift amount and the n-bit delay means in the direction opposite to the phase shift amount changing direction of the means, the first variable phase shift means is provided. The duplicate bits that have occurred are removed.

Thus, the phase (propagation delay time) of this line can be adjusted while transmitting data on the working line.

[0023]

FIG. 2 is a block diagram of an embodiment of the present invention, and FIG. 3 is an operation explanatory diagram of FIG. The symbols on the left side of FIG.
FIG. 6 is a diagram for explaining the operation of the portion with the same reference numeral in FIG. Here, the flip-flops 31 to 34, the selector 35 are the constituent parts of the first variable phase shift means 3, the flip-flops 41 to 44, the selector 45 are the constituent parts of the second variable phase shift means 4, and the delay circuit 61.
Are components of the delay means 6.

The operation of FIG. 2 will be described below with reference to FIG. 3. Assume that n = 4 and the terminals of the selectors 35 and 45 to be selected are switched from A to B. First, FF 31
In the four-stage shift register composed of .about.34, the input reproduction data is phase-shifted bit by bit, and four series of reproduction data are taken out and applied to the corresponding terminals of the terminals A.about.D of the selector 35.

Therefore, as shown in (3) of FIG.
The 1-bit phase-shifted active reproduction data is input to the terminal B, and the 2-bit phase-shifted active reproduction data is input. That is, terminal A →
Input reproduction data with a large amount of phase shift is input to terminal D.

Now, as shown on the left side of FIG. 3, the selector 35 selects the terminal A and immediately after sending the current reproduction data 1 and 2 applied to the terminal A to the switch 26,
Since the select signal is applied to the selector 35 via FF5, the selector selects the terminal B.

As a result, the selector 35 selects the current reproduction data 2, 3, 4, ... And sends it to the switching device. The current reproduction data sent from this selector is reproduced as shown in FIG. Data 2 is duplicated.

The current reproduction data shown in FIG. 3 is the switching device.
It is applied to a four-stage shift register composed of FFs 41 to 44 via 26, and in the same manner as described above, four series of current reproduction data phase-shifted bit by bit are taken out, and selector 45
Apply to the terminal of.

At this time, unlike the selector 35, the terminal A has a 4-bit phase-shifted current reproduction data, the terminal B has a 3-bit phase-shifted current reproduction data, and the terminal C has a 2-bit phase-shifted current reproduction data. 1-bit phase-shifted active reproduction data is applied to the terminal D, and the direction of change of the phase shift amount is opposite to that of the selector 35.

As a result, the terminals A and B of the selector 45 are
As shown in (3) of FIG. 3, the current reproduction data applied to (4) is phase-shifted by 4 bits as compared with (3) in FIG. Further, since the select signal applied to the selector 45 is applied via the 4-bit delay unit 61, it is delayed by 4 bits as compared with the time when it is applied to the selector 35.

Now, as shown in (3) of FIG. 3, since the select signal is applied to the selector 45 when the current reproduction data 0, 1, 2 is sent to the selector 45, the terminal B is selected from the terminal A. .. As a result, the selector 45 to FIG.
The currently reproduced data without duplication as shown by is obtained and sent to the subsequent stage.

Thus, the phase of this line can be adjusted while transmitting data on the working line.

[0033]

As described in detail above, according to the present invention, it is possible to adjust the phase of this line while transmitting data on the working line.

[Brief description of drawings]

FIG. 1 is a block diagram of the principle of the present invention.

FIG. 2 is a configuration diagram of an embodiment of the present invention.

FIG. 3 is an operation explanatory diagram of FIG.

FIG. 4 is a schematic explanatory diagram of a digital multiplex wireless system.

FIG. 5 is a block diagram of a conventional example

[Explanation of symbols]

3 1st variable phase shift means 4 2nd variable phase shift means 5 Flip-flop 6 Delay means 26 Switching device

Claims (1)

Claim: What is claimed is: 1. A plurality of active digital multiplex radio equipments and 1.
It is composed of two spare digital multiplex radio equipment, and the input reproduction data of the n phase (n is a positive integer) with different phase shift amount from the input reproduction data to the receiving side of the active digital multiplex radio equipment. A first variable phase shift means (3) and a switching device for sequentially changing the phase shift amount and selecting the currently reproduced data of the phase shift amount corresponding to the selection signal to be generated and applied.
(26) is provided, and the switching device switches the output of the first variable phase shift means and the preliminary reproduction data obtained on the receiving side of the preliminary digital multiplexing wireless device without interruption. , A flip-flop (5) for generating a selection signal synchronized with the current reproduction data, and n-phase switching reproduction data from the output of the switch, and a switching reproduction of a phase shift amount corresponding to the applied selection signal. Data
Second variable phase shift means for sequentially changing and selecting the phase shift amount in a direction opposite to the direction in which the phase shift amount of the first variable phase shift means changes.
(4) and an n-bit delay means (6) are provided, and the timing of the flip-flop applied to the second variable phase shift means is set to n times the timing applied to the first variable phase shift means. A phase adjustment circuit characterized by having a bit delay.