JPH05143022A - Multigradation liquid crystal display device - Google Patents

Abstract

PURPOSE:To provide a multigradation display which displays high-quality image by easily correcting the fluctuation in the threshold value and satd. voltage of a liquid crystal element by variation of production or temp. when such fluctuation arises. CONSTITUTION:The display device is constituted of a liquid crystal panel 1, a scanning circuit 2, a sampling circuit 3, a sampling control circuit 4, a ramp voltage generating circuit 5, a control circuit 6, a frame memory 7 and a video circuit 8. The liquid crystal panel 1 is constituted of two-dimensionally disposed transistors 1a and liquid crystals 1b. The voltage to be impressed to the liquid crystals 1b is generated by sampling the output of the ramp voltage generating circuit 5 by the sampling circuit 3. The ramp wave generating circuit 5 is inputted with a timing signal and a control signal and outputs the ramp voltages VRP, VRN of both positive and negative polarities. The timing signals are the final signals of the timing for starting and ending the ramp voltages and the control signals are the final signals for controlling the initial voltage and ramp of the ramp signals.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display whose brightness is controlled by an amplitude value of a voltage, and more particularly to a multi-tone liquid crystal display device suitable for an active matrix type liquid crystal display.

[0002]

2. Description of the Related Art In an active matrix type display in which a switching element and a liquid crystal element are laminated to display an image, a conventional apparatus for displaying a multi-gradation is disclosed in Japanese Patent Application Laid-Open No.
1-92797 (Fig. 1), JP-A-2-264294 (Fig. 1)
Fig.), JP-A-2-264295 (Fig. 1) and S.I.D., 90, digest (1990), pages 319 to 322 (SID84DIGEST, 1984pp31.
9-322). These devices sample a reference signal whose voltage changes with time using a pulse signal obtained by converting an image signal into a signal having a pulse width or a phase difference, and apply this voltage to a liquid crystal element. This method is suitable for a multi-gradation display device because the voltage level applied to the liquid crystal can be increased by increasing the time resolution of the pulse signal and the voltage resolution of the reference signal in the previous period.

On the other hand, the brightness-voltage characteristics (BV
Characteristic) is non-linear in the vicinity of the threshold voltage VTH and the saturation voltage VSAT, and the threshold voltage VTH and the saturation voltage VSAT fluctuate due to manufacturing variations and ambient temperature. Further, the voltage applied to the liquid crystal is attenuated by the wiring resistance inside the display panel. Due to such a cause, the brightness of an image to be displayed fluctuates, so that there is a limit to the gradation that can be displayed by simply increasing the voltage level applied to the liquid crystal.

[0004]

As described above, in the conventional multi-gradation display device, even if the voltage level applied to the liquid crystal is increased, the liquid crystal element characteristics change due to the temperature and the wiring resistance in the display panel causes a change. There is a problem in that the displayed image has uneven brightness and color shift.

The present invention has been made in view of such a situation as described above, and an object thereof is to solve the above-mentioned problems and to provide a multi-gradation optimum for displaying a high quality image free from uneven brightness and color shift. It is to provide a display device.

[0006]

A multi-gradation display device of the present invention is a display panel in which a switching element and a display body whose brightness is controlled by the amplitude value of an applied voltage are stacked, and a display brightness information. A digital / time converting means for converting a digital signal containing a time signal into a time signal, a reference signal generating means for generating a voltage that changes in synchronization with the time signal, and the switching by sampling the reference signal according to the time signal. By the ramp voltage generating means having a time-voltage converting means for generating a signal voltage applied to the element, and the reference signal generating means having means for controlling the initial voltage and slope of the ramp voltage, To be achieved.

Further, in the multi-gradation display device of the present invention, the ramp voltage generating means may be provided with a circuit means having a relationship between time and voltage in a plurality of broken lines.

[0008]

The lamp voltage generating means receives the control signal,
The initial voltage and slope of the lamp voltage can be controlled according to the characteristics of the liquid crystal element and the scanning state.

As a result, it is possible to easily correct manufacturing variations in threshold voltage and saturation voltage of the liquid crystal element and variations due to temperature, and it is also possible to correct a voltage drop due to wiring resistance in the display panel. Images can be displayed.

[0010]

EXAMPLES Examples of the present invention will be described in detail below. FIG. 1 shows a liquid crystal display device of the present invention. This liquid crystal display device includes a liquid crystal panel 1, a scanning circuit 2, a sampling circuit 3, a sampling control circuit 4, a ramp generating circuit 5,
Control circuit 6, frame memory 7, video circuit 8
Composed of.

The liquid crystal panel 1 comprises a large number of two-dimensionally arranged transistors 1a and liquid crystal elements 1b. The brightness signal voltages Vd1 to Vd are applied to the drains of the transistors 1a.
The scanning signals Vg1 to VgN are connected to M and the gate.

The ramp wave generating circuit 5 receives the timing signal and the control signal and receives the positive and negative polarities of the ramp voltages VRP and VR.
Output N. This timing signal is the start and end timing of the ramp voltage, and the control signal is the final voltage signal for controlling the initial voltage and ramp of the ramp signal.

The sampling control circuit 4 includes a liquid crystal element 1a.
The video data and the timing signal for determining the brightness of the are input and the time signals Pd1 to PdM are output. This time signal is a signal whose pulse width changes in proportion to video data.

The sampling circuit 3 receives the time signal Pd.
1 to PdM and the lamp voltage are input, and luminance signals Vd1 to Vd
Output dM.

The scanning circuit 2 inputs a timing signal,
The scan signals Vg1 to VgN are output. The control circuit 6 inputs signals from the frame memory 7 and the video circuit 8 and outputs the video data of the sampling control circuit,
It outputs timing signals, control signals for the ramp generation circuit, and timing signals for the scanning circuit.

The operation of the liquid crystal display device of the present invention constructed as above will be described with reference to the timing chart shown in FIG.

FST which is a timing signal of the scanning circuit 2
And CKV are signals indicating the beginning of the frame and the beginning of the scanning line, respectively. The scanning signals Vg1 to VgN are C
It is a signal having a pulse width of one cycle of KV, which is sequentially output after FST is input. A column of each pixel of the display panel is selected by this scanning signal.

The ramp voltages Vrp and Vrn have positive and negative slopes, respectively, and are synchronized with the timing signal CKV. Initial voltages Vrp1 and Vrn1 of these lamp voltages
The final voltages Vrp2 and Vrn2 are controlled by the control circuit 6.

The time signals Pd1 to PdM are signals obtained by converting the video signal of each row selected by the gate scanning signal into a pulse width by the sampling control circuit, the rising timing is equal to the scanning signals Vg1 to VgN, and the pulse width TW1.
˜TWN is proportional to the amplitude value of the video signal.

Luminance signal V which is the output of the sampling circuit
d1 to VdM are generated by sampling the ramp voltage of Vrp or Vrn with the time signals Pd1 to PdM. In the example of FIG. 2, the lamp voltages Vrp and Vrn are switched for each frame such that the first frame has a positive polarity and the second frame has a negative polarity.

The voltage Vsp obtained by sampling the positive and negative polarity lamp voltages is the pulse width of the time signal T
Letting W be the time required for the lamp voltage to reach the final voltage from the initial voltage, TR is given by the following equations.

Positive polarity Vsp = (Vrp2-Vrp1) × TW / TR + Vrp1 (Equation 1) Negative polarity Vsp = (Vrn2-Vrn1) × TW / TR + Vrn1 (Equation 2) Thus, the sampling voltage Vsp is the offset voltage. It is represented by the sum of (Vrp1, Vrn1) and the video signal obtained by converting the pulse width TW into a voltage. The offset voltage of the sampling voltage Vsp and the conversion gain of the video signal are the initial voltages Vrp1 and Vrn1 of the lamp voltage and the final voltage Vrp.
2, controlled by Vrn2.

The brightness signals Vd1 to Vd are applied to the liquid crystal element.
The difference between M and the voltage VCOM of the common electrode is applied. The voltage VCOM of the common electrode is the initial voltage Vrp of the lamp voltage,
Set to approximately the middle of Vrn. As a result, as shown in FIG. 1, the applied voltage VLC (1,1) of the liquid crystal in the 1st row and the 1st column inverts the polarity every frame.

An example of the characteristics of the liquid crystal element is shown in FIG. The light transmittance of the liquid crystal element changes depending on the applied voltage as shown in the figure. When this characteristic is approximated by a straight line, the applied voltage with the transmittance of 0% is the threshold voltage VTH, and the applied voltage with the transmittance of 100% is the saturation voltage V.
Call ST. The threshold voltage and the saturation voltage fluctuate due to manufacturing variations and temperature.

In the present invention, the initial voltage and the final voltage of the lamp voltage can be easily controlled by the control circuit. Therefore, the following effects can be obtained by controlling the initial voltage and the final voltage.

(1) By setting the initial voltage and the final voltage of the lamp voltage in accordance with the manufacturing variations of the threshold value of the liquid crystal element and the saturation voltage, multi-gradation for displaying a high quality image with a simple structure. A display device can be realized.

(2) By correcting the initial voltage and the final voltage of the lamp voltage in accordance with the temperature fluctuations of the threshold value of the liquid crystal element and the saturation voltage, the brightness fluctuation and color shift of the displayed image due to the temperature of the liquid crystal panel are corrected. As a result, a multi-gradation display device that displays high quality video can be realized.

(3) By controlling the initial voltage and the final voltage of the lamp voltage at the timing of the scanning circuit, it is possible to correct the decrease in the voltage applied to the liquid crystal due to the voltage effect generated in the signal wiring portion inside the display panel. Thus, it is possible to realize a multi-gradation display device in which the luminance variation in the display panel is small even with high definition.

Next, an embodiment of the ramp voltage generating circuit of the present invention will be described with reference to FIG. FIG. 4 shows a positive polarity ramp voltage generation circuit 51, a negative polarity ramp voltage generation circuit 52,
It is composed of a timing control circuit 53. Since the basic configurations of the two ramp voltage generating circuits are the same, the positive ramp voltage generating circuit 51 will be mainly described below.
The ramp voltage generation circuit 51 includes a phase comparator 510, a charge pump 520, an integrator 530, and a voltage / current converter 54.
0, capacitor Cp2, MOS switch 560, buffer amplifier 570, and comparator 580. Here, the charge pump 520 includes a P-type MOS transistor MP1 and an N-type MOS transistor MP2, and an integrator 53
0 is an operational amplifier Ap1 and an integrating capacitor CP1, and the current-voltage converter 540 is composed of an operational amplifier Ap2, a P-type MOS transistor MP3, and a resistor Rp1.

The initial voltage Vrp1 of the ramp voltage is connected to the MOS switch 560 via the buffer amplifier 570. The final voltage Vrp2 is connected to a comparator and compared with the lamp voltage Vrp. Also, the timing signal CKV
Is connected to the gate of the MOS switch 560, and STP is connected to the input of the phase comparator 510.

The timing control circuit 53 is a delay circuit for inputting the timing signal CKV and setting the time of the lamp voltage.

The operation of the ramp voltage generating circuit of the present invention constructed as above will be described with reference to the timing chart of FIG.

The timing signal CKV is the same as the timing signal shown in FIG. 2, and is used here as the timing for setting the initial voltage Vrp1 of the lamp voltage.
The timing signal STP is a signal that sets the time of the final voltage of the lamp voltage, and is generated by the timing control circuit. When the CKV becomes “H”, the ramp voltage Vrp turns on the MOS switch 560 and becomes the initial voltage Vrp.
When rp1 is output and CKV becomes "L", the MOS switch 560 is turned off and changes at a constant inclination.

The comparator 580 compares the lamp voltage Vrn with the final voltage Vrp2 and outputs a comparison signal Dp.
The comparison signal Dp becomes “H” when the ramp voltage Vrn becomes higher than the final voltage Vrp2.

The phase comparator 510 detects the time difference between the rising timings of the comparison signal Dp and the timing signal STP and outputs the phase outputs Qp1 and Qp2.

One phase output Qp1 of this phase comparator
Becomes "L" when the timing signal STP is early,
The P-type MOS transistor of the charge pump 520 is turned on. At this time, the output voltage of the integrator 530 decreases and the voltage V1 applied to the resistor Rp1 of the voltage-current converter 540 increases. As a result, the ramp voltage ramp increases and advances the timing of the comparison signal Dp.

On the other hand, another phase output Qp2 of the phase comparator
Becomes "H" when the comparison signal Dp is early, and turns on the N-type MOS transistor MP2 of the charge pump 520. At this time, the output voltage of the integrator 530 increases and the voltage V1 applied to the resistor Rp1 of the voltage-current converter 540 decreases. As a result, the slope of the ramp voltage is reduced and the timing of the comparison signal Dp is delayed.

As described above, the ramp voltage of this circuit is negative-feedback controlled so that the timing at which the initial voltage ramp voltage becomes equal to the final voltage Vrp2 becomes equal to the rising edge of STP, and therefore the voltage at the rising edge of the timing signal STP. Can be made equal to the final voltage Vrp2.

As described above, the ramp voltage generating circuit of the present invention can easily control the initial voltage and the final voltage by the voltage input from the outside.

The negative polarity ramp voltage generation circuit 52 differs from the positive polarity ramp voltage generation circuit 51 in the configuration of the voltage-current converter 540. P type MO with positive polarity
While it is composed of S-transistors, it has N-polarity
Type MOS transistor is used.

[0041]

According to the present invention, since the initial voltage and the final voltage of the lamp voltage can be easily controlled, it is possible to correct the fluctuation of the threshold voltage and the saturation voltage of the liquid crystal element due to the manufacturing variation and the temperature to obtain a high quality. A multi-tone display device capable of displaying an image can be realized.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of a liquid crystal display device of the present invention.

FIG. 2 is a timing chart showing an operation of the liquid crystal display device shown in the embodiment of the present invention.

FIG. 3 is a characteristic diagram of a liquid crystal element of the liquid crystal display device of the present invention.

FIG. 4 is a configuration diagram showing an embodiment of a ramp voltage generating circuit of the present invention.

FIG. 5 is a timing chart showing the operation of the ramp voltage generating circuit of the present invention.

[Explanation of symbols]

1 ... Liquid crystal panel, 1a ... Transistor, 1b ... Liquid crystal, 2
Scanning circuit, 3 sampling circuit, 4 sampling control circuit, 5 ramp voltage generating circuit, 6 control circuit, 7 frame memory, 8 video circuit.

Claims (6)

[Claims] 1. A display panel in which a switching element for controlling an applied voltage and a display body for controlling a brightness according to an amplitude value of the applied voltage are stacked, and a digital signal including information on the brightness to be displayed is converted into a time signal. Digital / time conversion means, reference signal generation means for generating a voltage that changes in synchronization with the time signal, and sampling the reference signal according to the time signal to generate a signal voltage applied to the switching element. In the display device including the time / voltage converting means, the reference signal generating means includes a ramp voltage generating means whose voltage continuously changes with time, and a means for controlling the initial voltage and the slope of the ramp voltage. A multi-tone liquid crystal display device characterized by comprising. 2. A multi-gradation liquid crystal display device according to claim 1, wherein an initial voltage of the lamp voltage generating means is adjusted according to a threshold value of the display body. 3. A multi-gradation liquid crystal display device according to claim 1, wherein the inclination of the lamp voltage generating means is adjusted according to the inclination of the voltage / luminance characteristic of the display body. 4. A multi-gradation liquid crystal display device according to claim 1, wherein said ramp voltage generating means outputs a ramp voltage of both positive and negative polarities. 5. A multi-tone liquid crystal display device according to claim 4, wherein the lamp voltages of both positive and negative polarities are asymmetric. 6. A multi-gradation liquid crystal display device according to claim 1, wherein an initial voltage and a slope of the ramp voltage are changed by a vertical scanning side drive signal.