JPH05136636A - Differential amplifier - Google Patents

Abstract

PURPOSE:To attain low voltage operation and to obtain a good frequency characteristic by detecting the change of the voltage between the base emitters of the transistor of a differential pair, generating the difference from linearity by a differential amplifier provided separately and adding it to an output. CONSTITUTION:The variation of the mutual conductance of a transistor(Tr) Q3 of a differential amplifier A1 is detected, and the mutual conductance of the TrQ3 is corrected. That is, since the change of the mutual conductance is found out when the change of the voltage between base emitters is viewed, the current output of a differential amplifier A2 is added to an output end OUT1, and the deviation from the linearity of the amplifier A1 can be corrected. In the same way, since the change of the mutual conductance of a TrQ4 is detected and corrected, the voltage between the base emitters of the TrQ4 at the time of a silence is monitored by a TrQ6 and a current source 13. On the basis of this, the voltage variation between the base emitters of the TrQ4 is detected by an amplifier A3, the current output of the amplifier A3 is added to an output terminal OUT2 as the corrected part and the linearity can be improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a differential amplifier having good linearity.

[0002]

2. Description of the Related Art FIG.
It is a current output differential amplifier. In the figure, a resistor 10
1 and 102 have the same resistance value R1 and the transistor Q1
, Q2, where gm is the transconductance, the gain (transconductance) G of the entire differential amplifier is G = 1 / (R1 + 1 / gm). Although the resistance value R1 can be regarded as constant here, the transconductance gm of the transistors Q1 and Q2 is a function of the collector current, as can be seen from the expression gm = qIc / kT. Here, q is the electron charge, k is the Boltzmann constant, T is the absolute temperature, and Ic is the collector current. Therefore, when the potential difference of the differential input is sufficiently smaller than the voltage generated in the resistor 101 (102), the collector current Ic becomes
When the current of the constant current source 103 is I1, it can be regarded that I1 / 2 is almost constant. On the contrary, when the potential difference of the differential input becomes larger than the voltage generated in the resistor R1, the collector current value Ic of the differential transistor deviates from I1 / 2, and the value of the mutual conductance gm also changes depending on the input potential difference. It will be. The gain (transconductance) G of this differential amplifier changes depending on the input potential difference.

FIG. 5a shows the change in the gain G due to the input potential difference when the resistors 101 and 102 in FIG. 6 are both 1 KΩ and the current value I1 of the constant current source 103 is 1 mA. It is standardized by the gain when the input potential difference is 0, which maximizes G. As you can see, the input dynamic range of this differential amplifier is ±
Regardless of 1 V, if the change in gain G is to be suppressed within 1%, which is a guideline for linearity in image processing,
It can only be used within a range of ± 0.45V.

As described above, in the conventional differential amplifier, the required linearity cannot be ensured unless the input dynamic range is set wider than necessary, so that the voltage distribution is wasted accordingly. The need for the extra voltage distribution has a drawback that it hinders the reduction of the voltage while maintaining the required linearity.

In an actual circuit, DC offset occurs due to variations in the elements used. This DC offset is approximately proportional to the input dynamic range if the variation amount of the elements is the same. Therefore, the conventional differential amplifier has a drawback that a large DC offset is generated because it is necessary to secure a wider input dynamic range than necessary.

As described above, in the differential amplifier shown in FIG.
It has not been possible to achieve both the linearity, the low DC offset, and the effective voltage distribution for lowering the voltage.

In order to eliminate the drawback of FIG. 6, as shown in FIG. 7, by feeding back from the output OUT of the differential amplifier DA to the input IN1 via the resistor 104, the error is divided by one of the loop gain of the feedback loop. It is also known that the linearity can be improved by utilizing However, in this case, the linearity is improved only in the frequency band in which the feedback is sufficiently applied, so that there is a drawback in that good high frequency characteristics cannot be expected.

[0008]

The above-mentioned conventional differential amplifier has the problems that linearity, small DC offset, waste of voltage distribution, and high frequency characteristics cannot be achieved at the same time. ..

The object of the present invention is to realize a low voltage by eliminating waste of voltage distribution, with little linearity and DC offset.
Another object is to realize a differential amplifier that can obtain good frequency characteristics.

[0010]

SUMMARY OF THE INVENTION A differential amplifier according to the present invention has a collector for a first output terminal, a base for a first input terminal, and an emitter for a first constant current source via a first load. And a second transistor in which a collector is connected to a second output terminal, a base is connected to a second input terminal, and an emitter is connected to the first constant current source via a second load. A first differential amplifier including a transistor, a base connected to the first input terminal, a collector connected to a power supply, and an emitter connected to a second constant current source. The emitter potentials of the second transistor are supplied to the first and second inputs, and the first and second current outputs obtained based on this are supplied to the first and second output terminals. Second
Consisting of a differential amplifier

[0011]

The differential amplifier of the present invention detects the change in the base-emitter voltage indicating the change in the transconductance of the differential transistor pair forming the differential amplifier and separately provides a linearity error. Made with an amplifier and added to the output.
This realizes a differential amplifier having good linearity without increasing the input dynamic range more than necessary. Since the input dynamic range is not increased more than necessary, DC offset due to element variation is small and voltage There is no waste of allocation. Furthermore, since no negative feedback is used, good high frequency characteristics can be realized.

[0012]

Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a circuit diagram showing an embodiment of the present invention.

In FIG. 1, a differential amplifier A1 includes a constant current source I1 connected to transistors Q3 and Q4 forming a differential pair and resistors R1 and R2 connected to emitters thereof, respectively.
It consists of. The differential amplifier A1 is composed of transistors Q3 and Q.
The base of 4 is input and the collector is output. The base of the transistor Q3 is connected to the base of the transistor Q5 whose collector is connected to the power source Vcc, and also to the input terminal IN1. The emitter of transistor Q5 is
It is connected to the current source I2 and also to the non-inverting input of the differential amplifier A2. The inverting input of the differential amplifier A2 is connected to the emitter of the transistor Q3, and one of the differential outputs is
Transistor Q3 collector and output terminal OUT1
The other is connected to the collector of the transistor Q4 and the output terminal OUT2.

The base of the transistor Q4 is connected to the base of the transistor Q6 whose collector is connected to the power source Vcc and also to the input terminal IN2. The emitter of the transistor Q6 is connected to the current source I3 and
It is connected to the inverting input of the differential amplifier A3. Differential amplifier A3
Is connected to the emitter of the transistor Q4, one of the differential outputs is connected to the collector of the transistor Q4 and the output terminal OUT2, and the other is connected to the collector of the transistor Q3 and the output terminal OUT1.

The transconductance of the transistor Q3 of the differential amplifier A1 can be corrected by detecting the amount of change in the transconductance of the transistor Q3. In other words, the change in transconductance is
Since it can be seen by looking at the change in the voltage between the emitters, the deviation of the linearity of the differential amplifier A1 can be corrected by adding the current output of the differential amplifier A2 to the output terminal OUT1.

Similarly, in order to detect and correct the change of the transconductance of the transistor Q4, the base-emitter voltage of the transistor Q4 when there is no signal is monitored by the transistor Q6 and the current source I3, and this is used as a reference. The base of the transistor Q4
The amount of change in the voltage between the emitters is detected, and the current output of the differential amplifier A3 is added to the output terminal OUT2 as a correction amount.

As described above, since the linearity can be improved by the correction without increasing the input dynamic range more than necessary, the DC offset due to the variation of the elements is small and the voltage distribution is not wasted. Furthermore, since no negative feedback is used, good high frequency characteristics can be realized.

FIG. 2 also shows the differential amplifiers A2 and A3 of FIG. 1 as a concrete circuit. The differential amplifier A2 is a differential circuit composed of a differential pair of transistors Q7 and Q8 and a constant current source I4. The dynamic amplifier A3 is composed of a differential pair of transistors Q8 and Q9 and a constant current source I5.

The operating principle of FIG. 2 is exactly the same as that of FIG.
Here, description will be given with reference to FIG. 5 while showing specific numerical values. Transistors Q3, Q4, Q5, Q6, Q7,
Assuming that Q8, Q9, and Q10 all have the same characteristics and the current amplification factor is sufficiently high, the values of the resistors R1 and R2 are both set to 1 KΩ, which is the same as the condition when the linearity of the graph 1 of FIG. 5 is calculated in FIG. The current value of the current source I1 is 1 mA. Further, the current values of the constant current sources I2 and I3 are both set to 0.5 mA, and the current values of the constant current sources I4 and I5 are both set to 0.167 mA. The graph b in FIG. 5 shows a calculated in FIG. 6 under this condition.
Similarly to the above, the result of calculating the change in the gain G due to the input potential difference is shown, and is normalized by the gain when the input potential difference is zero.

As can be seen from this characteristic diagram, in the differential amplifier shown in FIG. 2, the input dynamic range itself is approximately ± 1 V, which is the same as in the conventional case shown in a, but the change in the gain G due to the input potential difference does not change. Clearly, the input potential difference is within a range of approximately ± 0.75 V, and the change in the gain G is within 1%, which is a guideline for linearity in image processing.

As described above, according to the embodiment shown in FIG. 3, the input dynamic range is not increased and the range of linearity of 1% is ± 0.45 V to ± 0.75 V as compared with the case of FIG.
You can see that it is expanding to. On the contrary, the linearity can be maintained even if the input dynamic range is set smaller accordingly. By setting in this way, a DC offset due to element variation is small, there is no waste in voltage distribution, and since negative feedback is not used, a differential amplifier having good high frequency characteristics can be realized.

In FIG. 2, which has been described by taking a concrete example of the differential amplifiers A2 and A3, the transistors Q7, Q8 and Q of the differential pair are shown.
It consisted of 9 and Q10. However, when the differential pair transistors are used as the differential amplifiers A2 and A3 for correcting the linearity error, the linearity error with respect to the input voltage of the differential pair transistor appears as the correction amount error. Therefore, if the differential amplifiers A2 and A3 for correcting the linearity error have a better linearity than the configuration of the differential pair of transistors Q7, Q8, Q9, and Q10, it is better than that shown in FIG. Further, the linearity can be improved.

FIG. 3 shows another embodiment of the present invention. This embodiment shows another circuit example of the differential amplifiers A2 and A3, and the same parts as those in FIG.

The differential amplifier A3 is a differential pair transistor Q
The differential amplifier A4 is composed of differential pair transistors Q15, Q16 and Q17, Q18 and constant current sources I8, I9, respectively, with 11, Q12, Q13, Q14 and constant current sources I6, I7. Here, the differential pair transistors Q11, Q12, Q13, Q
The emitter area ratio of 14, Q15, Q16, Q17, Q18 is
1: n (n ≠ 1) is used.

As described above, when the emitter resistance is not inserted in the differential pair transistor, the differential amplifier has an emitter area ratio of 1: n (instead of just the differential pair transistor.
The linearity of the differential amplifier can be improved by alternately using two pairs of the differential pair transistors of n ≠ 1).

The operation principle of FIG. 3 is exactly the same as that of FIG.
Here, description will be given with reference to FIG. 5 while showing specific numerical values. Transistors Q5, Q6, Q3, and Q4 all have the same characteristics, and the current amplification factor is sufficiently high.
Is 1 KΩ, the current value of the constant current source I1 is 1 mA,
The current value of the constant current source I1 is 1 mA, and the current values of the constant current sources I2 and I3 are both 0.5 mA. The graph c in FIG.
It is assumed that the conditions are the same as those used for calculating the linearity indicated by a and b. Further, the differential pair transistors Q11, Q12, Q13, Q14, Q15, Q16, Q for correcting the linearity error.
The emitter area ratio of 17 and Q18 is set to 1: 4, and the constant current sources I6, I7, I8 and I9 are all set to 0.05 mA.
Under this condition, the change in gain G due to the input potential difference is calculated,
The value normalized by the gain when the input potential difference is 0 has the characteristic indicated by c in FIG.

The differential amplifier shown in FIG. 3 also has an input dynamic range of approximately ± 1 V, which is the same as in the case of the conventional example shown in the graph a of FIG. 5, but the change of the gain G due to the input potential difference is shown in the graph of FIG. It is even smaller than that of the embodiment shown in b, and the change of the gain G is within 1% which is a guideline of linearity in image processing when the input potential difference is approximately ± 0.9V.

As described above, in the embodiment shown in FIG. 3, it is understood that the range of linearity of 1% is expanded from ± 0.45V of the conventional example to ± 0.9V without increasing the input dynamic range. .. On the contrary, even if the input dynamic range is set to be small, the linearity can be sufficiently obtained. Therefore, the DC offset due to the dispersion of the elements is small by setting it as such, there is no waste in the voltage distribution, and the negative feedback is provided. Therefore, a differential amplifier having good high frequency characteristics can be realized.

As described above, the embodiment shown in FIG. 3 exhibits good linearity without setting a large input dynamic range, but the circuit is slightly complicated as compared with the embodiment shown in FIG. As the differential amplifiers A2 and A3 for correcting the linearity error shown in FIG. 1, two differential pair transistors with an emitter area ratio of 1: n (n ≠ 1) are used instead of just the differential pair transistors. This is because the sets are used by combining them alternately. However, it is not a substitute for the differential amplifiers A2 and A3 in the embodiment shown in FIG.
It is also possible to combine the circuits by utilizing the structure.

FIG. 4 shows another embodiment of the present invention. In FIG. 4, the transistor Q7 and Q8 of FIG. 2 and the emitter area ratio of the transistors Q9 and Q10 are 1: n (n = n). 1). As a whole, since there are two pairs of differential pair transistors having an emitter area ratio of 1: n, the same effect as that of the embodiment shown in FIG. 3 can be obtained without exhibiting a large input dynamic range. Is obtained.

As before, the transistors Q3, Q
It is assumed that 4, Q5 and Q6 are all transistors with the same characteristics and the current amplification factor is sufficiently high, and the resistors R1 and R2 are both set to 1K.
Ω, the current value of the constant current source I1 is 1 mA, the constant current sources I2, I
It is assumed that the current values of 3 are both 0.5 mA and the conditions are the same as those used when the linearity shown in the graph c of FIG. 5 is calculated in the case of the embodiment of FIG. In addition, a differential pair transistor Q7 'and Q7 forming a differential amplifier for correcting the linearity error.
The emitter area ratio of 8 ', Q9' and Q10 'is 1:
It is assumed that the current is set to 5 and 0.042 mA is applied to the current values of the constant current sources I4 and I5. Under this condition, the change in the gain G due to the input potential difference is calculated, and normalized by the gain when the input potential difference is 0 is shown in the graph d of FIG.

As can be seen from FIG. 5d, FIG.
The input dynamic range itself of the differential amplifier shown in (1) is about ± 1 V, which is the same as in the case of the conventional example shown in the graph of FIG. In addition, in the range of the input potential difference of approximately ± 0.9 V, the change of the gain G is within the range of 1% which is a guideline of the linearity in the image processing.

As described above, according to the embodiment shown in FIG. 4, the input dynamic range is not increased, and the range of linearity of 1% is shown in FIG. 3 from ± 0.45V to ± 0.9V of the conventional example. Good linearity characteristics similar to those in the example can be realized with a smaller number of elements.

In the above-mentioned embodiment, the good frequency characteristic is not impaired, but depending on the application, the frequency characteristic may be slightly deteriorated if the linearity is good. In that case, the same effect as that of the embodiment shown in FIG. 4 can be obtained by changing the setting of the embodiment shown in FIG.

Further, in the case of the embodiment shown in FIG. 4, by setting the emitter area ratio of the differential pair transistors Q7 ', Q8' and Q9 ', Q10' to 1: n (n ≠ 1), there is no signal. Even better linearity is obtained by forcibly shifting the balance of these differential pair transistors. The same effect can be obtained by reducing the current values of the constant current sources I2 and I3. In this way, the differential pair transistors Q7 ', Q8' and Q9 ', Q10'
Since the emitter area ratio of 1 can be kept at 1: 1, the required number of elements can be further reduced as compared with the case of the embodiment of FIG. 4, and the current values of the constant current sources I2 and I3 are reduced. Compared with the case of the embodiment shown in 4, the frequency characteristic is slightly deteriorated, but the power consumption is reduced.

The numbers will be specifically described. In the embodiment shown in FIG. 2, the transistors Q3, Q4, Q5,
It is assumed that Q6, Q7, Q8, Q9 and Q10 are all transistors having the same characteristics and the current amplification factor is sufficiently high, and resistors R1 and R2
Is 1 KΩ, and the current value of the constant current source 107 is 1 mA.
In the conventional example, the same conditions as those for calculating the linearity of FIG.
A. The current values of the constant current sources I2 and I3 are shown in FIG.
Both of them are set to 0.1 mA which is ⅕ when the graph b is calculated. As a result, the differential pair transistors Q7 and Q8
Since the same effect can be obtained by setting the emitter area ratio of Q9 and Q10 to 1: 5, the same linearity as the embodiment shown in FIG. 4 can be obtained by selecting the setting in the circuit of the embodiment shown in FIG. Can be obtained.

[0037]

As described above, according to the differential amplifier of the present invention, the linearity is greatly improved without increasing the input dynamic range. There is no need to set the dynamic range unnecessarily large. Therefore, DC due to element variation
Not only the offset can be reduced and waste of voltage distribution can be eliminated, but also a differential amplifier having excellent high frequency characteristics and excellent linearity can be realized.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

FIG. 2 is a circuit diagram showing the circuit of FIG. 1 more specifically.

FIG. 3 is a circuit diagram showing another embodiment of the present invention.

FIG. 4 is a circuit diagram showing another embodiment of the present invention.

FIG. 5 is a characteristic diagram for comparing the effect of the present invention with the conventional effect.

FIG. 6 is a conventional circuit diagram.

FIG. 7 is another conventional circuit diagram.

[Explanation of symbols]

A1 to A3 ... Differential amplifier, R1, R2 ... Resistors, I1 to I3
... Constant current source, Q3 to Q6 ... Transistors, IN1, 11
1 ... Input terminals, OUT1, OUT2 ... Output terminals.

Claims (6)

[Claims] 1. A collector is connected to a first output terminal, a base is connected to a first input terminal, and an emitter is connected to a first load via a first load.
And a collector connected to a second output terminal, a base connected to a second input terminal, and an emitter connected to the first constant current source via a second load. A first differential amplifier including a connected second transistor; a third transistor having a base connected to the first input terminal, a collector connected to a power supply, and an emitter connected to a second constant current source; The respective emitter potentials of the first and second transistors are supplied to the first and second inputs, and the first and second current outputs obtained based on this are supplied to the first and second inputs.
And a second differential amplifier which is supplied to the output terminal of the differential amplifier. 2. A fourth transistor having a base connected to the second input terminal, a collector connected to the power supply, and an emitter connected to a third constant current source, and emitter currents of the second and fourth transistors. The third and fourth respectively
3. The differential amplifier according to claim 1, wherein the third and fourth current outputs obtained based on the input are supplied to the first and second output terminals. 3. The second differential amplifier has a commonly connected emitter as a fourth constant current source and one base as the third constant current source.
To the emitter of the transistor and the other base to the first
The fifth and sixth transistors, one collector of which is connected to the first output terminal and the other collector of which is connected to the second output terminal. Item 1. The differential amplifier according to Item 1 or 2. 4. The third differential amplifier has a commonly connected emitter as a fifth constant current source and one base as the fourth constant current source.
To the emitter of the transistor and the other base to the second
And a collector connected to the second output terminal and a collector connected to the first output terminal of the transistor, respectively. The seventh and eighth transistors are characterized in that Item 2. The differential amplifier according to Item 2. 5. The differential amplifier according to claim 3, wherein the emitter area ratios of the fifth and sixth transistors are different from each other. 6. The differential amplifier according to claim 4, wherein the emitter area ratios of the seventh and eighth transistors are different from each other.