JPH05136287A - Chip carrier - Google Patents

Abstract

PURPOSE:To provide a chip carrier which enables easy alignment of a connection terminal during packaging and realizes highly reliable packaging of high density. CONSTITUTION:A transparent chip carrier substrate 1 whereon a semiconductor integrated circuit chip 3 is mounted and a wiring pattern 2 whose one end is electrically connected to the semiconductor integrated circuit chip 3 and the other end is electrically connected to an outside printed wiring board are provided. Since the chip carrier substrate 1 is transparent, alignment can be performed while recognizing a position directly by transmitting light from a rear of the chip carrier substrate 1 when the semiconductor integrated circuit chip 3 is mounted on the chip carrier substrate 1 by a flip chip method and when the chip carrier is packaged in the outside printed wiring board; accurate alignment can be thereby carried out.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip carrier for electronic parts such as semiconductor integrated circuits.

[0002]

2. Description of the Related Art In recent years, surface mounting type packages have been remarkably popular among mounting forms for mounting semiconductor integrated circuits at a high density, but flip-chip and chip-on types are available as mounting forms enabling higher density mounting. A technique is used in which a semiconductor integrated circuit chip such as a board (COB) is directly mounted on a printed wiring board in an unsealed bare chip state.

In flip-chip mounting, a semiconductor integrated circuit chip having bumps attached to bonding pads is directly faced down on the printed wiring board so that the bumps come into contact with the pads on the printed wiring board. It is to be implemented.

Usually, a gold (Au) bump having a size of about several μmφ or a resin ball with conductive plating is attached on a bonding pad of a semiconductor integrated circuit chip, and this is slightly pressed directly on the pad on the printed wiring board. It is pressed so as to be crushed, the periphery of the semiconductor integrated circuit chip is fixed with an insulating resin, and fixed on the printed wiring board. At this time, it is necessary to accurately align the position of the bump on the bonding pad of the semiconductor integrated circuit chip with the position of the pad on the printed wiring board.

The chip-on-board mounting may be a general term for a mounting form in which a bare chip is directly mounted on a printed wiring board in a broad sense, but in general, a semiconductor integrated circuit chip is face-up as a bare chip. In this state, it is directly fixed onto the printed wiring board with an adhesive or the like, and the bonding pad on the semiconductor integrated circuit chip and the pad arranged on the printed wiring board are bonded with Au (gold) bonding wire or TAB. It is a mounting form that is connected by metal leads such as.

In this chip-on-board mounting, there is no difficulty in alignment as in the case of flip-chip mounting, but Au (gold) bonding wires and metal leads are used for electrical connection between the semiconductor integrated circuit chip and the printed wiring board. For connection of these connection members and the connection pads of the semiconductor integrated circuit chip, Au-Au (gold-gold) and Au-Al (gold-aluminum) are selected by appropriately selecting their materials. , Au-Sn (gold-tin) and other eutectic bonds are formed on the joint surface, but there is a problem of migration between different metals, and especially the material of the connection pad of the semiconductor integrated circuit chip. There are large restrictions, and it is difficult to use general Al (aluminum) pads. Also,
Since these joining members are relatively expensive, the cost is increased. Further, since these connecting members are mounted toward the outer surface, the bonding wire is twisted and short-circuited by the flow of resin when the chip is finally sealed by resin potting, or the wire is made of metal or metal. In some cases, the lead may come off and other inconveniences may occur. From these points, the flip chip mounting method is more advantageous.

The bare chip type mounting form such as the flip chip and the chip on board does not require a lead frame for packaging, and the mounting form realizes further miniaturization and thinning as compared with other packaging forms. However, because the integrated circuit chip, which is a bare chip (semiconductor chip that is not sealed), is directly mounted on the printed wiring board, the quality of the bare chip integrated circuit chip such as burn-in and electrical characteristics is checked before mounting. It is difficult to go and screen for defective chips.

In this case, the quality check of the integrated circuit chip is performed by applying a probe or the like to the wiring pattern in the vicinity where the integrated circuit chip is mounted, after mounting the integrated circuit chip on the printed wiring board. Even if the quality of the integrated circuit chip is judged to be defective at this point, replacement of the defective chip is very complicated and difficult, and in the worst case, many defective chips are mounted due to one defective chip. All the wiring boards that have been processed will have to be rejected.

Therefore, the adoption of such bare chip mounting makes it possible to inspect an integrated circuit chip which is a bare chip before mounting when there is a strict demand for miniaturization of equipment or before mounting. This is limited to cases where the wiring board is not so expensive as a whole.

There is a chip carrier which is a kind of surface mount type package as a mounting form that can make use of the high density mounting while compensating for the drawbacks of the bare chip mounting.

The chip carrier is a leadless flat package, which is more compact and has a higher packaging density. As shown in FIG. 5, as shown in FIG. 5, an integrated circuit chip 402 is attached to a ceramic or synthetic resin substrate 401 at approximately the center thereof, and one end of the integrated circuit chip 402 is provided on the same surface and on four sides. The integrated circuit chip 402 has a wiring pattern 404 that is arranged so as to be connected to the chip 402 and the terminal portion 403 at the other end is connected to an external printed wiring board 406.
It is the one that is covered with and sealed. Bonding pads on the integrated circuit chip 402 of this chip carrier and the substrate 4
01, the electrical connection with the wiring pattern 404, and the printed wiring board 40 of the integrated circuit chip 402.
The above-mentioned mounting technique of the flip-chip method or the chip-on-board method is used for fixing to the top of FIG. 6. In FIG. 5, the Au bonding wire 407 is used for the above-mentioned electrical connection, and the fixing technology is fixed. Shows an example when the adhesive 408 is used.

Conventionally, ceramics have been mainly used for the substrate of this chip carrier, but in recent years, research and development of synthetic resins have progressed, and the reliability such as heat resistance and moisture resistance has been improved. At the beginning, various types of plastics were used.

[0013]

In the above chip carrier, a probe can be connected on the wiring pattern 404 to check the electrical characteristics, and the goodness and the defectiveness can be checked before mounting on the printed wiring board. Because you can
There is little concern about mounting a defective chip. Also, its packaging density is higher than that of ordinary flat packages.

However, in such a chip carrier, when the connection terminals are mounted on the printed wiring board by soldering, the terminals on the printed wiring board and the terminals of the chip carrier are aligned. The terminal part where the wiring is carried out is located between the chip carrier and the printed wiring board, and from the top of the printed wiring board is an opaque chip made of black or green synthetic resin or white or brown ceramic. I ’m behind my career,
Even if it is difficult to align visually, and even when mounting using an optical aligner, the terminal part to be connected is behind the chip carrier and the light does not reach there. There is a problem that automatic mounting is difficult because the part cannot be recognized. If automatic mounting is performed, an aligner equipped with a special and expensive recognition device that allows the printed wiring board to be seen through the substrate of the chip carrier must be used.

When mounting the integrated circuit chip on the main body substrate of the chip carrier by the above-mentioned flip chip method, the integrated circuit chip is placed face down and the connection terminals and the integrated circuit on the main body substrate of the chip carrier are mounted. The bumps on the chip are connected while being aligned, but at this time, the connecting portion is also sandwiched between the main body substrate of the chip carrier and the integrated circuit chip, and becomes a shadow. For this reason, there is a problem that it is difficult to perform the alignment visually or by an optical aligner of an automatic mounting machine.

The present invention has been made in view of the above problems, and an object of the present invention is to make it difficult to align the chip carrier with an external printed wiring board, and to mount the chip carrier body substrate and the semiconductor chip. It is an object of the present invention to provide a chip carrier that solves the problem of difficulty in alignment between the two, realizes high-density and high-reliability mounting, and facilitates alignment of connection terminals during mounting.

[0017]

In order to achieve the above-mentioned object, a chip carrier of the present invention has a transparent substrate on which a semiconductor circuit chip is mounted and one end electrically connected to a connecting portion of the semiconductor circuit chip. And a wiring pattern disposed on the surface of the substrate, the other end of which is electrically connected to a connection portion of an external printed wiring board.

[0018]

The chip carrier of the present invention has a transparent thermoplastic resin substrate on which a semiconductor circuit chip is mounted. Thereby, at the time of alignment between the connecting member of the chip carrier and the connecting member of the printed wiring board when mounting the chip carrier on the printed wiring board, the chip carrier of the chip carrier can be visually detected or optically sensed by the optical aligner of the automatic mounting device. The above alignment can be easily performed by optically transmitting through the substrate of the chip carrier from above.

When the semiconductor circuit chip is mounted face down on the substrate of the chip carrier by the flip chip method, the chip carrier of the chip carrier is aligned when the connecting member of the semiconductor circuit chip is aligned with the connecting member of the chip carrier. The transparent substrate of the chip carrier is optically transmitted from the back side of the surface on which the semiconductor circuit chip is mounted, and the above alignment can be easily performed visually or by an optical aligner of an automatic mounter.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a perspective view showing a chip carrier according to the present invention, and FIG. 2 is a side sectional view thereof.

The chip carrier of the present invention comprises a substrate 1, a wiring pattern 2 arranged on the substrate 1, and the substrate 1.
It has a semiconductor integrated circuit chip 3 mounted thereon.

As shown in FIG. 1, the substrate 1 is formed by injection molding a transparent thermoplastic such as polycarbonate or polystyrene, and has a recess 4 in the center, and the semiconductor integrated circuit chip 3 is placed in the recess 4. It is installed. On the surface on which the semiconductor integrated circuit chip 3 is mounted, a wiring pattern 2 for electrically connecting the semiconductor integrated circuit chip 3 and an external printed wiring board is attached.
This substrate 1 is formed together with the wiring pattern 2 using an injection molding die 400 as shown in FIG.

That is, this injection molding die 400 is
Using a cemented carbide of (tungsten carbide) + CO group (carbonate group) as a base material, this is subjected to counterbore processing to form a female injection die body 401, and the entire inner surface of the die is formed by a thin film forming process.
-A carbon film is deposited, and the i-carbon film of the wiring pattern portion to be formed is removed by laser so that the remaining portion becomes the electroplating resist 402. First, electroplating is performed and then electroplating is performed. Cu (copper) is deposited on the non-adhered portion of the resist 402 to form the necessary wiring pattern 2, and the wiring pattern 2 is once attached to the injection mold main body 401. A transparent thermoplastic resin such as polycarbonate is injected into the injection molding die 400 through the injection port 405 provided, and the chip carrier substrate 1 is injection molded into a predetermined shape. At this time, simultaneously with the injection molding, the wiring pattern 2 previously attached to the injection mold body 401 is transferred onto the injection-molded chip carrier substrate 1. In this case, it is not necessary to use a release agent, and due to the bite between the chip carrier substrate 1 and the wiring pattern 2, the Cu (copper) wiring pattern 2 is released from the injection mold main body 401 and the chip carrier substrate. Put on 1. In this way, the chip carrier substrate 1 is formed by injection molding, attaching a wiring pattern, taking it out from the injection molding die 400, and then removing the burrs at the bottom.

The wiring pattern 2 is a wiring pattern made of Cu (copper) attached on the chip carrier substrate 1 as described above, and one end of the wiring pattern 2 is externally arranged along the outer periphery of the chip carrier substrate 1. And a connecting terminal 6 for connecting to the semiconductor integrated circuit chip 3 arranged in the lower stage of the recess 4 in the center of the chip carrier substrate 1. The semiconductor integrated circuit chip 3 is the chip carrier substrate 1 described above.
It is mounted face down in the central recess 4 by a flip chip method, is connected to the connection terminal 6 at the end of the wiring pattern 2 via the Au (gold) bump 7, and is attached to the insulating ultraviolet curable adhesive 8. And is fixed to the chip carrier substrate 1. Even when the ultraviolet curable adhesive 8 is cured, it is advantageous that the chip carrier substrate 1 is transparent. That is, by irradiating the ultraviolet curable adhesive 8 with ultraviolet rays through the chip carrier substrate 1, curing can be performed in a shorter time.

When the semiconductor integrated circuit chip 3 is mounted on the chip carrier substrate 1, an optical alignment device is used for alignment between the connection pads 9 of the semiconductor integrated circuit chip 3 and the connection terminals 6 of the chip carrier substrate 1, and a chip is used. Light is applied from the back side of the mounting surface of the semiconductor integrated circuit chip 3 of the carrier substrate 1, the light is transmitted through the chip carrier substrate 1, the position of the connection pad 9 of the semiconductor integrated circuit chip 3 is sensed, and the alignment is executed. .. This allows the mounter to directly recognize the outer shape of the semiconductor integrated circuit chip and the position of the connection pad, unlike the case where the connection pad is indirectly aligned with the connection terminal. Since the terminals can be aligned, the alignment accuracy was greatly improved.

After that, the semiconductor integrated circuit chip 3 is completely resin-sealed by potting the sealing resin 10 in the recess 4, and the probe of the semiconductor integrated circuit testing device is brought into contact with the connection terminals 5 on the outer periphery of the chip carrier substrate 1. Then, a quality assurance test such as an operation test of the semiconductor integrated circuit is performed.

The chip carrier having such a structure according to the present invention has a semiconductor integrated circuit chip 3 as shown in FIG.
It is mounted on the printed wiring board 11 such that the mounting surface of is opposed to the printed wiring board.

That is, the external connection terminals 5 arranged along the outer periphery of the chip carrier substrate 1 are aligned to the cream solder 13 placed on the connection terminals 12 arranged on the printed wiring board 11. This cream solder comes into contact with the connection terminal 5 of the chip carrier substrate 1 and the connection terminal 12 provided on the printed wiring board 11 through a reflow process.
And are connected.

At the time of alignment between the chip carrier and the printed wiring board, an optical alignment device is used to irradiate light from the back side of the mounting surface of the semiconductor integrated circuit chip 3 of the chip carrier substrate 1 and transmit the chip carrier substrate 1. The positions of the connection terminals 12 of the printed wiring board 11 and the connection terminals 5 of the chip carrier are sensed and aligned by the emitted light, and they are mounted by an automatic mounting device.

As a result, unlike the conventional case where the mounter recognizes the outer shape of the chip carrier and the positions of the connection terminals, and thereby indirectly aligns the connection terminals of the chip carrier with the connection terminals of the printed wiring board,
Since the connection terminal of the chip carrier and the connection terminal of the printed wiring board can be directly aligned, the alignment accuracy can be significantly improved.

As described above, since the alignment accuracy between the chip carrier and the semiconductor integrated circuit chip mounted thereon and the alignment accuracy between the chip carrier and the printed wiring board on which the chip carrier is mounted are significantly improved, According to the chip carrier of the invention, it is possible to cope with a further increase in the number of pins of the semiconductor integrated circuit and a further increase in the density of the printed wiring board.

Although the chip carrier substrate is formed by injection molding in this embodiment, the invention is not limited to this. A recess may be formed in a transparent and flat resin plate by spot facing, and the wiring pattern may be formed by chemical plating such as electroless copper plating.

Further, although the flip chip method is used for mounting and connecting the chips in this embodiment, a chip on board or a TAB method may be used. In that case, the chip is mounted face up, and a space for the bonding wire 201 for connection and the lead is required. Therefore, as shown in FIG.
You have to step.

[0035]

As described above in detail, according to the present invention, it is difficult to perform the alignment between the chip carrier and the external printed wiring board and the alignment between the chip carrier body substrate and the semiconductor chip. It is possible to provide a chip carrier that solves the problem of difficulty, realizes high-density and highly reliable mounting, and has easy alignment of connection terminals during mounting.

[Brief description of drawings]

FIG. 1 is a perspective view showing a chip carrier according to the present invention.

FIG. 2 is a side sectional view of a chip carrier according to the present invention.

FIG. 3 is a side sectional view showing a state in which the chip carrier according to the present invention is mounted on a printed wiring board.

FIG. 4 is a side sectional view showing a die for injection molding and wiring pattern transfer of a chip carrier according to the present invention.

FIG. 5 is a side sectional view of a chip carrier according to a conventional technique.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Chip carrier substrate 2 ... Wiring pattern 3 ... Semiconductor integrated circuit chip 4 ... Recessed portion 5 ... External connection terminal 6 ... Semiconductor integrated circuit chip connection terminal 7 ... Au bump 8 ... Insulating UV-curable adhesive 9 Connection pad 10 Potting resin 11 Printed wiring board 12 Connection terminals on printed wiring board 13 Cream solder

Claims (2)

[Claims] 1. A transparent substrate on which a semiconductor circuit chip is mounted, one end of which is electrically connected to a connecting portion of the semiconductor circuit chip and the other end of which is electrically connected to a connecting portion of an external printed wiring board. And a wiring pattern arranged on the surface of the substrate. 2. The substrate has a recess for mounting the semiconductor circuit chip, and the wiring pattern is arranged on a surface on the same side as the surface of the substrate on which the semiconductor circuit chip is mounted. The chip carrier according to claim 1, wherein the chip and the wiring pattern are connected face down by a flip chip method.