JPH0513624A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH0513624A
JPH0513624A JP16535391A JP16535391A JPH0513624A JP H0513624 A JPH0513624 A JP H0513624A JP 16535391 A JP16535391 A JP 16535391A JP 16535391 A JP16535391 A JP 16535391A JP H0513624 A JPH0513624 A JP H0513624A
Authority
JP
Japan
Prior art keywords
chip
semiconductor device
metal wire
inner lead
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16535391A
Other languages
Japanese (ja)
Inventor
Kenichi Kusaka
健一 日下
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP16535391A priority Critical patent/JPH0513624A/en
Publication of JPH0513624A publication Critical patent/JPH0513624A/en
Pending legal-status Critical Current

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To provide a low-cost, thin semiconductor device widely using a general-purpose lead frame to facilitate the manufacturing. CONSTITUTION:An IC chip 1 is fixed with an insulating film 2 in such a manner that pad surfaces on it are flush with the surface of inner leads 4. The IC chip and inner leads are electrically connected by metal wire 5. The metal wire is laid along the film 2 to keep its loop as low as possible. The film serves to keep the wire insulated. Then, the chip is molded with resin 6.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、樹脂封止される半導
体装置に関し、特に半導体チップの搭載構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-sealed semiconductor device, and more particularly to a semiconductor chip mounting structure.

【0002】[0002]

【従来の技術】図3は従来の半導体装置の側断面図であ
る。同図において、1は集積回路が形成された半導体チ
ップ(以下ICチップと称する)、7はICチップを載
置固定するダイパット、8はICチップ1とダイパット
7を固着する接着剤、4はダイパット7を囲こむように
配設された複数のインナーリード、5はICチップ1と
インナーリード4を電気的に接続する金属細線、6はこ
れらICチップ1、インナーリード4、金属細線5およ
びダイパット7を樹脂封止するモールド樹脂である。従
来の半導体装置は上述の構造となっており、以下組立の
順序を説明する。まず、ICチップ1をダイパット7に
はんだ等の接着剤8で固着する。次に、ICチップ1と
インナーリード4を金等の金属細線5で電気的に接続す
る。最後にモールド樹脂6で樹脂封止を行う。
2. Description of the Related Art FIG. 3 is a side sectional view of a conventional semiconductor device. In the figure, 1 is a semiconductor chip on which an integrated circuit is formed (hereinafter referred to as IC chip), 7 is a die pad for mounting and fixing the IC chip, 8 is an adhesive agent for fixing the IC chip 1 and the die pad 7, and 4 is a die pad. A plurality of inner leads arranged so as to surround 7 are thin metal wires for electrically connecting the IC chip 1 and the inner leads 4, and 6 are these IC chips 1, inner leads 4, thin metal wires 5 and die pad 7. Mold resin for resin sealing. The conventional semiconductor device has the above-mentioned structure, and the order of assembling will be described below. First, the IC chip 1 is fixed to the die pad 7 with an adhesive 8 such as solder. Next, the IC chip 1 and the inner lead 4 are electrically connected by a fine metal wire 5 such as gold. Finally, resin molding is performed with the mold resin 6.

【0003】[0003]

【発明が解決しようとする課題】従来の半導体装置は以
上のように構成されているので、金属細線の高さを確保
するためおよびダイパットの厚み分だけ薄型化に対して
余分な厚みとなっている。また、断面構造の適正化およ
び金属細線の接続を容易とするために、ダイパット沈め
を行わなければならず、このため構造が複雑となり余分
な加工時間を要する。また、搭載するICチップが変わ
ると、それに対応してリードフレームを変えなければな
らず、コストが高くなるという問題点があった。本発明
は上記した従来の問題点に鑑みなされたものであり、そ
の目的とするところは、薄型化に対応できるとともに、
フレームの汎用化を図り製造を容易とし、かつ安価な半
導体装置を提供することにある。
Since the conventional semiconductor device is constructed as described above, an extra thickness is required for securing the height of the thin metal wire and for reducing the thickness by the thickness of the die pad. There is. Further, the die pad must be submerged in order to optimize the sectional structure and facilitate the connection of the fine metal wires, which complicates the structure and requires extra processing time. Further, when the IC chip to be mounted changes, the lead frame must be changed correspondingly, which causes a problem of high cost. The present invention has been made in view of the above-mentioned conventional problems, and an object of the present invention is to support thinning,
A general purpose of the frame is to provide a semiconductor device which is easy to manufacture and inexpensive.

【0004】[0004]

【課題を解決するための手段】この目的を達成するため
に、本発明は、半導体チップとインナリードを金属細線
により電気的に接続し樹脂封止した半導体装置であっ
て、前記半導体チップのパッド面とインナーリードの表
面とを絶縁性フィルムで接続したものである。
To achieve this object, the present invention is a semiconductor device in which a semiconductor chip and an inner lead are electrically connected by a fine metal wire and resin-sealed, and the pad of the semiconductor chip is provided. The surface and the surface of the inner lead are connected by an insulating film.

【0005】[0005]

【作用】本発明においては、ダイパットを不要としたこ
とによりダイパットの厚み分パッケージ厚が薄くなる。
また、ICチップのパッド面とインナーリードの表面と
を同一平面とすることができ、かつICチップとインナ
ーリード表面に絶縁層があるため、金属細線の高さを低
くすることができ、これによりさらに薄くすることがで
きる。また、ICチップとインナーリードの表面に絶縁
層があることにより、金属細線を長くしても誤接触する
とがなく、このためフレームの自由度が大きく1種類の
フレームで多種類のICチップを搭載できる。
In the present invention, since the die pad is not required, the package thickness is reduced by the thickness of the die pad.
Further, the pad surface of the IC chip and the surface of the inner lead can be made to be on the same plane, and since the insulating layer is provided on the surface of the IC chip and the inner lead, the height of the thin metal wire can be reduced. It can be made even thinner. In addition, since there is an insulating layer on the surface of the IC chip and the inner lead, there is no accidental contact even if the metal thin wire is lengthened, so the degree of freedom of the frame is large and many types of IC chips can be mounted on one type of frame. it can.

【0006】[0006]

【実施例】以下、この発明の一実施例を図にもとづいて
説明する。図1は本発明の平面図、図2は同側断面図で
ある。これらの図において、従来技術と同一符号を付し
たものは同一の構成を示すもので詳細な説明は省略す
る。本発明の特徴とするところは、従来ICチップを載
置固定していたダイパットに代わるものとして、正方形
の薄膜状の絶縁性フィルム5を用いた点にある。すなわ
ち、フィルム2の中央部裏面にICチップ1のパッド面
を接着剤3を介して接着固定するとともに、フィルム2
の周縁部裏面を接着剤3を介してインナーリード4の先
端部分に接着固定し、これによって、ICチップ1を図
示しないリードフレームに固定する。なお、ICチップ
1の周縁部に対応してフィルム2に穿設した4つの切欠
き2aは、金属細線5とICチップ1の電極との電気的
接続をするためのものである。また、前記接着剤3は熱
硬化型の樹脂等が使用される。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a plan view of the present invention, and FIG. 2 is a side sectional view of the same. In these figures, the components denoted by the same reference numerals as those in the prior art indicate the same configurations, and detailed description thereof will be omitted. A feature of the present invention is that a square thin insulating film 5 is used as a substitute for the die pad on which the IC chip is conventionally mounted and fixed. That is, the pad surface of the IC chip 1 is adhered and fixed to the back surface of the central portion of the film 2 via the adhesive 3, and the film 2
The back surface of the peripheral edge portion of is adhered and fixed to the tip portion of the inner lead 4 via the adhesive 3, whereby the IC chip 1 is fixed to a lead frame not shown. The four notches 2a formed in the film 2 corresponding to the peripheral edge of the IC chip 1 are for electrical connection between the thin metal wires 5 and the electrodes of the IC chip 1. A thermosetting resin or the like is used as the adhesive 3.

【0007】次に、組立順序を説明する。まず、インナ
ーリード5の上面とICチップ1のパッドがある面を同
一平面にして、絶縁フィルム7を接着剤3でインナーリ
ード4とICチップ1とを固着する。次にICチップ1
とインナーリード4とを金属細線5で電気的に接続す
る。このとき金属細線5を絶縁フィルム2上を這わせる
ようにして、できるだけ金属細線5のループ高さを低く
する。最後に、モールド樹脂6で樹脂封止する。前記金
属細線5はフィルム2で絶縁が保持されるので、ICチ
ップ1が小形でインナーリード4までの距離があり、金
属細線5を長くする必要が生じても短絡等のご接続はな
く、したがって、1つにリードフレームで多種類のIC
チップに対応できる。
Next, the assembly sequence will be described. First, the upper surface of the inner lead 5 and the surface of the IC chip 1 on which the pad is located are flush with each other, and the insulating film 7 is fixed to the inner lead 4 and the IC chip 1 with the adhesive 3. Next, IC chip 1
And the inner lead 4 are electrically connected to each other with a thin metal wire 5. At this time, the metal fine wire 5 is made to crawl on the insulating film 2 so that the loop height of the metal fine wire 5 is made as low as possible. Finally, the resin is sealed with the mold resin 6. Since the insulation of the thin metal wire 5 is held by the film 2, the IC chip 1 is small and there is a distance to the inner lead 4. Even if it is necessary to lengthen the thin metal wire 5, there is no connection such as a short circuit. Multiple types of ICs with one lead frame
Can handle chips.

【0008】[0008]

【発明の効果】以上説明したように、本発明によれば半
導体チップのパッド面とインナーリードの表面とを絶縁
性フィルムで接続するようにしたので、従来ダイパット
を用いてた場合に比較してパッケージの厚みを薄くで
き、また、1つのリードフレームで各種のICチップに
対応でき、リードフレームの自由度が高まり、製造が容
易となり安価な装置が得られる効果がある。
As described above, according to the present invention, the pad surface of the semiconductor chip and the surface of the inner lead are connected by the insulating film. Therefore, compared with the case where the conventional die pad is used. The thickness of the package can be reduced, one lead frame can be used for various IC chips, the flexibility of the lead frame can be increased, the manufacturing can be facilitated, and an inexpensive device can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の平面図である。FIG. 1 is a plan view of the present invention.

【図2】本発明の側断面図である。FIG. 2 is a side sectional view of the present invention.

【図3】従来の側断面図である。FIG. 3 is a conventional side sectional view.

【符号の説明】[Explanation of symbols]

1 ICチップ 2 絶縁性フィルム 4 インナーリード 5 金属細線 6 モールド樹脂 1 IC chip 2 Insulating film 4 Inner lead 5 Metal wire 6 Mold resin

Claims (1)

【特許請求の範囲】 【請求項1】 半導体チップとインナリードを金属細線
により電気的に接続し樹脂封止した半導体装置であっ
て、前記半導体チップのパッド面とインナーリードの表
面とを絶縁性フィルムで接続したことを特徴とする半導
体装置。
Claims: 1. A semiconductor device in which a semiconductor chip and an inner lead are electrically connected by a thin metal wire and resin-sealed, and the pad surface of the semiconductor chip and the surface of the inner lead are electrically insulative. A semiconductor device characterized by being connected by a film.
JP16535391A 1991-07-05 1991-07-05 Semiconductor device Pending JPH0513624A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16535391A JPH0513624A (en) 1991-07-05 1991-07-05 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16535391A JPH0513624A (en) 1991-07-05 1991-07-05 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH0513624A true JPH0513624A (en) 1993-01-22

Family

ID=15810753

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16535391A Pending JPH0513624A (en) 1991-07-05 1991-07-05 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0513624A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5577312A (en) * 1994-01-21 1996-11-26 Amada Mfg America Inc. Method of separating micro-joint processed products

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5577312A (en) * 1994-01-21 1996-11-26 Amada Mfg America Inc. Method of separating micro-joint processed products
US5683023A (en) * 1994-01-21 1997-11-04 Amada Mfg America, Inc. Apparatus for separating micro-joint processed products and die used therefor

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