JPH0513412A - Wiring for semiconductor integarted circuit - Google Patents

Abstract

PURPOSE:To suppress the deterioration of wiring due to electromigration, and to improve reliability of the wiring by a method wherein a wiring is composed of at least two parts in parallel, and the crystal grain size of the metal consisting of the above-mentioned two parts are made different from each other. CONSTITUTION:After a desired element structure is formed on a substrate and contact patterning is provided, the temperature of the substrate is set at T2, the first metal thin film of crystal grains of R2 formed on the whole surface of the substrate by the method such as vacuum deposition, sputtering and vapor growth and the like. After the first metal thin film has been formed, the substrate temperature is set at T1 which is lower than T2, and the second metal thin film, having the crystal grain size of R1 which is smaller than R2, is formed on the upper part of the first metal thin film. Then, a mask is formed based on the ordinary method, etching is conducted, and the desired pattern is formed. The semiconductor integrated circuit obtained as above has less detdrioration and the connected of wire caused by electromigration and reliability can be improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring technique in a semiconductor integrated circuit such as LSI and VLSI.
In particular, it relates to a technique for improving reliability in aluminum wiring.

[0002]

2. Description of the Related Art In the field of semiconductor integrated circuits in which many circuit elements are integrated as a circuit on a semiconductor substrate, higher integration has been required in recent years, and in line with this, miniaturization of wiring width is required. Is becoming.

However, in a semiconductor integrated circuit having a fine wiring width, the wiring is broken during its operation, which causes a problem that the reliability as a product is significantly impaired.

It is considered that such a problem is caused by electromigration, that is, a phenomenon in which the wiring metal starts to move by exchanging momentum with the carrier. As a result of the movement of metal atoms, voids are formed in the portion where the metal is reduced. Can occur, and in the worst case, wire breakage will occur.

Conventionally, aluminum has been mainly used as a wiring material for semiconductor integrated circuits, but as a method of suppressing disconnection due to such electromigration, addition of other metal such as copper to aluminum is performed. It is known to be effective. However, when copper is added to aluminum, especially when an alloy with a high proportion is used as a wiring metal, the selectivity between the wiring metal and the mask material by the etching agent becomes low during wiring patterning, which makes etching difficult. Was caused.

[0006]

SUMMARY OF THE INVENTION Therefore, it is an object of the present invention to provide a novel wiring structure which improves the reliability of a semiconductor integrated circuit. The present invention also provides
An object of the present invention is to provide a wiring structure capable of effectively suppressing wiring deterioration due to electromigration. A further object of the present invention is to provide a wiring structure capable of dealing with the miniaturization of the wiring width accompanying the high integration of semiconductor integrated circuits with high reliability.

[0007]

[Means for Solving the Problems]
In the wiring formed in the semiconductor integrated circuit, it is achieved by forming one wiring in parallel with at least two portions and making the crystal grain sizes of the metals forming the respective portions different from each other.

In the present specification, the "crystal grain size" of a metal refers to the approximately mode value in the grain size distribution of the crystal grains existing in the wiring or the metal forming each portion of the wiring.

[0009]

The electromigration is a phenomenon in which the wiring metal starts to move by exchanging momentum with the carrier as described above, and thus the degree tends to increase as the current density increases. When the current flowing through the wiring is I, the width of the wiring on the plane perpendicular to this current is W, and the height of the wiring is h, the current density i is i = I / (W ×
h). Thus, for example, as shown in FIG. 3, the wiring L ₁ wiring width is W _1, the wiring L ₂ has a smaller wiring width W ₂ than the W _1, smaller electromigration towards wiring L ₂ of the wiring width Tends to do.

On the other hand, in this phenomenon, it is considered that the metal atoms tend to move along the crystal grain boundaries of the wiring metal. Therefore, when the crystal grain size of the wiring metal is R ₁ , as shown in FIG. 4, the wiring width W _a is larger than the crystal grain size R ₁
In the wiring L _a , the metal atoms easily move along the crystal grain boundaries in the current direction, but in the wiring L _b in which the wiring width is W _a smaller than the crystal grain size R ₁ , the wiring is Since only one crystal grain exists in the width direction and the crystal grain boundary in the current direction disappears, electromigration tends to be less likely to occur.

The inventors of the present invention have the following two tendencies regarding the wiring width of electromigration. Therefore, in the wiring using a metal having a certain crystal grain size R ₁ , deterioration due to electromigration and the wiring width are shown in FIG. As schematically shown in b), it was found that there is an almost quadratic curve-like relationship with a certain wiring width as a minimum point. That is, when the wiring width becomes narrow, the tendency that electromigration easily occurs due to the increase in current density and the tendency that electromigration is suppressed due to the absence of crystal grain boundaries are combined, whereby electromigration Deterioration and wiring width have a relationship of a quadratic curve with a certain wiring width as a minimum point, and this minimum point depends on the crystal grain size of the wiring metal and the horizontal axis (wiring width). It turned out that it fluctuates in the direction.
Less likely to deteriorate due to electromigration,
In other words, the range of the wiring width in which the non-defective product can be obtained is a limited portion before and after this minimum point, and therefore, the semiconductor wiring is limited to the metal having the crystal grain size R ₁ as shown in FIG. 2A, for example. In the conventional example configured by, the range of the wiring width required in one semiconductor integrated circuit is the crystal grain size R
_If it exceeds the non-defective range of the metal of ₁ , the product reliability may be significantly impaired.

The present inventors, based on such knowledge,
It has been found that by constructing one wiring by combining a plurality of portions having different crystal grain sizes, wiring deterioration due to electromigration can be effectively suppressed. For example, when a wiring is formed by laminating a metal thin film having a crystal grain size R _{1 and} a metal thin film having a crystal grain size R ₂ as shown in FIG. 1, in this wiring, as shown in FIG. The range of good products in the metal thin film having the crystal grain size R _{1 and} the range of good products in the metal thin film having the crystal grain size R ₂ are combined to broaden the range of use.

Hereinafter, the present invention will be described in more detail based on embodiments. In the present invention, the wiring is formed by at least two parallel portions formed of metal thin films having different crystal grain sizes.

The plurality of parallel portions existing in one wiring as described above may be laminated in the thickness direction of the wiring, as in the example shown in FIG. 1A, for example. Although the wirings may be adjacent to each other in the width direction of the wiring, the former shape is desirable from the viewpoint of easy formation.

The metal forming each of the above-mentioned portions of the wiring is not particularly limited, and Al or Al alloys such as Al-Cu alloys, Al-Si-Cu alloys and Al-Pd alloys are used. Used. In addition, in the wiring of the present invention, sufficient electromigration resistance can be obtained even if an aluminum material to which Cu, Pd, or the like is not added is used. In such an aspect, good workability can be expected. . Further, the metals forming the above respective portions of the wiring may be the same or different.

In the present invention, the metal thin films forming the above-mentioned respective portions of the wiring are assumed to have different crystal grain sizes, and the combination of the crystal grain sizes is shown in FIG. 1 (b), for example.
As shown in Fig. 2, the non-defective range in each crystal grain size that fluctuates in the horizontal axis direction depending on the crystal grain size is combined as much as possible, and this is required in the wiring design of the semiconductor integrated circuit. It is desired to cover the entire wiring width range as a non-defective product range. With such a combination,
Sufficient electromigration resistance can be obtained even if the number of each of the above-mentioned parts constituting the wiring is about 2 to 3. On the other hand, in the case where the non-defective product ranges are overlapped in a considerable part, the sufficient effect cannot be obtained even if the number of the above-mentioned parts constituting the wiring is considerably increased. It is not preferable to increase the number of each of the above-mentioned parts forming the wiring in view of miniaturization and high integration of the integrated circuit.

Various methods are conceivable for controlling the crystal grain size of the wiring metal.
It can be easily performed by changing the substrate temperature when forming the metal thin film to be the wiring on the substrate, or after forming the metal thin film on the substrate in this way and then performing heat treatment on the substrate. it can. FIG. 5 shows an example of the relationship between the substrate temperature and the crystal grain size when an Al thin film is formed on the substrate by sputtering. Therefore,
Generally, in the wiring formation in a semiconductor integrated circuit, after forming a desired element structure on a substrate and contact-patterning it, a metal film is deposited on the entire surface of the substrate by a method such as vacuum deposition, sputtering, and vapor phase growth, and thereafter. This is performed by forming a mask having a predetermined wiring pattern on this and removing an unnecessary portion of the metal film which is not covered with the mask by etching. It can be easily carried out by making a slight modification to the conventional method.

That is, for example, as shown in FIG. 1A, when a wiring having a structure in which two metal layers having different crystal grain sizes are laminated is formed, first, as in the conventional case, the wiring is formed on the substrate. Form the desired element structure and contact
After patterning, the substrate temperature is set to T ₂ , and a first metal thin film having a crystal grain size R ₂ is formed on the entire surface of the substrate by a method such as vacuum deposition, sputtering and vapor phase growth. After the formation of the first metal thin film, the substrate temperature is adjusted to T ₂
Then, the second metal thin film having a crystal grain size R ₁ smaller than R ₂ is formed on the first metal thin film again by setting the T ₁ to a lower value than the above. Thereafter, a mask is formed and etching is performed according to a conventional method to form a desired wiring pattern. Alternatively, the substrate temperature during the formation of such first and second metal thin films is kept constant at T ₁ , and after the formation of the first metal thin film, the substrate is heat-treated at a temperature T ₂ higher than T _1. R is the crystal grain size of the first metal thin film
It is also possible to grow from ₁ to R ₂ and then form a second metal thin film having a crystal grain size R _{1 on} top of the first metal thin film. However, as a matter of course, the method for forming the wiring according to the present invention is not limited to these methods as long as the above-mentioned desired configuration regarding the crystal grain size is obtained.

[0019]

EXAMPLES The present invention will be described in more detail below with reference to examples. In order to confirm the improvement in reliability of the semiconductor integrated circuit due to the wiring according to the present invention, the semiconductor integrated circuit was actually manufactured. The wiring patterning at this time was performed by the following method.

First, a substrate on which a desired element structure is formed and which is contact-patterned is carried into a sputtering processing chamber, the pressure in the sputtering processing chamber is reduced to 1 × 10 ^-6 Torr, and then the substrate is heated to a substrate temperature of 500 ° C. Once held in
Ar gas was introduced into the processing chamber to increase the system pressure to 4 × 10 ^-2 To.
rr, sputtering is performed by high frequency induction to form a first Al thin film having a thickness of 2500 angstroms on the substrate surface, and once a thin film having a desired thickness is formed, the sputtering is terminated to lower the substrate temperature. Is 3
Once kept at 00 ° C, do the sputtering again,
A second Al thin film having a thickness of 2500 Å was further formed on the first Al thin film. afterwards,
A wiring pattern was formed on the substrate by a photolithography method using a photoresist based on a conventional method, dry etching was performed using the photoresist as a mask, and finally the resist was removed. The minimum wiring width in the obtained integrated circuit was 1.0 μm. Incidentally, from the structure inspection of the sputtered film by an electron microscope which was separately performed, it was determined that the crystal grain size of the first Al thin film was 5.0 μm and the crystal grain size of the second Al thin film was 0.1 μm. Was done.

On the other hand, for comparison, the sputtering process was changed to the one in which a single-layer Al thin film having a thickness of 5000 Å was formed at a substrate temperature of 300 ° C., and the wiring was formed by this thin film in the same manner as described above. A comparative product was made.

When the semiconductor integrated circuit thus obtained was subjected to an accelerated life test, all the products to which the wiring according to the present invention was applied were deteriorated due to electromigration as compared with the comparative products. The number of disconnections was small, and the reliability was improved about 3 to 5 times in any lot.

[0023]

As described above, according to the present invention, the wiring formed in the semiconductor integrated circuit is composed of a plurality of parallel metal thin films having different crystal grain sizes. It is possible to effectively prevent the deterioration and disconnection of the semiconductor integrated circuit and contribute to the improvement of the reliability of the semiconductor integrated circuit.

[Brief description of drawings]

1A is a schematic diagram showing an embodiment of a wiring structure according to the present invention, and FIG. 1B is a diagram showing a relationship between deterioration due to electromigration and wiring width in a wiring having the same structure;

2A is a schematic diagram showing an example of a conventional wiring structure, and FIG. 2B is a diagram showing a relationship between deterioration due to electromigration and wiring width in a wiring having the same structure;

FIG. 3 is a diagram for explaining an increase in current density due to a decrease in wiring width,

FIG. 4 is a diagram for explaining disappearance of crystal grain boundaries in the current direction due to a decrease in wiring width;

FIG. 5 is a diagram showing a relationship between substrate temperature and crystal grain size when an Al thin film is formed on a substrate by sputtering.

[Explanation of symbols]

_{W 1, W 2, W a} , W b ... wire _{width, L 1, L 2, L} a, L b ... wire, R _1, R ₂ ... grain size.

Claims (2)

[Claims] 1. A wiring formed in a semiconductor integrated circuit, wherein one wiring is composed of at least two parts,
A wiring of a semiconductor integrated circuit, wherein the crystal grain sizes of the metals forming the respective portions are different from each other. 2. The wiring of the semiconductor integrated circuit according to claim 1, wherein the metal forming each of the portions includes at least aluminum or an aluminum alloy.