JPH0513381A - Dry etching method - Google Patents

Abstract

PURPOSE:To simultaneously attain to the high anisotropy, rapidity and low pollusion level in the silicon trench etching step. CONSTITUTION:A wafer is cooled down at -70 deg.C to etch away a single crystal silicon substrate using Cl2/N2/S2F2 mixed gas. The etching step can be performed rapidly compared with the conventional step using Cl2/N2 base mixed gas due to F* produced from S2F2 contributing to the etching step. At this time, in addition to the production of the liberated S from S2F2, a part of this S reacts to N2 so as to produce (SN)n in polymer state having the high resistance to radical attack or ion shock. Next, these products together with SixNy, etc., are formed into a sidewall protective film 5 so as to enhance the sidewall protective effect on attaining the high anisotropy. Furthermore, S and (SN)n can be easily sublimated or decomposed to be removed by heating the wafer so as not to cause the particle pollution at all.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dry etching method applied in the field of manufacturing semiconductor devices, etc., and in particular, it has low contamination, high speed and high characteristics when performing high aspect ratio processing such as silicon trench etching. It is about how to simultaneously achieve torpority.

[0002]

2. Description of the Related Art As semiconductor devices have become more highly integrated and have higher performance as seen in recent VLSI, ULSI, etc., the aspect ratios of various patterns in semiconductor devices tend to increase rapidly. Therefore, also for the dry etching technique, a technique for performing high aspect ratio processing with favorable anisotropy is desired. A typical example of high aspect ratio processing of a silicon-based material layer is silicon for the purpose of forming capacitive elements and element isolation.
It is trench etching. The depth of the trench depends on the device type and application, and is 4 to 5μ for the capacitive element.
m, element separation is about 1 μm for MOS transistors and about 4 μm for bipolar transistors.
The opening diameter is about 0.35 to 1.0 μm. In order to realize such high aspect ratio processing, RIE (reactive ion etching) using various etching gases has been conventionally proposed. The etching gas is roughly classified into two types, a fluorine-based gas and a chlorine-based gas.

The etching of the silicon-based material layer with the fluorine-based gas essentially proceeds spontaneously based on the radical reaction. This is because the interatomic bond energy of the Si—F bond is much larger than that of the Si—Si bond and the radius of F ^* is small, so that it can easily penetrate into the crystal lattice of single crystal silicon. However, when the opening diameter of the trench becomes small, the incidence of radicals decreases, and the problems such as a decrease in etching rate and a thin tip of the trench cannot be avoided. Therefore, the fluorine-based gas is not generally suitable for high aspect ratio processing of the silicon-based material layer. On the other hand, the etching of the silicon-based material layer with the chlorine-based gas essentially proceeds based on the ion-assisted reaction. This is because Cl has a relatively large radius and cannot easily penetrate into the crystal lattice of single crystal silicon.
^This is because etching is performed by a mechanism that gives ion incident energy to ^* . Therefore, etching under high bias conditions is required. However, the magnitude relationship of the interatomic bond energy is Si-O bond> Si-Cl bond, and S
Chlorine-based gas is generally used for high-aspect-ratio processing of a silicon-based material layer for the reason that a high selection ratio can be obtained with respect to an iO ₂ -based mask and an anisotropic shape can be easily obtained.

By the way, even if chlorine gas is used,
The silicon trench etching has a problem in that the cross-sectional shape of the trench changes intricately depending on the mask pattern, etching parameters, etc., and it is difficult to fill the trench and control the capacitance in the subsequent process.
For example, as shown in FIG. 2, consider the case where a single crystal silicon substrate 11 is etched through an opening 14 of an etching mask composed of a SiO ₂ pattern 12 and sidewalls 13. This is a so-called deep trench for the purpose of forming a capacitive element or the like.
nch) is formed. Here, the sidewall 13 is provided to obtain a fine opening 14 that exceeds the resolution limit of the current photolithography, and is self-aligned by etching back the SiO ₂ deposited film by CVD. Has been formed.
Thus, when the edge portion of the etching mask is rounded, the ions that are vertically incident on this portion are scattered and are obliquely incident on the inside of the opening 14.
Due to the influence of such ions, the cross-sectional shape of the formed trench 11a does not have an anisotropic shape, and the bow-shaped curved portion 15 is formed on the side wall portion. This is a so-called bowing phenomenon. Such a phenomenon is not limited to the case where the sidewall 13 is formed on a part of the etching mask, and the edge portion of the etching mask is sputtered by ions having a high incident energy under a high bias condition to be rounded. It also occurs when

When Cl ₂ gas is used alone, the trench 11b having the undercut portion 16 as shown in FIG. 3 may be formed. This is C
This is because the influence of l ^* is strongly manifested. In such a case, as the trench 11a becomes deeper, it becomes more difficult for active species to reach the bottom of the trench 11a, so the cross-sectional shape is tapered as shown in the drawing.

Therefore, in order to prevent the above-described deterioration of the cross-sectional shape of the trench, an etching gas capable of forming a depositable substance under discharge dissociation conditions is used, and the depositable substance is utilized to protect the sidewall. Several methods have been proposed in the past. For example, the applicant of the present invention first disclosed in Japanese Patent Laid-Open No. 63-
The SiCl ₄ / N ₂ mixed gas disclosed in Japanese Patent No. 73526 is a typical example. This, together to generate a Cl ^* and Cl ⁺ from SiCl ₄ as a main etching species, Si _x N in the gas phase by reaction with SiCl ₄ and N _{2
In this method, y} , Si _x N _y Cl _z, etc. are generated, and these are deposited to protect the side wall. According to this technique, particle contamination can be reduced far more than when a carbon-based polymer is used as a sidewall protective material, and etching can be performed under clean conditions.

Further, the applicant of the present invention is disclosed in Japanese Patent Laid-Open No. 64-599.
Japanese Patent Publication No. 17 also discloses a technique of performing silicon trench etching using a Cl ₂ / N ₂ mixed gas. This technique also uses Si _x N _y , Si _x N _y Cl _z, etc. as the side wall protective material, but these are generated by the reaction between the etching reaction products SiCl _x and N ₂ . Therefore, the particle contamination can be further reduced as compared with the case where the depositable substance is generated in the gas phase due to the reaction between the constituent components of the etching gas as in the process using the SiCl ₄ / N ₂ mixed gas described above. It will be possible.

[0008]

However, if the design rules of semiconductor devices continue to progress at a rapid pace, it becomes necessary to reduce particle contamination at a higher level than ever before. From this viewpoint, the above-mentioned Si _x N _y , Si
Although processes utilizing _x N _y Cl _z, etc. meets the current requirements, not come to avoid fundamentally particle contamination. Moreover, since silicon trench etching generally requires a long process time and produces a large amount of depositable substances, it is premised that such substances can be easily and completely removed after etching even if they are used for sidewall protection. . In addition, as described above, in the process using the sidewall protection, the bias power can be lowered as compared with the case where the achievement of the high anisotropy depends only on the vertical incidence of ions, so that the selectivity with respect to the resist mask is improved. Can be made. However, since the etching reaction of the silicon-based material layer by chlorine-based gas is rate-controlled by the ion assist process and it is essentially difficult to increase the speed, lowering the bias conditions will further decrease the etching rate. . In the field of dry etching in the future, single-wafer processing will become the mainstream, and it is expected that the demand for high-speed processing will increase more than ever, so it is necessary to further improve the etching speed in order to provide a practical process. is there.

Approaches for improving the etching rate are roughly classified into a method of increasing the radical property of the etching reaction system and a method of increasing the ion incident energy under a high bias condition. For example, the applicant of the present application previously disclosed in Japanese Patent Laid-Open No. 3-129730, SiCl ₄ /
A technique of adding a fluorine-based compound capable of generating F ^* such as ClF ₃ to the N ₂ mixed gas is also proposed. However, in order to prevent the deterioration of the anisotropic shape due to the increase of F ^*, the amount of the fluorine compound added is naturally limited.
On the other hand, when the ion incident energy is increased, there is a problem that the conventional sidewall protection film lacks the sidewall protection effect. In the silicon trench etching, the etching time takes a long time, and when the side wall as described above is formed in a part of the etching mask in order to miniaturize the opening, the cross-sectional shape may be reduced. There is a risk that deterioration will not be prevented. Therefore, the reality is that no process has been obtained that can satisfy the requirements for high speed, high anisotropy, and low contamination at a high level.

Although the problems in deep trench processing have been discussed above, the improvement of the etching rate is
This is also an extremely important issue in shallow trench processing for the purpose of forming an element isolation region. Generally, in the shallow trench processing, the area to be etched reaches 50% or more of the wafer area, and an area larger by an order of magnitude than 5% in the deep trench processing must be etched. When the area to be etched increases in this way, the etching rate inevitably decreases due to the loading effect, and in some cases, the rate of decrease reaches nearly 50%. Therefore, in order to realize a practical process, it is essential to increase the ion incident energy by increasing the bias and increase the radical component to improve the etching rate. Therefore, an object of the present invention is to provide a method capable of simultaneously achieving high speed, high anisotropy, and low contamination in etching a silicon-based material layer.

[0011]

The dry etching method of the present invention is proposed to achieve the above object. That is, in the dry etching method according to the first invention of the present application, while controlling the temperature of the substrate to be etched below room temperature, Cl ₂ , N ₂ , S ₂ F ₂ , SF ₂ ,
It is characterized in that the silicon-based material layer is etched using an etching gas containing at least one kind of sulfur fluoride selected from SF ₄ and S ₂ F ₁₀ .

In the dry etching method according to the second invention of the present application, SiCl ₄ , N ₂ , S ₂ F ₂ , SF ₂ and S are controlled while controlling the temperature of the substrate to be etched below room temperature.
It is characterized in that the silicon-based material layer is etched using an etching gas containing at least one kind of sulfur fluoride selected from F ₄ and S ₂ F ₁₀ .

Further, in the dry etching method according to the third invention of the present application, HBr, N ₂ , S ₂ F ₂ , and S ₂ are controlled while controlling the temperature of the substrate to be etched below room temperature.
It is characterized in that the silicon-based material layer is etched using an etching gas containing at least one kind of sulfur fluoride selected from F ₂ , SF ₄ , and S ₂ F ₁₀ .

[0014]

The present inventors have found that the attempts at speeding up in the past have been unsatisfactory in all cases because the side wall protection effect is insufficient. I thought it could be solved. In other words, if a strong sidewall protective film is formed, the amount of radicals in the etching reaction system will increase even if ions accelerated under a high bias are scattered at the mask edge and obliquely enter from the opening. Even if it does, there is no risk of bowing or undercutting.

Therefore, in order to increase the speed while strengthening the side wall protection, Cl ₂ /
N ₂ mixed gas, SiCl ₄ / N ₂ mixed gas, HBr / N
₂ Add sulfur fluoride with a high S / F ratio to the mixed gas. This sulfur fluoride is disclosed in Japanese Patent Application No. 3-20
It is a compound proposed by a series of applications including the specification No. 360, and can generate F ^* which is a main etching species of a silicon-based compound under discharge dissociation conditions. In other words, by supplying F ^* , which has hardly been used in the conventional silicon trench etching, to the etching reaction system, the etching rate is greatly improved. Further, since ions such as SF _x ⁺ and S ⁺ are also generated from the above-mentioned sulfur fluoride, the ion-assisted reaction is promoted by utilizing these ions and anisotropic processing is performed.

However, as long as F ^* is involved in the etching, stronger sidewall protection than the conventional one is required, but in the present invention, this can be realized by an extremely delicate mechanism. Another important feature of the above sulfur fluoride is
The production of free sulfur (S) under discharge dissociation conditions. This is a very different property from SF ₆ which is also stable with sulfur fluoride and has already been put to practical use as an etching gas, and does not generate free S even by discharge dissociation. The generated S deposits on the surface of the wafer whose temperature is controlled below room temperature, and exerts a side wall protection effect on the pattern side wall portion where vertical incidence of ions does not occur in principle.

Further, a part of the above S further reacts with N ₂ contained in the etching gas to form a sulfur nitride compound. As the sulfur nitride compound, the thiazyl compound represented by the general formula (NS) _n is most representative. That is, in the simplest way, N generated in plasma by discharge dissociation of a nitrogen-based compound and S generated in plasma by discharge dissociation of a sulfur-based compound are combined to first form thiazyl (N≡S). To be done. This thiazyl has an unpaired electron by analogy with the structure of nitric oxide (NO), which is an oxygen analog, and easily polymerizes (SN) ₂ , (SN) ₄ , and further (SN) _n. To generate. (SN) ₂ polymerizes easily at around 20 ° C (SN)
_It produces ₄ and (SN) _n , and decomposes itself at around 30 ° C. (SN) ₄ is a cyclic substance having a melting point of 178 ° C. and a decomposition temperature of 206 ° C. (SN) _n is chemically stable at 130 ° C
Does not disassemble. In the present invention, since the temperature of the wafer is controlled below room temperature, (SN) _n can exist stably on the wafer.

In addition to the above, halogens such as F ^* are contained in the plasma.
When a radical is present, S in (SN) _n above
A thiazyl halide having a halogen atom attached on the atom may also be produced. Further, when a hydrogen-based gas is added to control the amount of F ^* produced, thiazyl hydrogen can also be produced. Furthermore, depending on the conditions, S ₄ N ₂ (melting point 23
℃), S ₁₁ N ₂ (melting point 150 to 155 ℃), S ₁₅ N
₂ (melting point 137 ° C.), S ₁₆ N ₂ (melting point 122 ° C.), etc., a cyclic sulfur nitride compound in which the number of S atoms and N atoms in the molecule is imbalanced, or N of these cyclic sulfur nitride compounds
S ₇ NH (Helting point 113.5
℃), 1,3-S ₆ (NH) ₂ (melting point 130 ℃), 1,
4-S ₆ (NH) ₂ (melting point 133 ° C.), 1,5-S
₆ (NH) ₂ (melting point 155 ° C.), 1,3,5-S ₅ (N
H) ₃ (melting point 124 ° C.), 1,3,6-S ₅ (NH) ₃
It is also possible to produce imide type compounds such as (melting point 131 ° C.) and S ₄ (NH) ₄ (melting point 145 ° C.).

All of the above-mentioned sulfur nitride compounds containing sulfur and nitrogen as constituent elements can exist stably on a wafer whose temperature is controlled below room temperature. In particular,
Since (SN) _{n, which} is considered to be preferentially formed, is in the form of a polymer, it has a greater effect as a deposited film than S alone. That is, in the case of a polymer, as a matter of course, a covalent bond exists between a large number of atoms far more than that of S as a simple substance, and the main chain formed by the covalent bond is three-dimensionally randomly bent. Is deposited in. Therefore, it is possible to effectively prevent the penetration of etching species into the silicon substrate even during overetching. Also, even if accelerated ions are incident,
The polymer exerts a so-called sponge effect due to changes in its bond angle and conformation, and can absorb or alleviate its impact. Moreover, the above sulfur nitride compounds are decomposed when the wafer is heated to approximately 130 ° C. or higher, so that they do not remain on the wafer like conventional carbon-based polymers and cause particle contamination. is not.

By the way, conventionally proposed Cl ₂
/ N ₂ mixed gas, SiCl ₄ / N ₂ mixed gas, and H
The Br / N ₂ mixed gas has its own Si _x N _y and S
This is a system capable of producing a side wall protective material such as i _x Cl _y N _z or Si _x Br _y N _z , and naturally, these silicon nitride compounds are also produced in the present invention. However, when sulfur fluoride is added to these mixed gas systems, a part of N ₂ is consumed for the formation of (SN) _n as described above. Less.
Therefore, particle contamination can be greatly suppressed. For the above reasons, any of the inventions of the present application can simultaneously achieve high speed, high anisotropy, and low contamination.

[0021]

EXAMPLES Specific examples of the present invention will be described below.

Example 1 This example is an example in which the first invention of the present application is applied to deep trench processing, and a single crystal silicon substrate is etched using a Cl ₂ / S ₂ F ₂ mixed gas. This process will be described with reference to FIG. First, as an example, as shown in FIG. 1A, a sample wafer was prepared in which an etching mask composed of a SiO ₂ pattern 2 and sidewalls 3 was formed on a single crystal silicon substrate 1. Wherein said SiO ₂ pattern 2, novolac positive photoresist (Tokyo Ohka Kogyo Co., Ltd. of SiO ₂ deposited film formed layer thickness 1μm by CVD or the like; trade name TS
It is formed by patterning by g-line exposure using MR-V3) and alkali development to form an opening having a diameter of 0.5 μm. The sidewall 3 is formed on the entire surface of the wafer after removing the resist mask, as an example.
CVD using OS (tetraethoxysilane) as a source gas
To form a SiO ₂ deposited film having a layer thickness of 0.15 μm, and etch back the SiO ₂ deposited film by RIE. Thus, the opening diameter of the opening 4 formed in the etching mask is reduced to 0.2 μm, exceeding the resolution limit of photolithography.

Next, the above-mentioned wafer is set in a magnetic field microwave plasma etching apparatus of RF bias application type, and a cooling pipe such as ethanol is circulated through a cooling pipe built in the wafer mounting electrode to measure the wafer temperature during etching. Is -7
It was maintained at 0 ° C. In this state, Cl ₂ flow rate 30 SCCM, N ₂ flow rate 10 SCCM, S ₂ F ₂ flow rate 1
0SCCM, gas pressure 1.3Pa (10mTorr), microwave power 850W, RF bias power 200
The single crystal silicon substrate 1 was etched under the condition of W (2 MHz). In this etching process, the radical reaction by Cl ^* generated from Cl ₂ and F ^* generated from S ₂ F ₂ is accelerated in the wafer direction under high bias SF
_The single crystal silicon substrate 1 was etched by a mechanism assisted by ions such as _x ⁺ , S _x ⁺ , Cl _x ⁺ and N _x ⁺ . Here, since F ^* is involved in the etching, the etching rate is improved by about 20% as compared with the case where the RF bias power of about 100 W is applied in the Cl ₂ / N ₂ mixed gas system, and about 4500 Å / A high etching rate of minutes has been achieved.

By the way, under the above conditions, a high bias power is applied at a low RF frequency, which belongs to the category of relatively high ion incident energy among general dry etching methods. Moreover, the etching reaction system contains F ^* which is not used in the conventional general silicon trench etching. In the prior art, it was difficult to achieve anisotropic processing under such high bias conditions and in the presence of F ^* , but in the present invention, this can be achieved by strengthening the side wall protection effect. This mechanism is as follows. That is, in parallel with the above etching reaction, free S generated from S ₂ F ₂ reacts with the N-based chemical species to generate a sulfur nitride compound mainly composed of (SN) _n , and the side wall portion of the trench 1a is formed. Then, the sidewall protection film 5 is formed. This (SN) _n is a polymer compound,
Due to its own sponge effect and three-dimensional or chemical structure effect, it is highly resistant to attack by any active species. In addition, the sidewall protection film 5 includes a silicon nitride-based compound such as Si _x N _y or Si _x Cl _y N _z , which is generated by further reaction of etching reaction products SiCl _x and SiF _x with N ₂ . Free S and the like generated from S ₂ F ₂ are also included. However, the amount of silicon nitride compound produced is
Less than when etching with conventional Cl ₂ / N ₂ system. Due to the presence of such a side wall protective film 5, the side wall of the trench 1a withstands the impact of ions scattered in the ion sheath and on the surface of the side wall 3a and obliquely incident from the opening 4, and It was also extremely effectively protected from the side attack of radicals.

After the etching is completed, the above-mentioned wafer is about 10
When heated to 0 ° C., the side wall protective film 5 is quickly sublimated or decomposed and removed, as shown in FIG.
No particle contamination was generated.
Note that this heating may also be combined with heating for preventing dew condensation on the wafer after low temperature etching.

Example 2 In this example, the second invention of the present application is also applied to deep trench processing, and a single crystal silicon substrate is etched using a SiCl ₄ / N ₂ / S ₂ F ₂ mixed gas. Is. The sample wafer used in this example is shown in FIG.
It is the same as that shown in (a). This wafer was set in an RF bias application type magnetic field microwave plasma etching apparatus, and as an example, the flow rate of SiCl _{4 was} 10 SCC.
M, N ₂ flow rate 5 SCCM, S ₂ F ₂ flow rate 10 SCCM,
Gas pressure 1.3Pa (10mTorr), microwave power 850W, RF bias power 200W (2MH
z), the single crystal silicon substrate 1 was etched under the condition that the wafer temperature was −70 ° C.

In this process, C produced from SiCl ₄
Radical reaction by F ^* generated from l ^* and S ₂ F ₂ is performed by SiCl _x ⁺ , SF _x ⁺ , S _x ⁺ , Cl ⁺ , N ⁺
Etching proceeded at a high speed due to the ion assist mechanism. Here, since F ^* is involved in the etching, the etching rate is improved by about 20% as compared with the case where the RF bias power of about 100 W is applied in the SiCl ₄ / N ₂ mixed gas system, and about 4500 Å / A high etching rate of minutes has been achieved. Further, the constituent components of the side wall protective film 5 formed at this time are almost the same as those in the first embodiment, but the silicon nitride compound such as Si _x N _y is vaporized by the reaction between the component gases of the etching gas. Produces during the phase. However, in this embodiment, S ₂ F ₂ is added to the etching gas, and a part of N ₂ is (SN).
Since it was consumed for the formation of _n, no particle contamination due to excessive production of the silicon nitride-based compound occurred. The sidewall protection film 5 was quickly removed by heating the wafer to about 100 ° C. after the etching was completed. Also in this example, the trench 1a having a good anisotropic shape could be formed at high speed in a clean environment.

Example 3 This example is an example in which the third invention of the present application is also applied to deep trench processing and a single crystal silicon substrate is etched using a HBr / N ₂ / S ₂ F ₂ mixed gas. is there.
The sample wafer used in this example is also the same as that shown in FIG. This wafer was set in an RF bias application type magnetic field microwave plasma etching apparatus, and as an example, HBr flow rate 10 SCCM, N ₂ flow rate 5 SCCM, S ₂ F ₂ flow rate 10 SCCM, gas pressure 1.3.
Pa (10 mTorr), microwave power 850 W,
The single crystal silicon substrate 1 was etched under the conditions of RF bias power of 200 W (2 MHz) and wafer temperature of -70 ° C.

In this process, Br ^* produced from HBr
Etching proceeded at high speed by a mechanism of assisting radical reaction by F ^* generated from S _{2 and} F ₂ with ions of Br ⁺ , SF _x ⁺ , S _x ⁺ , N ^{+ and the} like. In the conventional HBr / N ₂ mixed gas system, the atomic radius of Br is Cl
Since it is smaller than the above, it is extremely difficult to increase the speed. However, in the present embodiment, since F ^* is involved in the etching, the etching rate is improved by about 30% as compared with the case where the RF bias power of about 100 W is applied in the HBr / N ₂ mixed gas system. A high etching rate of 4000Å / min was achieved. At this time, the etching reaction products such as SiBr _x and SiF _x are N ₂
A silicon nitride compound such as Si _x N _y generated by reacting with S, free S generated from S ₂ F ₂ , and (SN) _n generated when this S further reacts with N _2. To form a side wall protective film 5. The sidewall protection film 5 was quickly removed by heating the wafer to about 100 ° C. after the etching was completed. Also in this example, the trench 1a having a good anisotropic shape could be formed at high speed in a clean environment.

Although the present invention has been described above based on three embodiments, the present invention is not limited to these embodiments. For example, sulfur fluoride other than S ₂ F ₂ described above is used. However, almost the same result is obtained. Also,
Good results can be obtained by applying the present invention to not only the deep trench processing as described above but also the shallow trench processing. In this case, since a resist mask is usually used as the etching mask, the sidewall protection film can be removed at the same time when the resist mask is ashed. Further, a rare gas such as He or Ar may be appropriately added to the etching gas used in the present invention in the sense of expecting a sputtering effect, a dilution effect, a cooling effect and the like.

[0031]

As is apparent from the above description, in the present invention, sulfur fluoride having a large S / F ratio is added to the conventionally proposed mixed gas system of a halogen-based gas and N ₂ . As a result, F ^* can be used for etching, and high speed is realized. Further, it becomes possible to deposit S that is dissociated from sulfur fluoride and use it for side wall protection. In addition, a part of this S is further reacted with N ₂ in the etching gas to form a polymer (SN). It is possible to generate a sulfur nitride compound mainly composed of _n . Since this (SN) _n has high resistance to radical attack and ion bombardment, the side wall protection effect is enhanced as compared with the conventional process. Therefore, even if the etching rate is improved by means such as increasing the ion incident energy or increasing the radical property, there is no possibility that anisotropy will be deteriorated as an adverse effect as in the conventional case. Moreover, since S and (SN) _n can be easily and completely removed by heating or ashing, there is no concern of causing particle contamination. Therefore, the present invention is extremely suitable for manufacturing a semiconductor device which is designed based on a fine design rule and has high integration and high performance.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing an example of a process in which the present invention is applied to deep trench processing according to the order of steps, in which (a) is a state in which an etching mask made of SiO ₂ is formed on a single crystal silicon substrate. , (B) shows a state in which the trench is formed while the side wall protective film is formed,
(C) shows the state where the side wall protective film is removed by heating.

FIG. 2 is a schematic cross-sectional view showing a state where bowing has occurred in conventional deep trench processing.

FIG. 3 is a schematic cross-sectional view showing a state in which undercutting and tapering occur in the conventional deep trench processing.

[Explanation of symbols]

1 ... monocrystalline silicon substrate 1a ... trench 2 · SiO ₂ pattern 3 ... sidewall 4 ... opening 5 ... sidewall protective film

Claims (3)

[Claims] 1. The temperature of the substrate to be etched is controlled to be room temperature or lower, while Cl ₂ , N ₂ , S ₂ F ₂ , SF ₂ and S are added.
A dry etching method comprising etching a silicon-based material layer using an etching gas containing at least one kind of sulfur fluoride selected from F ₄ and S ₂ F ₁₀ . 2. SiCl ₄ , N ₂ , S ₂ F ₂ , S while controlling the temperature of the substrate to be etched below room temperature.
A dry etching method characterized in that a silicon-based material layer is etched using an etching gas containing at least one kind of sulfur fluoride selected from F ₂ , SF ₄ , and S ₂ F ₁₀ . 3. HBr, N ₂ , S ₂ F ₂ , SF ₂ and S while controlling the temperature of the substrate to be etched below room temperature.
A dry etching method comprising etching a silicon-based material layer using an etching gas containing at least one kind of sulfur fluoride selected from F ₄ and S ₂ F ₁₀ .