JPH05122208A - Data transmission system - Google Patents

Abstract

PURPOSE:To make the circuit finding out a synchronous word small and to reduce the power consumption and to easily find out the synchronous word by adding the same synchronous word as one synchronous word or a synchronous word in reverse bit arrangement to that of the synchronous word to one synchronous word and sending the resulting synchronous word. CONSTITUTION:Bit pattern outputs 5a-5p of D flip-flops 2a-2p are fed to a correlation device 3 and a bit replacement circuit 4, in which the arrangement of inputted bit patterns is replaced. Then an output of the bit replacement circuit 4 is fed to the correlation device 3. The correlation device 3 compares the bit fed from the D flip-flops 2a-2p with the bit fed from the bit replacement circuit 4 to detect whether or not they are coincident. When they are coincident, p-bits being a correlation coefficient of the correlation device 3 are fed to a synchronous word finding-out circuit 6, in which they are synchronized and the result is fed to a synchronous word identification circuit 7. Thus, even when plural synchronous words are in use, the synchronous word is found out by one correlation device only.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data transmission method, and more particularly to a data transmission method of a synchronization word added when transmitting data.

[0002]

2. Description of the Related Art When performing digital communication, the transmitting side
A sync word indicating the start point and end point of data is added. The receiving side discovers this synchronization word and receives data. There are the following methods for adding a synchronization word. That is, it is a method of adding one bit of a synchronization word to each piece of data to be transmitted. In this method, since it is easy to add a synchronization word to data, the synchronization word generation circuit and the like can be made inexpensive, but there is a problem that the transmission efficiency is poor.

Therefore, the data is divided into blocks,
A method of adding a synchronization word for each block is performed. A block diagram of the receiving side of the data transmission according to this method is shown in FIG. That is, data is serially input from the input terminal 21 to one ends of the D-flip-flops 22a to 22p which are connected in cascade. D-flip-flops 22a to 22p
Are connected in p stages in series to form a p-bit shift register. The outputs of the D-flip-flops 22a to 22p are supplied to the correlators 23a to 23p, respectively. Each of the correlators 23a to 23p includes a synchronization word generation circuit 24.
The bit pattern of the synchronization word is supplied from a to 24p.
When processing the data block by block and adding a synchronization word, the type of data is changed depending on the block and a different synchronization word is added accordingly. For example, eight types are used even only for the synchronization words related to voice.

Therefore, the number of sync word generation circuits and the number of correlators are required to be the number of bits of the sync word. Correlators 23a-23
At p, the bits supplied from the D-flip-flops 22a to 22p are compared with the bits supplied from the synchronization word generating circuits 24a to 24p, and the correlation coefficient is obtained based on whether or not they match. An accurate sync word is found based on this correlation coefficient. The outputs of the correlators 23a to 23p are supplied to the sync word finding output circuit 25. The sync word finding output circuit 25 synchronizes the input p bits,
The output is supplied to the output terminal 26.

[0005]

The above-described method for adding the sync word to the data of each block requires the same number of sync word generation circuits and correlators as the bits of the sync word.
Therefore, it becomes difficult to reduce the power consumption as well as the circuit size increases. Further, since the data is serially input, it takes time to find the synchronization word in the data. For this reason, a correlator that operates at high speed is required.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a data transmission system capable of realizing a smaller circuit scale and lower power consumption and easily finding a sync word.

[0007]

DISCLOSURE OF THE INVENTION The present invention is characterized in that the same sync word as one sync word or a sync word in the reverse order of one sync word is added to one sync word for transmission. It is a method.

[0008]

The output bit of the D-flip-flop is supplied to the correlator and the bit exchange circuit. The output of the bit exchange circuit is supplied to the correlator. The correlator compares the input bits. If these bits are the same, then
The sync word has been discovered.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a block diagram of a data transmission system to which the present invention is applied. In FIG. 1, data is serially input to the input terminal 1. Input terminal 1 is D-
It is connected to the flip-flop 2a. D-flip-flops 2a to 2p are connected in series, and these form a shift register.

For example, bit pattern outputs 5a-5 of D-flip-flops 2a-2p as shown in FIG.
p is supplied to the correlator 3 and the bit exchange circuit 4. The bit exchange circuit 4 exchanges the arrangement of the input bits. That is, in the bit switching circuit 4, the order of bits from the first input 5a, which is the MSB of the bit pattern, to the p-th input 5p, which is the LSB of the bit pattern, is switched. The output of the bit exchange circuit 4 is supplied to the correlator 3.

In the correlator 3, the D-flip-flop 2a
The bits supplied from .about.2p and the bits supplied from the bit replacement circuit 4 are compared to detect whether or not they match. If they match, p bits based on the correlation coefficient of the correlator 3 are supplied to the sync word finding circuit 6, and after being synchronized, are supplied to the sync word identifying circuit 7. By doing so, even when a plurality of sync words are used, it is possible to find the sync word with only one correlator. After the sync word is found, it can be processed at a relatively low speed after serial / parallel conversion. Therefore, the circuit size can be reduced and the power consumption can be reduced.

In the above-described embodiment, the bit replacement circuit 4 has a function of arranging the supplied bit patterns in reverse order. For example, the bit patterns are divided into two or three by utilizing the symmetry of the bit patterns. Divide and correlate 3
It may be a function to supply to.

In the case of a modulation method such as a phase modulation method, it is possible to make the phase change symmetrical. In this case, it is possible to find the synchronization word by directly using the result of the demodulated bits. That is, in the phase modulation method, the original bit string is not transmitted, but data coding suitable for the modulation method is performed. Therefore, it is necessary for the receiving side to also perform data decoding. Here, by giving the data the phase symmetry described above in the data, it becomes possible to easily find the data.

It is also possible to apply the method of inverting the output of the bit exchange circuit 4 to the phase modulation method. In this case, as shown in FIG. 3, processing other than the RF and IF signals is digitally processed, and the IF signal is
It becomes possible to perform A / D conversion by the / D converter 8 and process it by the digital signal processor (hereinafter referred to as DSP) 9. The DSP 9 performs data demodulation and sync word discovery / identification. In addition, in order to discover the synchronization word, DS
The signal processing before P9 is performed at high speed.

As shown in the above-mentioned embodiment, the delimiter of the data becomes clear by easily finding the synchronization word. Therefore, the processing speed can be increased as compared with the case where the data division is completely unknown.

FIG. 4 is a flow chart inside the DSP 9 shown in FIG. In FIG. 4, when digital data is input to the DSP 9 (step 11), n samples of the input data are input to the memory (step 12). After that, the data stored in the correlation circuit is read from, for example, the forward direction and the backward direction, and their correlation coefficients are calculated (step 13). Based on the calculated correlation coefficient, it is detected whether the data is a sync word (step 1).
4). If it is not a synchronization word, the process returns to step 11. On the other hand, in the case of a sync word, the sync word finding output circuit 6 processes the input data after the data is synchronized (step 15).

[0017]

According to the present invention, since the correlator searches for the synchronization word based on the original bit and the bit passed through the bit exchange circuit, it is possible to process with one correlator.
Therefore, it is possible to reduce the circuit size and power consumption. Further, since it is only necessary to find the sync word with one correlator and then determine what kind of the sync word is, it is possible to speed up the process and reduce the amount of hardware. Furthermore, by providing the synchronization word with symmetry, it becomes possible to easily discover the synchronization word.

[Brief description of drawings]

FIG. 1 is a block diagram of a data transmission system to which the present invention is applied.

FIG. 2 is a diagram showing an example of an output of a D-flip-flop.

FIG. 3 is a block diagram when a digital signal processor is used in the present invention.

FIG. 4 is a flowchart for explaining the operation of the digital signal processor.

[Explanation of symbols]

 3 Correlator 4 Bit replacement circuit 6 Sync word finding circuit 7 Sync word identifying circuit

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[Procedure amendment]

[Submission date] October 19, 1992

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be corrected] Brief description of the drawing

[Correction method] Change

[Correction content]

[Brief description of drawings]

FIG. 1 is a block diagram of a data transmission system to which the present invention is applied.

FIG. 2 is a diagram showing an example of an output of a D-flip-flop.

FIG. 3 is a block diagram when a digital signal processor is used in the present invention.

FIG. 4 is a flowchart for explaining the operation of the digital signal processor.

FIG. 5 is a block diagram of a conventional receiving side circuit of a transmission system.

[Explanation of Codes] 3 Correlator 4 Bit replacement circuit 6 Sync word finding circuit 7 Sync word identifying circuit

Claims (1)

[Claims] 1. A data transmission method, wherein the same sync word as one sync word or a sync word in the reverse order of said one sync word is added to said one sync word for transmission.