JPH05113949A - Bus data collection system - Google Patents

Abstract

PURPOSE:To shorten the time covering the occurrence of a fault through the end of collection of the data and to omit the large memory capacity by stopping the collection of data with the data collection stop signal produced from a processor that detected the occurrence of the fault. CONSTITUTION:A bus data collecting device 11 always monitors the data transfer state of a bus 10 connected to plural terminal equipments and then designates the desired data to be collected through a data collection/selection designating circuit 1 to start the collection of data. Thereafter the data are continuously collected until a collection stop instruction is received from a data collection control circuit 2. Meanwhile a bus data decoding circuit 3 discriminates the data on the bus 10 and records these data to a bus data recording circuit 4. A control processor 20 grasps the data transfer state and then immediately transmits a data collection stop signal to the circuit 2 of the device 11 from a data collection stop signal generating circuit 8 via a signal line 21 when the fault is detected. The circuit 2 detects the stop signal and stops the collection of data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data collection system for analyzing abnormalities in bus protocols such as local area networks.

[0002]

2. Description of the Related Art Conventionally, a failure investigation caused by data exchange between terminal devices connected to a local area network or the like by a common bus is conducted when there is no data collection device capable of grasping the data transfer status on the bus. Was extremely difficult to do. The bus data collection device records and collects the data transfer status on the bus in a first-in / first-out method, and it is inconvenient to continue the system operation due to some kind of bus failure. When the response message to the message is not received, the data collection is temporarily stopped, and the data transfer status is checked by the record collected immediately before that, so that the cause is It helps to analyze which is the case and analyzes the abnormalities of the bus protocol, but it relies on human beings to detect the occurrence of the failure situation as in the above example and stop the collection of bus data. It was

[0003]

In the above-mentioned conventional data collection device, some kind of failure caused by data exchange between the terminal devices connected to the bus is displayed on the system console, for example. Although it will inevitably take time to manually determine whether or not the device will stop and to stop collecting data manually, the data on the bus is fast and the amount of data is large. For this reason, an extremely large amount of storage capacity is required to record the data at the time of failure without omission, so that the bus / data collection device becomes large-scale, which makes the introduction difficult. There was a circumstance.

An object of the present invention is to stop the data collection by a data collection stop signal issued from a processor which has detected the occurrence of a failure, thereby shortening the time from the occurrence of the failure to the stop of the collection and not requiring a large storage capacity. It is to provide a bus data collection system.

[0005]

The bus data acquisition system of the present invention records data signals on a bus in a local area network or the like in which a plurality of terminal devices are connected to a common bus and transfer data mutually. In the bus data collection system, means for detecting an abnormality in data transfer on the bus to generate and send a bus data collection stop signal, and means for receiving the stop signal and stopping collection of bus data. Have.

Further, means for issuing a health check signal indicating whether the processor device is normal or abnormal for detecting a data transfer abnormality on the bus and generating a bus data collection stop signal, and the processor according to the health check signal. It would be desirable to have a means of stopping the collection of bus data when a device malfunction is detected.

[0007]

[Function] By detecting the abnormal state of the data transfer on the bus, receiving the bus data collection stop signal generated and transmitted, and stopping the collection of the bus data, the time required for the abnormal state detection and stop processing is reduced. Since it can be shortened, it is possible to reduce the storage capacity used for collecting the bus data necessary for analyzing the failure caused by the abnormality in the bus protocol.

Further, it is possible to stop the bus data collection by detecting the abnormality, generating the bus data collection stop signal, and detecting the abnormality of the processor itself to be transmitted by the health check signal.

[0009]

Embodiments of the present invention will now be described with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram showing a configuration example of a local area network using the bus data collection system of the present invention.

As shown in FIG. 2, a plurality of terminal devices (1),
(2) ... (n) are connected to a local area network capable of mutual data transfer on a common bus 10 and the data signals on the bus are recorded for investigation and analysis of bus protocol abnormalities. A bus / data collection device 11 capable of controlling the data transmission is provided, and a signal line 21 is provided between the bus / data collection device 11 and the control processor device 20 for controlling the data transfer in the local area network and grasping the operating status of the system.
Connected by.

FIG. 1 shows a bus data collection system including a bus data collection device 11, a control processor 20, and a signal line 21. Bus data collection device 1
Reference numeral 1 is composed of a data collection selection designating circuit 1, a data collection control circuit 2, a bus data decoding circuit 3, a bus data recording circuit 4, a collected data analysis editing circuit 5, a data display output circuit 6 and a changeover switch 7. The data collection control circuit 2 is connected to the data collection stop signal generation circuit 8 provided in the control processor device 20 by the signal line 21.

The bus data collection device constantly monitors the data transfer status on the bus and monitors all transfer data. When the data to be collected needs to be selected in particular, the data collection selection designating circuit 1 Specify to start the specified data collection. Data collection control circuit 2 thereafter
Operation continues until there is an instruction to stop
The data decoding circuit 3 decodes the data on the bus and discriminates the message type, the destination, etc. by, for example, a function code or the like, and the bus data recording circuit 4
To record. The bus / data recording circuit 4 adopts a first-in / first-out recording mode, and old data is sequentially discarded. After the data collection is stopped, the bus / data recording circuit 4 is switched and connected to the collected data analysis / editing circuit 5 by the switch 7, the required data is searched and edited from the data recorded and collected just before the switching, and the data display / output circuit 6 is displayed. Is output to.

The control processor device 20 includes the terminal devices (1), (2) ... (n) connected to the bus 10 and the terminal devices (1), (2) ... (n) and the control processor. Since the status of data transfer with the device 20 can be grasped and the transfer completion of the response message between the devices can be detected, for example, the data collection stop signal generation circuit 8 can be connected to the bus via the signal line 21. Immediately send a data collection stop signal to the data collection control circuit 2 of the data collection device 11. This operation can be easily realized by the program of the processor device 20, and the signal line 21 is RS-2.
An interface like 32C is suitable.

Further, considering a situation in which the control processor device itself has stopped, a signal indicating normal operation is constantly sent to the signal line 21 as a health check signal periodically, for example, every 10 seconds. The data collection control circuit 2 can stop the data collection by detecting this when the health check signal is no longer received, that is, when the control processor device 20 is abnormal.

[0016]

As described above, according to the present invention, when a bus data collection stop signal which is generated by detecting an abnormal state of data transfer on the bus and transmitted is received, more preferably,
Detecting an abnormality in data transfer When an abnormality in the processor itself is detected by the health check signal, the bus
By stopping data collection, the time taken to detect and stop the anomaly is much shorter than if it were done manually, so the bus data acquisition system for analyzing bus protocol anomalies has a relatively small capacity. There is an effect that can be realized by using the storage device.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration example of a local area network using the bus data collection system of the present invention.

[Explanation of symbols]

 1 data collection selection designation circuit 2 data collection control circuit 3 bus data decoding circuit 4 bus data recording circuit 5 collected data analysis / editing circuit 6 data display output circuit 7 switch 8 data collection stop signal generation circuit 10 bus 11 bus data Collection device 20 Control processor device 21 Signal line

Claims (2)

[Claims] 1. A bus data collection system for recording a data signal on a bus in a local area network or the like in which a plurality of terminal devices are connected to a common bus and transfer data to each other. A bus data collection system comprising: means for detecting an abnormality and generating and transmitting a bus data collection stop signal; and means for receiving the stop signal and stopping collection of bus data. 2. A means for issuing a health check signal indicating whether the processor device is normal or abnormal for detecting an abnormality in data transfer on the bus and generating a bus data collection stop signal, and the processor according to the health check signal. 2. The bus data collection system according to claim 1, further comprising means for stopping collection of bus data when an abnormality of the device is detected.