JPS61136142A - Memory method of input and output data - Google Patents

Abstract

PURPOSE:To attain the unmanned monitor even to the faults produced irregularly or rarely by storing endlessly th input/output signals while a main processor perform no input/output access and also holding surely the state of the input/ output data at the memory when a fault occurs. CONSTITUTION:When a main processor performs no input/output of data, a submicroprocessor 20 designates cyclically the set input/output numbers through a local address bus 23 and a switch circuit 26. In this case, the state of the designated input/output signal is stored to a memory 21 from an input/output module via a read data buffer 15, a data bus buffer 27 and a local data bus 24. When a fault occurs and the set detection conditions are satisfied, the microprocessor 20 discontinues the sampling and stores the data to a memory 21 at that time point. Thus it is possible to obtain easily the data for analysis of the fault factor by monitoring the input/output data stored in the memory 21 via a serial interface 25.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a method for storing input/output data, and particularly to a method for storing input/output data, and particularly for analyzing the cause of an abnormality occurring in a computer system for process control or the process itself at regular intervals. The present invention relates to a method for storing input/output data of a process.

[Background of the invention]

FIG. 2 is a block diagram showing a general configuration of a computer system that determines and controls the state of a process by exchanging signals with process input/output signals 5o and 51. In the figure, the main processor 1 transmits the status of process input/output signals 50 and 51 to the input/output interface 5 and the input/output module 6 according to the program on the memory 2.
(number (address) specified through the system bus)
The input signal is taken in and processed through a control circuit that turns on and off the output signal of the specified number.

The 70TB disk 4 and its controller 3 are used as a large capacity auxiliary memory.

In a computer system that handles process input and output, when an abnormality occurs on the process side or the computer side, it is necessary to quickly determine whether the cause is on the process side or on the computer side's software or hardware. There is a need to.

Furthermore, some abnormalities occur only once, and it is often necessary to catch them and investigate the cause from the state of input/output changes at that time. For such purposes,
A multi-channel recorder or the like is connected externally to record time charts of input/output data sent and received by a computer over a long period of time. Paper is wasted, and a human must be present at all times.Also, the number of signals that can be recorded (number of channels) is limited, so the cause cannot be identified unless the combination of signals recorded many times is changed. There is also the inconvenience of not being able to receive a gift.Furthermore,
The problem was that it was difficult to accurately determine the timing of the occurrence of a problem because it was connected separately.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide an input/output data storage method that enables unattended monitoring, does not waste recording paper, and can reliably record input/output data when an abnormality occurs.

[Summary of the invention]

The present invention provides a sub-microprocessor system for data recording in the input/output interface of a computer system, and uses this system to sample input/output signals at a constant cycle while the main processor is not accessing the input/output. In addition to storing the abnormality in the memory, the conditions for the occurrence of the abnormality are specified in the program, and when this abnormal condition is met, the above sampling is stopped to ensure that the state of the input/output data at the time before and after the abnormality is retained in the memory. It is characterized by this.

[Embodiments of the invention]

The present invention will be explained below with reference to the embodiment shown in FIG. 1st
In the figure, the system bus 7 is the same as that in FIG.
5, the write data buffer 16, the interrupt control circuit 17, the vector number generator 18, etc. correspond to the second south input/output interface 5. It is assumed that the other parts in FIG. 2 are connected in the same way as the power ζ omitted in the first part.〇 Sub-microprocessor 20, memory 21, control circuit 22, local address bus 23, local data bus 2A, a serial interface 25, a switching circuit 26, and a data path 7a 27 are the parts provided to realize the method of the present invention. A program for controlling the sub-microprocessor 2°, process input/output numbers to be recorded, abnormal state detection conditions, etc. are set in the memory 21 via the serial interface 25. In such a configuration, when the main processor is not performing data input/output, the sub microprocessor 2 is set and sequentially and cyclically designates the friend input/output number through the local address bus 23 and the switching circuit 26, and then The state of the specified input/output signal is stored in the memory 21 from the input/output module via the read data buffer 15, data bus buffer 27, and local data bus 24. When the main processor reads or writes a process input/output signal, the sub-microprogram 20 immediately interrupts sampling and enters a standby state. When the main processor finishes reading or writing, the sub-microprogram 20 specifies the previous process input/output number. Go back and restart. Further, storage in the memory 21 is performed in an endless manner, so that when the storage area is stored at the last address 1, it returns to the first memory address. The storage capacity is summed so that it can be arbitrarily selected from the number of input/output signal points to be sampled, the sampling period (variable), and the equal pressure of the time to be recorded.

While such operations are being performed all the time, if an abnormality occurs in the process or the computer system and a failure detection condition is established, the microprocessor 20 stops sampling and memorizes the data at that point! 721. Therefore, by monitoring the input/output data stored in the memory 21 via the serial interface 25, data for analyzing the cause of an abnormality can be easily obtained. Note that this monitor may be executed using a separate microcomputer or may be connected to a serial interface of the main processor. Alternatively, it is also possible to add a circuit that directly transfers data to the main processor.

〔Effect of the invention〕

As is clear from the above embodiments, according to the present invention, unmanned monitoring is possible even for abnormalities that occur irregularly or once in a while, and it is possible to perform unmanned monitoring without wasting recording paper. This has the effect of providing data for elucidating the causes of abnormalities.

Brief Description of the South Side FIG. 1 is a diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram of a conventional control computer system.

20...Sub microprocessor, 21...Memory, 22...Control circuit, 25...Serial interface 1st

Claims (1)

[Claims] A subsystem is provided for collecting and storing data exchanged between a control computer system and a process via an interface, and the subsystem detects at least the number of input/output data to be returned and abnormalities in the computer system or process. In addition to setting detection conditions in advance, the above subsystem sequentially sends input/output data of set numbers when the computer system and process are normal and when the computer system is not processing or transmitting or receiving output data. Data is captured cyclically and stored in the memory within the own system in an endless manner, and when the set detection conditions are met, the capture of input/output data is interrupted and the data captured up to that point is retained. An input/output data storage method characterized by: