JPH05109823A - Board for wiring - Google Patents

Abstract

PURPOSE:To get a board for wiring which can cope with a high frequency circuit and can get excellent heat radiation property in case of loading an IC chip by a flip chip. CONSTITUTION:This is a board for wiring, which has wiring layers consisting of a plurality of conductive layers on a silicon substrate 2, and has a bump 8 for a flip chip, and the bump 8 is connected to the innermost conductive layer 6 of the wiring layer 7.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring substrate having a plurality of wiring layers on a silicon substrate and suitable for mounting an IC chip by flip chip.

[0002]

2. Description of the Related Art Conventionally, a glass epoxy substrate, a ceramic substrate, a metal substrate or the like has been used as a wiring substrate having a wiring layer formed on the substrate.

As a method of connecting an IC chip to a wiring board, solder bumps are formed in advance on the terminals of the IC chip, and after pre-soldering also to the terminals formed on the outermost layer of the wiring board. A wire bonding method is known in which a flip chip that heat-bonds both of them and a terminal of an IC chip and a terminal of a wiring substrate are connected by a thin wire such as gold.

Among them, the flip chip is suitable for connection of chips used in high-frequency circuits because the wiring length required for connection of IC chips is shorter than that of wire bonding, and is suitable for high-speed bonding and has a high yield. This is the preferred connection method.

However, since it is necessary that the mounted IC chip and the wiring substrate have a similar coefficient of thermal expansion, it cannot be used on a glass epoxy substrate or a metal substrate. Also, since the flip chip is inferior in heat dissipation of the IC chip,
In order to improve the heat dissipation of the IC chip, it is necessary to bring a cooling device into contact with the chip itself.

On the other hand, the wire bonding has a relatively good heat dissipation property of the chip, but even in this case, when a chip having a large heat generation amount is mounted, a separate heat dissipation layer is provided on the back surface of the wiring substrate and the heat dissipation is performed. A thermal via hole that connects the layer and the IC chip is formed.

[0007]

However, bringing the cooling device into contact with the IC chip as in the prior art has the problem that the entire device must be large-scaled, and the formation of the thermal via hole is not possible. There is a problem that the wiring density is lowered and the number of wiring layers must be increased.

The present invention is intended to solve the problems of the prior art as described above, and is applicable to a high frequency circuit.
It is an object of the present invention to obtain excellent heat dissipation when an IC chip is mounted on a wiring substrate by a flip chip that is suitable for high-speed bonding and has a high yield.

[0009]

The present inventor uses silicon as a substrate material of a wiring substrate and connects a bump used in flip chip to an innermost conductive layer of a wiring layer of the wiring substrate. If it is formed, the part of the heat dissipation path from the IC chip to the silicon substrate through the bump has a low thermal conductivity is only the insulating layer between the conductive layer connecting the bump and the silicon substrate. Since the thermal resistance becomes low, the heat generated in the IC chip is easily radiated from the side of the silicon substrate having a high thermal conductivity from the IC chip through the bumps, and the present invention has been completed.

That is, the present invention is a wiring board having a wiring layer composed of a plurality of conductive layers on a silicon substrate and having bumps for flip-chips, the bumps being the innermost layer of the wiring layer. Provided is a wiring board which is connected to a layer.

[0011]

Since the wiring substrate of the present invention uses silicon as the substrate, the coefficient of thermal expansion becomes close to that of the IC chip, and the IC chip can be mounted by the flip chip.
Therefore, the wiring board can be used for a high frequency circuit, and the bonding speed and the yield at the time of mounting a chip can be improved. Further, by using silicon as the substrate, it becomes possible to form the wiring layer on the silicon substrate finely by using the microfabrication technology of the IC process, and the wiring layer pattern, which has been about 100 μm pitch in the past, can be formed in 10 μm pitch. It becomes possible to form to a certain degree.

Further, since the wiring substrate of the present invention has flip chip bumps and the bumps are connected to the innermost conductive layer of the wiring layer, the bumps are used to form an IC chip. When mounted, the heat dissipation path of the IC chip from the IC chip through the bumps to the silicon substrate has a low thermal conductivity only in the insulating layer between the conductive layer connecting the bumps and the silicon substrate. Thermal resistance is significantly lower than when the bumps are connected to the outer conductive layer. Therefore, the heat generated in the IC chip can be efficiently radiated to the silicon substrate side through the bump. Therefore, by cooling the silicon substrate, it becomes possible to mount an IC chip having a high heating value.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be specifically described below with reference to the drawings.

FIG. 1 is a cross-sectional view of a bare IC chip 10 mounted on a wiring substrate 1 of the present invention by a flip chip.

In the wiring substrate 1 shown in FIG.
The insulating layer 3 and the power feeding layer (V_{D D}Or V_CC) 4
Are laminated, and the insulating layer 5 and the signal layer 6 are alternately laminated on this.
A laminated wiring layer 7 is formed. Also, IC chip
To connect the signal line 10 to the innermost signal layer 6 of the wiring layer 7.
The pump 8 is formed.

Here, a general IC is mounted on the silicon substrate 2.
A silicon wafer used in the process can be used, and the thickness thereof is, for example, about 500 μm. The insulating layer 3 can be formed of, for example, amorphous SiO ₂ or Si ₃ N ₄ , and the thickness thereof can be 0.5 to 0.01 μm. Such an insulating layer 3 can be easily formed without pinholes by oxidizing a silicon substrate or the like as in a general IC process. In addition, the power feeding layer 4
Can be formed by depositing a metal such as gold or aluminum on the entire surface of the insulating layer 3 by vapor deposition to a thickness of about 5 μm.

The signal layer 6 forming the wiring layer 7 can be formed of gold, aluminum, copper or the like, and its width is usually 5 to 50 μm.
m, and the thickness is 1 μm or less. Such a signal layer 6 can also be formed by vapor deposition plating of metal or sputtering. The insulating layer 5 can be formed of polyimide, Teflon, or the like, and usually has a thickness of 5 μm or less. As a forming method thereof, the resin composition forming them may be printed or applied by a conventional method.

Each layer constituting the wiring substrate 1 as described above can be patterned by a conventional method, and through holes and via balls are formed in them as required.

The bump 8 can be formed of a gold alloy or the like, and the size thereof can be, for example, about 100 μm □. The forming method is not particularly limited as long as bumps capable of electrically and mechanically connecting the IC chip 10 to the innermost signal layer 6 of the wiring layer 7 can be obtained by flip chip, but for example, an insulating layer of the wiring layer 7 is used. When the layers 5 and the signal layers 6 are alternately laminated, a metal layer may be laminated on the portions that will become the bumps 8 at the same time.

In such a wiring substrate 1, polyimide generally used as a constituent material of the insulating layer 5 has a thermal conductivity of about 2 to 40 W / m ° C., and Teflon has a thermal conductivity of about 6 W / m ° C. And small. Moreover, the thermal conductivity of gold, which is the constituent material of the signal layer 6, is as high as 200 W / m ° C. or more, and the thermal conductivity of the silicon substrate 2 is about 148 W / m ° C. Therefore, when the bump is connected to the outermost signal layer as in the conventional case, a large number of insulating layers 5 having a low thermal conductivity are present in the heat dissipation path from the IC chip connected to the bump to the silicon substrate via the bump. As a result, the thermal resistance of the heat radiation path increases, but the wiring board 1 of FIG.
As described above, when the bump 8 is connected to the innermost signal layer 6 of the wiring layer 7, the insulating layer 5 having a small thermal conductivity is slightly present in the heat dissipation path from the IC chip 10 connected to the bump 8 to the silicon substrate 2. Since only the thickness is present, the heat resistance of the heat dissipation path is reduced, and the heat dissipation of the IC chip 10 is significantly improved.

For example, when the heat generation amount of the IC chip is set such that the maximum temperature of the IC chip is 80 ° C. when the IC chip is directly mounted on the silicon substrate, such an IC chip has the bump with the highest wiring layer. When mounted on the conventional wiring substrate formed in the outer layer, the maximum temperature of the IC chip reaches 226 ° C., but when mounted on the wiring substrate 1 of FIG. 1, the maximum temperature rises only up to about 86 ° C.

As described above, the wiring substrate of the present invention is made of silicon, and the bumps for flip chips are the innermost conductive layer of the wiring layer (in the wiring substrate of FIG. 1, the innermost signal layer 6 is used). ), And various modes can be adopted as long as it has such a configuration.

For example, with respect to the wiring substrate 1 of FIG.
As shown in FIG. 2, fins 9 for air cooling can be attached to the back surface of the silicon substrate 2. This makes it possible to further improve the heat dissipation of the IC chip connected to the bump.

In the wiring substrate 1 shown in FIG. 1, the feeding layer 4 is formed on the silicon substrate 2 via the insulating layer 3, and the signal layer 6 connected to the bumps 8 is formed on the feeding layer 4. Although the power supply layer 4 and the wiring layer 7 are formed, the positions are not limited to these. For example, as shown in Figure 3,
The signal layer 6 connected to the bumps 8 may be formed on the insulating layer 3 immediately above the silicon substrate 2 in the same plane as the power feeding layer 4. This makes it possible to further improve the heat dissipation of the IC chip connected to the bump 8.

The wiring board is not particularly limited in terms of usage and can be applied to high frequency circuits. Further, an IC chip having a high heat generation amount can be mounted without using a large-scale cooling device as in the past. Especially when a chip with a high heat value is mounted, it is preferable to use it together with a simple cooling device.

For example, as shown in FIG. 4, the IC chip 10 (5 to 20 mm) is formed on the wiring substrate 1 as shown in FIG.
□) is mounted, and it is mounted on a normal printed circuit board 11 (10c
m □), and can be mounted on the computer device 13 provided with the fan 12.

[0027]

According to the wiring board of the present invention, it is possible to cope with a high frequency circuit and obtain excellent heat dissipation when an IC chip is mounted by flip chip.

[Brief description of drawings]

FIG. 1 is a sectional view of an embodiment of a wiring board of the present invention.

FIG. 2 is a perspective view of another embodiment of the wiring board of the present invention.

FIG. 3 is a cross-sectional view of another aspect of the wiring board of the present invention.

FIG. 4 is an explanatory view of a mode of using the wiring board of the present invention.

[Explanation of symbols]

 1 Wiring Substrate 2 Silicon Substrate 3 Insulating Layer 4 Feeding Layer 5 Insulating Layer 6 Signal Layer 7 Wiring Layer 8 Bump 9 Fin 10 IC Chip

Claims (1)

[Claims] 1. A wiring substrate having a wiring layer composed of a plurality of conductive layers on a silicon substrate and having bumps for flip-chip, wherein the bumps are connected to the innermost conductive layer of the wiring layer. A wiring board characterized by being.